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Interfacing Atmel LV / BV EPROMs on a Mixed 3-volt / 5-volt Data Bus

Application Note CMOS EPROM

Interfacing Atmel LV / BV EPROMs on a Mixed 3-volt / 5-volt Data Bus
EPROM
Introduction
Application Note CMOS EPROM
Background
Definition of Terms: A. Latchup - a destructive phenomenon associated with CMOS-based semiconductors. Parasitic SCRs (silicon-controlled rectifiers or p-n-p-n devices) exist on inputs and outputs. Once an SCR is activated, it can conduct high current. The current can only be turned off by disconnecting the power supply.
Figure 1. Atmel LV / BV EPROM Output Buffer
Interfacing Atmel LV / BV EPROMs on a Mixed 3-Volt / 5Volt Data Bus
Rev. 0559A-10 / 98
the current capability for latchup is so much larger than the amount of current required to induce electromigration, it is clear that the electromigration requirement will dictate the maximum IBUS current. The balance of this application note focuses on ensuring by system design that the magnitude of the IBUS current into the EPROM is less than 10 mA. The effects of exceeding the normal output voltage of the LV / BV supply (over-volting) will not be discussed in detail here. Those characteristics should be obtained from the battery or voltage regulator manufacturers.
Results
EPROM
Figure 4. IOH versus VOH for 8096
Figure 6. 74HC00 Load Line on LV / BV EPROM
Figure 5. IOH versus VOH for 74HC00
Figure 7. LV / BV IBUS versus VBUS versus Temperature
Figure 8. Zener Clamp Bus to 3 Volts
Figure 9. Series Output Resistor Reduces IBUS
EPROM
Conclusion
Interfacing Atmel LV / BV EPROMs on a common data bus with standard 5-volt devices can be achieved if the output drives of the 5-volt powered parts are controlled through careful device selection or by adding external components. The problems to avoid are: · failure of the LV / BV part due to electromigration, and · battery venting of the LV / BV supply. Following these guidelines will allow design of mixed power supply systems which exhibit sound component and system reliability.
EPROM
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0559A-10 / 98 / xM
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