Rev. March, 2001 Application APPLAB/GB/00/010 Table Con

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Rev. March, 2001 Application APPLAB/GB/00/010 Table Con

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Getting Started with TSC695 Evaluation
Rev. March, 2001
Application
APPLAB/GB/00/010
Table Contents
TSC695 evaluation contents
Supported platforms
Getting started with evaluation
Installing software development package
Connecting serial links
Connecting power supply
Compiling linking your program
Opening application terminal window
Transfering executable file board
Remote debugging your program
Using TSC695 VHDL Model
CDROM Organization
Where from here
APPLAB/GB/00/010
Rev. March, 2001
TSC695 evaluation contents
TSC695 starter contains following parts: Evaluation board equipped with: TSC695 4Mbytes 512Kbytes FLASH containing rdbmon monitor program Documentation Getting Started with TSC695 Evaluation CDROM (see Section "CDROM Organization", page ESA/ESTEC ERC32CCS software package (V2.0.6 release gzipped file) including software tools documentation (PDF format) Compiled TSC695 VHDL structural model related files TSC695 BSDL file TSC695 evaluation board EDIF netlist TSC695 documentation (PDF format) TSC695 Data Sheet TSC695 User's Manual Evaluation board "Hardware User's Manual" Getting Started with TSC695 Evaluation
Supported platforms
ERC32CCS package only supports Solaris operating system running platform.
Getting started with evaluation
software running TSC695 evaluation board, will follow these steps (detailed next paragraphs): Install ESA/ESTEC ERC32CCS software development package from CDROM your Solaris platform. Connect evaluation board serial connectors Solaris platform serial ports. Connect evaluation board power supply. Compile link your program. Transfer your program executable file evaluation board RAM. Debug/Run your program board with graphical user interface DDD.
Installing software development package
ERC32CCS directory tree compiled reside /opt/gnu Solaris platforms. installation directory /opt/gnu, then will have create link location ERC32CCS directory after installation. Copy erc32ccs-2.0.6-solaris.tar.gz file from CDROM your disk. Un-compress un-tar file. Create link:
Rev. March, 2001
APPLAB/GB/00/010
Solaris1> /opt/gnu Solaris1> erc32
/opt/gnu/erc32/bin your search path.
Connecting serial links
Connect board connector Solaris platform serial port platform serial port Solaris platform port will used establish full-duplex connection with board UART-A; this connection will allow application running evaluation board display output. Solaris platform port will used communicate with RDBMON, evaluation board monitor program.
application output messages
DDD/GDB window
5V-2A
uses port
uses port
TSC695
Solaris Platform
RDBMON
Connecting power supply
Connect board 5V-2A power supply follows: J28-C VCC, J20-C GND.
Compiling linking your program
Compile link your application program follows:
Solaris1> sparc-rtems-gcc application.c application
APPLAB/GB/00/010
Rev. March, 2001
Opening application terminal window
must open terminal window Solaris platform that your application display results. this with command:
Solaris1> xterm -19200 /dev/ttya
Transfering executable file board
load debug your application through only, working with through much more easier. start with debugger, use:
Solaris1> -debugger sparc-rtems-gdb -no-data-window -attach-source-window <your_application>
script, dddx provided start this configuration. dddx follows:
Solaris1> dddx <your_application>
also type dddx only then specify application loaded with File Open Program. command.
Remote debugging your program
should have windows opened debug your application: terminal window one. Reset board with RESET switch. terminal window should display:
ERC32 boot loader v1.0 initializing loading .text loading .data starting
command window, perform following steps:
(gdb) remotebaud 19200 (gdb) target erc32 /dev/ttyb Remote debugging using /dev/ttyb 0x2000000 (gdb) load Loading section .text, size 0x69a0 0x2000000 Loading section .data, size 0x530 0x20069a0 (gdb)
Rev. March, 2001
APPLAB/GB/00/010
ready remote debugging session. following figure shows session example:
(gdb)
Using TSC695 VHDL Model
starter contains precompiled VHDL model TSC695 device. model been compiled with ModelSim V5.2e VHDL simulator. model already back-annotated file typical conditions (5V, 25C). Before using model, must copy VITAL libraries modelsim.ini file from CDROM; then, modify modelsim.ini file that fits with libraries installation directory path. VHDL model operate properly, must force some internal nets cycles. called D_INIT bits wide) declared model entity. This TSC695 VHDL model initialization purpose only; there D_INIT device.
APPLAB/GB/00/010
Rev. March, 2001
When writing your VHDL test bench VHDL description TSC695 hardware environment, must declare S_D_INIT 33-bit wide std_logic_vector signal that will connect D_INIT instanciation part your VHDL design. then following three lines your startup.do file, keep them standalone file that load demand (but always very beginning simulation session).
force -freeze /<test_bench_entity>/S_D_INIT 16#0 cycles periods> force -freeze /<test_bench_entity>/S_D_INIT 16#Z
system clock period 100ns, statement 1000ns. S_D_INIT suggestion signal name; other signal name.
CDROM Organization
CDROM organized follows: /BSDL contains TSC695 BSDL file /EDIF contains TSC695 evaluation board EDIF netlist /ESA_ESTEC_CCS contains V2.0.6 ESA/ESTEC cross compiler software package /Patches contains files patch package README_FIRST file /VHDL contains TSC695 VHDL model related files /doc contains TSC695 data sheet, TSC695 User's Manual, TSC695 Hardware User's Manual this Getting Started manual. these files released format.
Where from here
/opt/gnu/erc32/doc directory contains DDD, manuals format. should also read TSC695 User's Manual Data Sheet well evaluation board User's Manual which describes numerous capabilities evaluation hardware.
Rev. March, 2001
APPLAB/GB/00/010

Rev. March, 2001 Application APPLAB/GB/00/010 Table Con

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