Release December 2001 Place, Sunnyvale, 94088-3453 SPEC

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Release December 2001 Place, Sunnyvale, 94088-3453 SPEC

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Common Flash Memory Interface Specification
Release
December 2001
Place, Sunnyvale, 94088-3453
SPECIFICATION AGREEMENT
This royalty-free, reciprocal patent license parties wishing adopt Specification their products. making this specification, ("User") agreeing bound terms this agreement. agree them, then have license specification, should destroy these materials return them Promoter from whom this Agreement obtained. "CFI Specification" means revision "Common Flash Interface Specification," numbered greater, published made available industry licensing Promoters. "CFI Promoters" means Intel Corporation, Advanced Micro Devices, Fujitsu Limited, Sharp Corporation. Agreement: Effective User's acceptance this Agreement, subject terms conditions Promoters User agree follows: License: Promoters User each grant other subsidiaries, under claim patent patent application otherwise infringed, non-exclusive, royalty-free, non-transferable, world-wide license, without rights sublicense, make have made such party's products which comply with Specification solely connection with meeting Specification, use, sell, offer sell, import such products, where infringement such claims would have occurred incorporation Specification such products, there feasible alternative such infringement. Other Licenses. Except rights expressly provided this Agreement, neither party grants receives, implication, estoppel, otherwise, rights under patents other intellectual property rights. LIMITATION LIABILITY: Specification provided without warranty kind. PROMOTERS OFFER WARRANTY EITHER EXPRESS IMPLIED INCLUDING THOSE MERCHANTABILITY, NONINFRINGEMENT THIRD-PARTY INTELLECTUAL PROPERTY FITNESS PARTICULAR PURPOSE. PROMOTERS SHALL LIABLE DAMAGES WHATSOEVER (INCLUDING, WITHOUT LIMITATION, DAMAGES LOSS BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS BUSINESS INFORMATION, OTHER LOSS) ARISING INABILITY SPECIFICATION, EVEN PROMOTERS HAVE BEEN ADVISED POSSIBILITY SUCH DAMAGES. BECAUSE SOME JURISDICTIONS PROHIBIT EXCLUSION LIMITATION LIABILITY CONSEQUENTIAL INCIDENTAL DAMAGES, ABOVE LIMITATION APPLY. TERMINATION THIS LICENSE: Promoters terminate this license time breach terms conditions. Upon termination, will immediately destroy Specification return copies same have made Promoters. U.S. GOVERNMENT RESTRICTED RIGHTS: Specification provided with "RESTRICTED RIGHTS." Use, duplication disclosure Government subject restrictions forth FAR52.227-14 DFAR252.227-7013 seq. successor. Specification Government constitutes acknowledgment Promoters' rights them APPLICABLE LAWS: claim arising under relating this Agreement shall governed laws Delaware. export Specification products compliance thereto violation applicable export laws.
SPECIFICATION
Edition
1.00 2.00
Date Published
07/25/1996 12/01/2001
Revision Record Revised Contents
First Draft Release Second Draft Release
Notice
This Specification hereby provided your subject terms enclosed Specification Agreement. retains right make changes this document time, without notice.
Table Contents
Introduction
1.1. 1.2. Purpose Scope
Overview
2.1. Operational Summary
Hardware Interface
3.1. 3.2. 3.3. Query Command Interface Query Structure Output Query Structure
Extensibility Appendix
Introduction
1.1. Purpose
Common Flash Interface (CFI) specification outlines device host system software interrogation handshake that allows specific vendor-specified software algorithms used entire families devices. This allows device-independent, JEDEC ID-independent, forward- backward-compatible software support specified flash device families. allows flash vendors standardize their existing interfaces long-term compatibility.
1.2. Scope
This release specification defines basic Query interface CFI-compliant devices. This allows parameterization known future flash Read/Write/Erase control interfaces. This Query structure attempts define critical parameters relevant broad base flash memory devices. specification will specify detail command sets, status polling methods, software algorithms individual flash vendors. 16-bit code assigned specific manufacturers' interfaces, that manufacturer provide these detailed specifications.
Overview
2.1. Operational Summary
After Query command code been issued, device enters Query mode, allowing read output Query data structure. Query data structure contains 16-bit Command Control Interface code that specifies vendorspecific control interface family flash devices. Query also contains general, common flash memory parameters vendor-specified data areas. These provide necessary information controlling Read/Write/Erase operations particular family flash devices according vendor-specified interface. additional information covered common Query data structure located vendor-specific extended Query tables, address location(s) which (are) contained general Query structure.
Hardware Interface
3.1. Query Command Interface
Query structure accessed similar existing Mode" "JEDEC access nonvolatile memories, uses different, non-conflicting command code. Query access command 98h, while JEDEC mode access mode 90h. Query addressing always relative device word (largest supported) with data always presented lowest order byte outputs). Nonvolatile memory devices assumed power read-only state. Independent that assumption, Query structure contents must able read specific address locations following single system write cycle where: Query command code written address location within device's address space maximum device bus-width), device valid read state, such "Read Array" "Read Data." Other device states exist within long sequence commands data input; such sequences must first completed terminated before writing Query command code will result valid Query data structure output. Note that devices wider than bits, valid Query access code zeroes (0's) upper bytes data bus. Thus 16-bit Query command code 0098h 32bit Query command code 00000098h.
CFI-compliant device must allow selection de-selection Query output mode from normal read array operation with single command write cycle that desired data accessible second active cycles, i.e. cycles which devices Chip Enable(s) active. Table Command Write Cycles Query Select Deselect
Command Read Array Query Cycles Oper Write Write First Cycle Address Data FFh/F0h Second Cycle Oper Address Read Read Data
Notes: "Address" location maximum device bus-width Flash devices have address sensitive query commands. Device drivers should always supply address data enter query mode, however Flash devices choose ignore address enter query mode seen data only flash vendor must define other command sequences other mode accesses part Vendorspecific Algorithm Control Interface specification referenced appropriate code. Access from Query Read Array modes from other mode require additional command sequences. Abbreviations inputs outputs second cycle refer address/data normal flash array (AA, Query structure (QA, QD), which accessed random order
Table 3.1.1 Summary Command Sequence function device mode Device type mode Command location maximum device width addresses
Command data
device mode device mode device mode device mode
0098h
Command address location bytes 154h
Command data with byte addressing
AAh: ABh: AAh: 154h: 155h: 156h: 157h: 154h: 155h: 154h:
00000098h
device mode device mode
154h 154h
Notes: system must drive lowest order addresses access device's array data when device configured mode. Therefore, word double addressing where lower addresses toggled system "Not Applicable" x8-Configured devices. Flash devices have address sensitive query commands. Device drivers should always supply address (55h, AAh, 154h respectively command address location bytes data configured devices) data enter query mode, however Flash devices choose ignore address enter query mode seen data only. Same note above change references x16.
Table 3.1.2 Example Query Command Sequence x8/x16 Capable Device with address sensitive Query Command Binary Address Binary Mode (BYTE#=0) Address Address Data A8A7A6A5A4A3A2A1 A7A6A5A4A3A2A1A0 A7A6A5A4A3A2A1A0 A6A5A4A3A2A1A0A-1 00AAh Note: Address examples provided devices with least significant byte address Table 3.1.3 Example Query Command Sequence x16/x32 Capable Device with address sensitive Query Command Binary Mode (WORD#=0) Address Address Data A9A8A7A6A5A4A3A2 A8A7A6A5A4A3A2A1 A8A7A6A5A4A3A2A1 A7A6A5A4A3A2A1A0 A7A6A5A4A3A2A1A0 A6A5A4A3A2A1A0A-1 00AAh 0098h Note: Address examples provided devices with least significant byte address Binary Address Mode (WORD#=1) Address Data 0055h 00000098h Mode (BYTE#=1) Address Data 0055h 0098h
3.2.
Query Structure Output
Query data always presented lowest-order data outputs only. numerical offset value address relative maximum width supported device. Query table device starting address byte address byte-wide (x8) device, word address word-wide (x16) device, "d-word" address device, etc. Thus byte-wide (x8) device, first bytes Query structure, ASCII, appear device addresses 11h, which same absolute byte address. These same data appear byte word addresses word-wide (x16) device. CFI-compliant device must output data upper bytes. Thus, device outputs ASCII byte (D7-D0) high byte (D15-D8). same logic extends larger devices, such that: data presented lowest byte, data addressed maximum-bus-width-relative addresses, upper bytes each data word filled with data. Thus outputs device present data during Query read, starting d-word address byte-relative address 40h. devices that x8/x16 capable, data still presented word-relative (16-bit) addresses. However, "fill data" (00h) same driven upper bytes mode. mode, byte address depending pin-out) ignored Query output that "odd byte address" high) repeats "even byte address" data low). Therefore, mode using byte addressing, such devices will output sequence "Q", "Q", "R", "R", "Y", "Y", beginning byte-relative address (which equivalent word offset mode). Again, this extensible wider devices that byte addresses ignored during Query output mode such that: Query data appears repeat each byte address within word and, Query data starts byte address times number bytes maximum device bus-width.
Table 3.2.1 Summary Query Structure Output Function Device Mode Query data Query data with Query data with Query Device type Query start with maximum device word addressing start mode location address byte maximum Bus-width addressing byte device addressing addressing bus-width ASCII equivalent addresses device 10h: 10h: mode 11h: 11h: 12h: 12h: device 10h: 0051h 20h: mode 11h: 0052h 21h: null 12h: 0059h 22h: device 20h: mode [Note [Note 21h: 22h: device 10h: 00000051h 40h: mode 41h: null 11h: 00000052h 42h: null 43h: null 12h: 00000059h 44h: device 20h: 0051h 40h: mode [Note [Note 21h: 0051h 41h: null 22h: 0052h 42h: 23h: 0052h 43h: null 44h: 45h: null 46h: device mode [Note [Note 40h: 41h: 42h: 43h: 44h:
Note system must drive lowest order addresses access device's array data when device configured mode. Therefore, word double-word addressing where these lower addresses toggled system "Not Applicable" x8-configured devices. Note Same note above change references x16.
Table 3.2.2 Example Query Structure Output x8/x16 Capable Device Binary Mode (BYTE#=1) Binary Mode (BYTE#=0) Address Address Data Address Address Data A6A5A4A3A2A1 A5A4A3A2A1A0 A5A4A3A2A1A0 A4A3A2A1A0A-1 0010h: 0051h 20h: 0011h: 0052h 21h: 0012h: 0059h 22h: 0013h: P_IDLO PrVendor 23h: 0014h: P_IDHI 24h: 0015h: P_ADRLO PrVendor 25h: 0016h: P_ADRHI TblAdr 26h: P_IDLO PrVendor 0017h: A_IDLO AltVendor 27h: P_IDLO 0018h: A_IDHI 28h: P_IDHI Note: Address examples provided devices with least significant byte address Table 3.2.3 Example Query Structure Output x16/x32 Capable Device Binary Mode (WORD#=1) Binary Mode (WORD#=0) Address Address Data Address Address Data A7A6A5A4A3A2 A6A5A4A3A2A1 A6A5A4A3A2A1 A5A4A3A2A1A0 A5A4A3A2A1A0 A4A3A2A1A0A-1 0010h: 0051h 20h: 0011h: 0052h 21h: 0012h: 0059h 22h: 0013h: P_IDLO PrVendor 23h: 0014h: P_IDHI 24h: 0015h: P_ADRLO PrVendor 25h: 0016h: P_ADRHI TblAdr 26h: P_IDLO PrVendor 0017h: A_IDLO AltVendor 27h: P_IDLO 0018h: A_IDHI 28h: P_IDHI Note: Address examples provided devices with least significant word address
AltVendor Alernate Vendor PrVendor Primary Vendor TblAdr Table Address
3.3.
3.3.1.
Query Structure
Query Structure Overview
Query command causes flash component display Query structure "database." structure sub-sections address locations summarized follows: Table 3.3.1 Query Structure Overview Offset Sub-section Name Reserved Query Identification String System Interface Information Device Geometry Definition Primary Vendor-specific Extended Query table Alternate Vendor-specific Extended Query table
Description Reserved vendor-specific information Command vendor data offset Device timing voltage information Flash device layout Vendor-defined additional information specific Primary Vendor Algorithm (optional) Vendor-defined additional information specific Alternate Vendor Algorithm (optional)
following sections describe Query structure sub-sections detail.
3.3.2.
Query Identification String
Identification String provides verification that component supports Common Flash Interface specification. Additionally, indicates which version spec which Vendor-specified command set(s) is(are) supported. Table 3.3.2 Query Identification String Offset Length Description (bytes) Query-unique ASCII string "QRY" Primary Vendor Command Control Interface Code
16-bit code defining specific Vendor-specified algorithms
[Refer Publication 100]
value
Address Primary Algorithm extended Query table
Note: Address 0000h means that extended table exists
Alternate Vendor Command Control Interface Code
second vendor-specified algorithm supported device
[Refer Publication 100]
Note: Code 0000h means that alternate algorithm employed
value
Address Alternate Algorithm extended Query table
Note: Address 0000h means that alternate extended table exists
Notes: Refer Query Data Output section Device Hardware interface detailed definition offset address function device word-width mode. specification allows replacement standard Query table contents. When Vendor Primary Algorithm extended Query table address points address between 32h, standard Query table contents assumed "replaced" those address. Thus, some standard Query replaced. example, Vendor Primary Algorithm extended Query table address means that standard Device Geometry definition been replaced. System Interface information locations assumed valid, ultimate definition must spelled appropriate specification particular vendor algorithm.
3.3.3.
Query System Interface Information
following device information useful optimizing system interface software. Table 3.3.3 Query System Interface Information Offset Length Description (bytes) Logic Supply Minimum Write/Erase voltage bits value volts bits value millivolts Logic Supply Maximum Write/Erase voltage bits value volts bits value millivolts [Programming] Supply Minimum Write/Erase voltage bits value volts bits value millivolts Note: This value must 0000h present [Programming] Supply Maximum Write/Erase voltage bits value volts bits value millivolts Note: This value must 0000h present Typical timeout single byte/word write (buffer write count microsecond Typical timeout minimum-size buffer write, microsecond supported; 00h=not supported) Typical timeout individual block erase, millisecond Typical timeout full chip erase, millisecond supported; 00h=not supported) Maximum timeout byte/word write, times typical (offset 1Fh) Maximum timeout buffer write, times typical (offset 20h) (00h=not supported) Maximum timeout individual block erase, times typical (offset 21h) Maximum timeout chip erase, times typical (offset 22h) (00h=not supported)
3.3.4.
Device Geometry Definition
This field provides critical details flash device geometry. Table 3.3.4 Device Geometry Definition Offset Length Description (bytes) Device Size number bytes. Flash Device Interface description [Refer Appendix] Maximum number bytes multi-byte write Number Erase Block Regions within device
bits number Erase Block Regions Notes: means erase blocking, i.e. device erases once "bulk." specifies number regions within device containing more contiguous Erase Blocks same size. example, 128KB device (1Mb) having blocking 16KB, 8KB, four 2KB, 16KB, 64KB considered have Erase Block Regions. Even though regions both contain 16KB blocks, fact that they contiguous means they separate Erase Block Regions. definition, symmetrical block devices have only blocking region.
Erase Block Region Information
bits where Erase Block(s) within this Region times bytes size. value used 128-byte block size. e.g. 64KB block size, 0100h bits where Number Erase Blocks identical size within Erase Block Region: e.g. D15-D0 FFFFh blocks [maximum number] means blocking blocks block") Note: value must used with block regions indicated Notes: Erase Blocks always start address Bottom Boot Uniform Version Flash Device
(k-1)
entry
Additional Erase Block Region Information, bytes region
Notes: total number blocks times individual block size must device size. address next available Query address Device Geometry structure. first possible starting address optional vendor-specific Query table(s) (i.e. Address "P," Primary Vendor-specific extended Query table offset, must This address equal offset address (address Erase Block Region plus 4*x, i.e. bytes entry times number Erase Block Region entries.
3.3.5.
Optional Vendor-Specific Extended Query Tables
Certain flash features commands optional vendor-specific algorithm specification. optional vendor-specific Query table(s) used specify this other types information. These structures defined solely flash vendor(s). Table 3.3.5a Primary Vendor-Specific Extended Query Table Offset Length Description (bytes) (P)h Primary Algorithm extended Query table unique ASCII string "PRI" (P+3)h Major version number, ASCII (P+4)h Minor version number, ASCII (P+5)h variable Vendor-specific extended Query table contents Primary Algorithm Table 3.3.5b Alternate Vendor-Specific Extended Query Table Offset Length Description (bytes) (A)h Alternate Algorithm extended Query table unique ASCII string "ALT" (A+3)h Major version number, ASCII (A+4)h Minor version number, ASCII (A+5)h variable Vendor-specific extended Query table contents Alternate Algorithm
Extensibility
specification supports extensibility future device characteristics through vendor-specific extended Query table(s). Anything defined common Query database defined vendor extended tables, with detailed structure such tables defined major minor vendor revision numbers associated vendor-supplied Command Control Interface specification. Note: This original Primary Vendor-Specific Extended Query Table definition agreed Fujitsu implemented initial device (Am29LV160B). Primary Vendor-Specific Extended Query Table Major.Minor Version (x8/x16 Device x8-Mode Used Example)
Addresses (Byte Mode) (P*2)h ((P*2)+6)h ((P*2)+8)h ((P*2)+A)h ((P*2)+C)h ((P*2)+E)h ((P*2)+10)h Data Description Query-unique ASCII string "PRI" bytes) Table Major version number, ASCII byte) Table Minor version number, ASCII byte) Address Sensitive Unlock Required, Required Erase Suspend byte) Supported, Read Only, Read Write Sector Protect byte) Supported, Number sectors group Temporary Sector Unprotect byte) Supported, Supported Sector Protect/Unprotect scheme byte) 29F040 mode, 29F016 mode, 29F400 mode, 29LV800A mode
Table
Addresses (Word Mode) (P)h (P+3)h (P+4)h (P+5)h (P+6)h (P+7)h (P+8)h
(P+9)h
((P*2)+12)h
[Refer Appendix]
(P+A)h (P+B)h (P+C)h ((P*2)+14)h ((P*2)+16)h ((P*2)+18)h Simultaneous Operation byte) Supported, Supported Burst Mode Type byte) Supported, Supported Page Mode Type byte) Supported, Word Page, Word Page
Note: This example Primary Vendor-Specific Extended Query Table definition taken from Am29LV320D. Primary Vendor-Specific Extended Query Table Major.Minor Version (x8/x16 Device x8-Mode Used Example)
Addresses (Byte Mode) (P*2)h ((P*2)+6)h ((P*2)+8)h ((P*2)+A)h ((P*2)+C)h ((P*2)+E)h ((P*2)+10)h Data Description Query-unique ASCII string "PRI" bytes) Major version number, ASCII byte) Minor version number, ASCII byte) Address Sensitive Unlock (DQ1, DQ0) Required, Required Process Technology (DQ7 DQ2) Erase Suspend byte) Supported, Read Only, Read Write Sector Protect byte) Supported, Number sectors group Temporary Sector Unprotect byte) Supported, Supported Sector Protect/Unprotect scheme byte) 29F040 mode, 29F016 mode, 29F400 mode, 29LV800A mode
Table
Addresses (Word Mode) (P)h (P+3)h (P+4)h (P+5)h (P+6)h (P+7)h (P+8)h
(P+9)h
((P*2)+12)h
[Refer Appendix]
(P+A)h (P+B)h (P+C)h (P+D)h ((P*2)+14)h ((P*2)+16)h ((P*2)+18)h ((P*2)+1A)h Simultaneous Operation byte) Supported, Number sectors bank (uniform sector bank) Burst Mode Type byte) Supported, Supported Page Mode Type byte) Supported, Word Page, Word Page [Acceleration] Supply Minimum byte) Bits Value Volts Bits Value Millivolts [Acceleration] Supply Maximum byte) Bits Value Volts Bits Value Millivolts Top/Bottom Boot Sector Flag byte) Bottom boot device, boot device, Uniform Bottom Protect, Uniform, Protect NOTE: Because early version devices (prior table revision 1.1) support this field: number erase block regions this field 00h: refer device code Top/Bottom boot version Am29LV160 Am29LV116
(P+E)h
((P*2)+1C)h
(P+F)h
((P*2)+1E)h
Note: This example Primary Vendor-Specific Extended Query Table definition taken from Am29DL322D. Primary Vendor-Specific Extended Query Table Major.Minor Version (x8/x16 Device x8-Mode Used Example)
Addresses (Byte Mode) (P*2)h ((P*2)+6)h ((P*2)+8)h ((P*2)+A)h ((P*2)+C)h ((P*2)+E)h ((P*2)+10)h Data Description Query-unique ASCII string "PRI" bytes) Major version number, ASCII byte) Minor version number, ASCII byte) Address Sensitive Unlock (DQ1, DQ0) Required, Required Process Technology (DQ7 DQ2) Erase Suspend byte) Supported, Read Only, Read Write Sector Protect byte) Supported, Number sectors group Temporary Sector Unprotect byte) Supported, Supported Sector Protect/Unprotect scheme byte) 29F040 mode, 29F016 mode, 29F400 mode, 29LV800A mode
Table
Addresses (Word Mode) (P)h (P+3)h (P+4)h (P+5)h (P+6)h (P+7)h (P+8)h
(P+9)h
((P*2)+12)h
[Refer Appendix]
(P+A)h (P+B)h (P+C)h (P+D)h ((P*2)+14)h ((P*2)+16)h ((P*2)+18)h ((P*2)+1A)h Simultaneous Operation byte) Supported, Number Sectors bank (uniform sector bank) Burst Mode Type byte) Supported, Supported Page Mode Type byte) Supported, Word Page, Word Page [Acceleration] Supply Minimum byte) Bits Value Volts Bits Value Millivolts [Acceleration] Supply Maximum byte) Bits Value Volts Bits Value Millivolts Top/Bottom Boot Sector Flag byte) Device without control 8x8kb Sectors bottom with control Bottom boot device, boot device, Uniform Bottom Protect, Uniform, Protect number erase block regions Ignore this field Program Suspend Supported Supported
(P+E)h
((P*2)+1C)h
(P+F)h
((P*2)+1E)h
(P+10)h
((P*2)+20)h
Note: This example Primary Vendor-Specific Extended Query Table definition taken from Am29LV640MU. Primary Vendor-Specific Extended Query Table Major.Minor Version (x8/x16 Device x8-Mode Used Example)
Addresses (Byte Mode) (P*2)h ((P*2)+6)h ((P*2)+8)h Data Description Query-unique ASCII string "PRI" bytes) Major version number, ASCII byte) Minor version number, ASCII byte) Address Sensitive Unlock (DQ1, DQ0) Required, Required Process Technology (DQ5 DQ2) 0000 CS49 0001 CS59 0010 CS99 Erase Suspend byte) Supported, Read Only, Read Write Sector Protect byte) Supported, Number sectors group Temporary Sector Unprotect byte) Supported, Supported Sector Protect/Unprotect scheme byte) [Refer Appendix] 29F040 mode, 29F016 mode, 29F400 mode, 29LV800A mode 29BDS640 mode (Software Command Locking) 29BDD160 mode (New Sector Protect) 29PDL128 mode (New Sector Protect) 29LV800A mode Simultaneous Operation byte) Supported, Total number sectors banks except Boot Bank Burst Mode Type byte) Supported, Supported Page Mode Type byte) Supported, Word Page, Word Page [Acceleration] Supply Minimum byte) Bits Value Volts Bits Value Millivolts [Acceleration] Supply Maximum byte) Bits Value Volts Bits Value Millivolts Top/Bottom Boot Sector Flag byte) Device without control 8x8kb Sectors bottom with control Bottom boot device boot device Uniform, Bottom Protect Uniform, Protect number erase block regions Ignore this field
Table
Addresses (Word Mode) (P)h (P+3)h (P+4)h
(P+5)h
((P*2)+A)h
(P+6)h (P+7)h (P+8)h
((P*2)+C)h ((P*2)+E)h ((P*2)+10)h
(P+9)h
((P*2)+12)h
(P+A)h (P+B)h (P+C)h (P+D)h
((P*2)+14)h ((P*2)+16)h ((P*2)+18)h ((P*2)+1A)h
(P+E)h
((P*2)+1C)h
(P+F)h
((P*2)+1E)h
(P+10)h (P+11)h (P+12)h (P+13)h (P+14)h (P+15)h (P+16)h (P+17)h (P+18)h (P+19)h (P+1A)h (P+1B)h (P+1C)h (P+1D)h (P+1E)h (P+1F)h
((P*2)+20)h ((P*2)+22)h ((P*2)+24)h ((P*2)+26)h ((P*2)+28)h ((P*2)+3A)h ((P*2)+3C)h ((P*2)+3E)h ((P*2)+40)h ((P*2)+42)h ((P*2)+44)h ((P*2)+46)h ((P*2)+48)h ((P*2)+4A)h ((P*2)+4C)h ((P*2)+4E)h
Program Suspend Supported Supported RESERVED FUTURE RESERVED FUTURE RESERVED FUTURE RESERVED FUTURE RESERVED FUTURE RESERVED FUTURE Bank Organization byte) data zero Number banks Bank Region Information byte) Number sectors Bank Bank Region Information byte) Number sectors Bank Bank Region Information byte) Number sectors Bank Bank Region Information byte) Number sectors Bank RESERVED FUTURE RESERVED FUTURE RESERVED FUTURE RESERVED FUTURE
APPENDIX Device Interface Note: April 2000 x16/x32 devices will represented value 0005h requested Intel order make them more software friendly. Changes will made drivers that bit-wise switch created represent different data widths. following actual bit-wise switch: represents represents represents These bits created drivers what read location 28h. device x8/x16 device resulting bit-wise pattern read 0010b, since 0001b added values drivers create 0011b. this case: (TRUE) because supports (TRUE) because supports (FALSE) because does support example, take description x16/x32 device (0005h) convert that binary 0101b. this value pattern that looks like this: 0110b. This bit-wise switch indicates that device x16/x32 device. (FALSE) because does supports (TRUE) because supports (TRUE) because supports Sector Protect/Unprotect Schemes August 2001 Software Command Locking Sector Protection schemes were added newer parts. 29F040 mode External Programmer Programmer Protect apply voltage (12V) pins OE#, 98403 98406 Programmer Unprotect apply voltages OE#, 98401 Programmer Unprotect apply voltages OE#, CE#, Addresses A18:A16 used identify eight sectors
29F016 mode External Programmer Programmer Protect apply voltage (12V) pins OE#, RESET#, CE#, Programmer Unprotect apply voltages OE#, RESET#, Addresses A20:A18 used identify eight sector groups 29F400 mode Am29F400 implements only "Temporary Sector Unprotect" device operation Device Operation Temporary Sector Unprotect apply voltage RESET# External Programmer Programmer Protect apply voltage pins 29LV800 mode Am29LV800 implements "Sector Protect" "Sector Unprotect" device operations, addition Am29F400. 29BDS640 mode (Software Command Locking) Am29BDS640 implements Software Command Locking scheme. Software Command Locking scheme implements functionality Vcc-level. This scheme uses Sector Lock/Unlock command definition lock unlock sectors through software without having high voltage method apparent older devices. 29BDD160 mode (New Sector Protect) Am29BDD160 implements Sector Protect scheme. Sector Protect scheme involves parts: "Persistent Sector Protection" "Password Sector Protection" methods. Persistent Sector Protection method allows persistent dynamic protection individual sectors sector groups. Password Sector Protection method acts One-Time Programmable scheme where password given modification protection status sectors sector groups. 29PDL128 mode (New Sector Protect 29LV800) Am29PDL128 implements Sector Protect scheme with security features from 29LV800 incorporated also.

Release December 2001 Place, Sunnyvale, 94088-3453 SPEC

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