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AthlonProcessor DuronProcessor with Full-Speed On-Die Cache
Enabling Innovative Cache Architecture Personal Computing
ADVANCED MICRO DEVICES, INC.
Place Sunnyvale, 94088
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Athlon Processor Performance-Enhancing Cache
June 2000
Introduction: AthlonProcessor with Full-Speed On-Die Cache
introduction, Athlonprocessor marked arrival world's first seventh-generation microarchitecture doing performance standard processors. Among processor's award-winning architectural features revolutionary 200MHz, 1.6Gbytes/sec system bus, fully pipelined, superscalar floating point engine, enhanced version AMD's 3DNow!technology. Additionally, processor offers 128KB cache-four times cache competing processors-along with 512KB external backside cache running half speed processor core. With versions Athlon processor, however, improved overall system performance integrating processor's cache directly onto processor die. This white paper describes benefits utilizing Athlon processor with full-speed on-die cache. Athlon processor boasts three times full-speed on-die cache previous Athlon processors. processor features 128KB cache-plus 256KB full-speed, on-die cache-for total internal system cache 384KB. On-die cache allows cache speed scale with processor speed one-toone, enabling more substantial level performance across broad range memoryintensive applications. Additionally, integration cache onto eliminates need external, high-performance cache SRAM, enabling form factor. With Athlon processor's migration 0.18-micron process technology completed, processor's integrated cache design does significantly change size die, maintaining ease manufacture. advanced 0.18-micron manufacturing process enables smaller transistor sizes comparison 0.25-micron process. Therefore, space penalty integration cache minimal, cache accounts only entire processor die. Athlon processor's 37million-transistor-die ~120 compared ~102 size original Athlon processor.
Benefits "Exclusive" Cache Architecture
Athlon processor with full-speed on-die cache features exclusive cache architecture opposed inclusive cache architecture utilized previousgeneration processors.
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Athlon Processor Performance-Enhancing Cache
June 2000
inclusive cache architecture requires cache duplicate every cache block held processor's cache. More specifically, every cache block inclusive cache architecture's cache, cache must contain same redundant data, thereby decreasing effective cache available information. Therefore, assuming cache 32KB, that processor's inclusive cache size effectively 32KB smaller than given physical size. contrast, with exclusive cache architecture, cache contains only victim copy-back cache blocks that written back memory subsystem result conflict miss. These terms, victim copy-back, refer cache blocks that were previously held cache overwritten (evicted) make room newer data. Athlon processor, this exclusive cache architecture enables full 256KB cache 128KB cache total dedicated storage space 384KB. Regardless cache architecture, primary function cache store frequently used data that easily accessed processor. This enables high cache rate, defined percentage time that requested data will found cache instead main memory. larger cache, greater advantage overall processor performance. Should cache become filled, evicted victim copyback cache block simply moved cache. This keeps once often-used data close processor opposed having moved main memory. same time, because exclusive architecture, cache does waste space duplicating contents cache.
Improved Cache Efficiency through Lower Latency, Increased Bandwidth Greater Associativity
Latency
When compared previous-generation processors, Athlon processor's internal cache, with large cache exclusive cache architecture, more likely contain requested data. Data found cache used sooner than data main memory. Therefore, cache said have lower latency. With more data cache, overall system latency-the time required access next piece critically needed memory-is lower. Consequently, overall system performance higher. Integrating cache onto processor significantly lowers latency, takes much less time move data across than required read from external SRAM. lower latency, shorter response-time required receipt
Page Athlon Processor Performance-Enhancing Cache June 2000
requested data. Athlon processor with full-speed on-die cache delivers more than lower latency compared previous Athlon processors. This latency part on-die nature cache memory well processor's exclusive cache architecture-an architecture found original Athlon processor previous-generation processors. average cache latency Athlon processor often cannot properly determined using today's common cache-testing utilities. These types cache utilities typically measure latencies terms worst-case delays, which rarely encountered real-world applications. Additionally, exclusive cache architecture Athlon processor, testing methodology these utilities must altered order obtain accurate latency average. Athlon processor's victim buffer contains data evicted from cache. features eight 64-byte entries, where each entry corresponds 64-byte cache line. It's important note that Athlon processor's caches work with 64-byte cache lines, equal twice Pentium processor's 32-byte cache line capability. large (128 capacity, Athlon processor's cache capable efficiently handling most requests data. result, victim buffer drained during idle cycles cache interface. real-world applications, Athlon processor's victim buffer rarely full. Consequently, load-use latency will only cycles-which includes cycle miss access. actual time takes cache provide first critical word back after receives request cycles, shown Figure below.
cycle miss
cycle
128KB first critical word Cache
Figure AthlonProcessor "Victim Buffer Full"
Page Athlon Processor Performance-Enhancing Cache June 2000
256KB Exclusive Cache
Figure below shows latency each step miss/L2 scenario when victim buffer full. When victim buffer reaches capacity there miss/L2 hit, victim data then copied from victim buffer back cache-resulting worst-case delay scenario that older cache-testing utilities typically report.
Victim Buffer Full
256KB Exclusive Cache
cycle transfer
cycle turnaround
parallel transfer
128KB Cache
cycle first critical word
cycle turnaround
Figure AthlonProcessor "Victim Buffer Full"
Properly measured, true latency Athlon processor between clock cycles, depending processor activity. Under real-world application workloads, average cache latency Athlon processor rests approximately clock cycles. Athlon processor's large cache exclusive cache architecture contribute processor's clock-for-clock performance advantage over Intel's Pentium® processor.1
Cache Bandwidth
increase cache speed enabled integration cache onto processor increases cache bandwidth 300% over previous Athlon processors. Higher bandwidths allow processor work more data over same
specific benchmark results, visit
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Athlon Processor Performance-Enhancing Cache
June 2000
amount time. example, previous 1000MHz Athlon processor requires 24ns clocks transfers) transfer 64-byte cache line while Athlon processor only requires 8ns. Unlike competing processors-including Intel's Pentium processor-the Athlon processor features cache large enough enable high rate while significantly reducing minimizing bandwidth demands processor's cache. this reason, expanding width bus-currently bits-offers little benefit overall performance. Emphasizing high cache rates enabled Athlon processor's large cache exclusive cache architecture, extensive application performance testing shows that increasing width from bits bits offers little significant impact overall processor performance. Processors with much smaller caches need refilled more often typically require higher bandwidth interface help offset shortcomings their small cache size.
Associativity
Athlon processor's 16-way associative cache eight times more associative than previous Athlon processors which feature 2-way associative cache. Increasing associativity increases rate reducing data conflicts. This translates into more possible locations which important data reside without having throw away other often-used data cache. requested data found cache memory, processor must search main memory. Because main memory limited lower speeds-currently faster than 133MHz-cache hits significantly improve average memory access. more effective cache, better average memory performance, more improved overall application performance.
Fill Buffers, Queue Entries Write-Back Buffers
Athlon processor, like previous Athlon processors, includes eight fill buffers, eight queue entries, eight write-back buffers. Intel's Pentium processor only fill buffers, eight queue entries, four write-back buffers. more buffers that dedicated holding data microprocessor process, less likely processor will stall while waiting data delivered processor. Likewise, more buffers that available more likely that data assigned buffer execution, thereby increasing data-processing speed. These architectural features contribute Athlon processor's ability execute near peak bandwidth GB/s.
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Athlon Processor Performance-Enhancing Cache
June 2000
DuronProcessor
This white paper details features benefits specific Athlon processor. should noted, however, that with exception smaller 64KB cache, Duronprocessor's cache architecture identical that Athlon processor with full-speed on-die cache.
Summary: Enabling Improved Performance Memory-Intensive Applications
Featuring world's first seventh-generation microarchitecture, Athlon processor among most powerful processors high-performance desktop PCs. With cache integrated onto die, Athlon processor performance taken step further. Through exclusive low-latency cache architecture high associativity, Athlon processor enables improved level performance broad range memory-intensive applications. These applications include business personal productivity suites, multimedia entertainment software, still/video image-manipulation applications, with most significant performance gains occurring high-end CAD/CAM applications. These wideranging performance improvements demonstrate AMD's continuing ability provide reliable, high-performance processing solutions both consumer desktop enterprise computing systems.
Overview
(NYSE: AMD) global supplier integrated circuits personal networked computer communications markets. produces processors, flash memories, products communications networking applications. world's second-leading supplier Windows® compatible processors, shipped more than million microprocessors, including more than million Windows compatible CPUs. Founded 1969 based Sunnyvale, California, sales marketing offices worldwide manufacturing facilities Sunnyvale; Austin, Texas; Dresden, Germany; Bangkok, Thailand; Penang, Malaysia; Singapore; Aizu-Wakamatsu, Japan. revenues $2.8 billion 1999.
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Athlon Processor Performance-Enhancing Cache
June 2000
Cautionary Statement
This release contains forward-looking statements, which made pursuant safe harbor provisions Private Securities Litigation Reform 1995. Forward-looking statements generally preceded words such "expects," "plans," "believes," "anticipates," "intends." Investors cautioned that forward-looking statements this document involve risks uncertainty that could cause actual results differ materially from current expectations. Forward-looking statements this document about Athlon processor involve risk that Athlon system will support requirements nextgeneration system platforms; that successful developing infrastructure support processor; that third parties provide peripherals infrastructure support processor processor's system bus; that processor will achieve customer market acceptance. urge investors review detail risks uncertainties company's Securities Exchange Commission filings, including most recently filed Form-10K.
AMD, logo, Athlon combinations thereof, 3DNow! trademarks Advanced Micro Devices, Inc. Windows registered trademark Microsoft Corporation. Pentium registered trademark Intel Corporation. Other product names used this publication identification purposes only trademarks their respective companies.
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Athlon Processor Performance-Enhancing Cache
June 2000
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