BiMOS Operational Amplifier with MOSFET Input/Bipolar Output CA31
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CA3140
BiMOS Operational Amplifier with MOSFET Input/Bipolar Output
CA3140A CA3140 integrated circuit operational amplifiers that combine advantages high voltage PMOS transistors with high voltage bipolar transistors single monolithic chip. Because this unique combination technologies, this device provide designers, first time, with special performance features CA3130 CMOS operational amplifiers versatility series industry standard operational amplifiers. CA3140A CA3140 BiMOS operational amplifiers feature gate protected MOSFET (PMOS) transistors input circuit provide very high input impedance, very input current, high speed performance. CA3140A CA3140 operate supply voltage from (either single dual supply). These operational amplifiers internally phase compensated achieve stable operation unity gain follower operation, additionally, have access terminal supplementary external capacitor additional frequency roll-off desired. Terminals also provided applications requiring input offset voltage nulling. PMOS field effect transistors input stage results common mode input voltage capability down 0.5V below negative supply terminal, important attribute single supply applications. output stage uses bipolar transistors includes built-in protection against damage from load terminal short circuiting either supply rail ground. CA3140 Series same 8-lead pinout used "741" other industry standard amps. CA3140A CA3140 intended operation supply voltages (±18V).
April 1994
Features
MOSFET Input Stage Very High Input Impedance (ZIN) -1.5T (Typ.) Very Input Current (Il) -10pA (Typ.) ±15V Wide Common Mode Input Voltage Range (VlCR) Swung 0.5V Below Negative Supply Voltage Rail Output Swing Complements Input Common Mode Range Directly Replaces Industry Type Most Applications
Applications
Ground-Referenced Single Supply Amplifiers Automobile Portable Instrumentation Sample Hold Amplifiers Long Duration Timers/Multivibrators (µseconds-Minutes-Hours) Photocurrent Instrumentation Peak Detectors Active Filters Comparators Interface Systems Other Supply Voltage Systems Standard Operational Amplifier Applications Function Generators Tone Controls Power Supplies Portable Instruments Intrusion Alarm Systems
Ordering Information
PART NUMBER CA3140AE CA3140AM CA3140AS CA3140AT CA3140BT CA3140E CA3140M CA3140M96 CA3140T TEMP. RANGE -55oC +125oC -55oC +125oC -55o +125
PACKAGE Lead Plastic Lead SOIC Can, Lead Formed Lead Plastic Lead SOIC Lead SOIC*
-55oC +125oC -55oC +125oC -55oC +125oC -55oC +125oC -55oC +125oC -55oC +125oC
Denotes Tape Reel
Pinouts
CA3140 (TO-5 STYLE CAN) VIEW
OFFSET NULL INV. INPUT NON-INV. INPUT OUTPUT STROBE OFFSET NULL INV. INPUT
CA3140 (PDIP, SOIC) VIEW
STROBE OUTPUT OFFSET NULL
NON-INV. INPUT
OFFSET NULL CASE
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright
Harris Corporation 1993
File Number
957.2
2-123
Specifications CA3140, CA3140A
Absolute Maximum Ratings
Supply Voltage (Between Terminals). Differential Mode Input Voltage Input Voltage .(V+ +8V) -0.5V) Input Terminal Current Output Short Circuit Duration* Indefinite Junction Temperature +175oC Junction Temperature (Plastic Package) +150oC Lead Temperature (Soldering Sec.). +300oC Short circuit applied ground either supply.
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
Operating Conditions
OperatingTemperature Range (All Types). -55oC +125oC Storage Temperature Range (All Types). -65oC +150oC
Electrical Specifications
PARAMETERS
+15V, -15V, +25oC SYMBOL TEST CONDITIONS Typical Value Resistor Between Term. Adjust Max. 140kHz 1kHz CA3140A CA3140 UNITS
Input Offset Voltage Adjustment Resistor
Input Resistance Input Capacitance Output Resistance Equivalent Wideband Input Noise Voltage (See Figure Equivalent Input Noise Voltage (See Figure
nV/Hz nV/Hz
Short Circuit Current Opposite Supply Source Sink Gain-Bandwidth Product, (See Figures Slew Rate, (See Figure Sink Current From Terminal Terminal Swing Output Transient Response: Rise Time Overshoot (See Figure Settling Time VP-P, (See Figure 10mV 100pF Voltage Follower 100pF 0.08 0.08 IOM+ IOMfT V/µs
2-124
Specifications CA3140, CA3140A
Electrical Specifications
Equipment Design. 15V, 15V, +25oC, Unless Otherwise Specified LIMITS CA3140A PARAMETERS Input Offset Voltage Input Offset Current Input Current Large Signal Voltage Gain (Note (See Figures SYMBOL |VIO| |IIO| Common Mode Rejection Ratio (See Figure CMRR Common Mode Input Voltage Range (See Figure VICR -15.5 +12.5 -14.4 CA3140 -15.5 +12.5 -14.4 UNITS kV/V µV/V
Power-Supply Rejection Ratio, VIO/VS (See Figure
PSRR
µV/V µV/oC
Max. Output Voltage (Note (See Figures
VOM+ VOM-
Supply Current (See Figure Device Dissipation Input Offset Voltage Temp. Drift, VIO/T NOTES: 26Vp-p, +12V,
Electrical Specifications
Design Guidance. +25oC SYMBOL |VIO| |IIO| CA3140A CA3140 UNITS kV/V
PARAMETERS Input Offset Voltage Input Offset Current Input Current Input Resistance Large Signal Voltage Gain (See Figures
2-125
Specifications CA3140, CA3140A
Electrical Specifications
Design Guidance. +25oC (Continued) SYMBOL CMRR CA3140A Common Mode Input Voltage Range (See Figure VICR -0.5 Power Supply Rejection Ratio PSRR VI0/VS Maximum Output Voltage (See Figures VOM+ VOMMaximum Output Current: Source Sink Slew Rate (See Figure Gain-Bandwidth Product (See Figure Supply Current (See Figure Device Dissipation Sink Current from Term. Term. Swing Output IOM+ IOMSR V/µs 0.13 CA3140 -0.5 0.13 UNITS µV/V µV/V
PARAMETERS Common Mode Rejection Ratio,
2-126
CA3140A, CA3140 Block Diagram
BIAS CIRCUIT CURRENT SOURCES REGULATOR INPUT 200µA 1.6mA 200µA 10,000 12pF STROBE V2µA
OUTPUT
OFFSET NULL
Schematic Diagram
BIAS CIRCUIT INPUT STAGE SECOND STAGE OUTPUT STAGE DYNAMIC CURRENT SINK
OUTPUT INVERTING INPUT NON-INVERTING INPUT 12pF
OFFSET NULL RESISTANCE VALUES
STROBE
2-127
CA3140A, CA3140 Circuit shown block diagram, input terminals operated down 0.5V below negative supply rail. class amplifier stages provide voltage gain, unique class amplifier stage provides current gain necessary drive low-impedance loads. biasing circuit provides control cascoded constant current flow circuits first second stages. CA3140 includes chip phase compensating capacitor that sufficient unity gain voltage follower configuration. Input Stages schematic diagram consists differential input stage using PMOS field-effect transistors (Q9, Q10) working into mirror pair bipolar transistors (Q11, Q12) functioning load resistors together with resistors through mirror pair transistors also function differential-to-singleended converter provide base current drive second stage bipolar transistor (Q13). Offset nulling, when desired, effected with potentiometer connected across terminals with slider connected terminal Cascode connected bipolar transistors constant current source input stage. base biasing circuit constant current source described subsequently. small diodes provide gate oxide protection against high voltage transients, e.g., static electricity. Second Stage Most voltage gain CA3140 provided second amplifier stage, consisting bipolar transistor cascode connected load resistance provided bipolar transistors On-chip phase compensation, sufficient majority applications provided Additional Miller-Effect compensation (roll off) accomplished, when desired, simply connecting small capacitor between terminals Terminal also used strobe output stage into quiescence. When terminal tied negative supply rail (terminal mechanical electrical means, output terminal swings low, i.e., approximately terminal potential. Output Stage CA3140 Series circuits employ broad band output stage that sink loads negative supply complement capability PMOS input stage when operating near negative rail. Quiescent current emitter-follower cascade circuit (Q17, Q18) established transistors (Q14, Q15) whose base currents "mirrored" current flowing through diode bias circuit section. When CA3140 operating such that output terminal sourcing current, transistor functions emitterfollower source current from (terminal R11. Under these conditions, collector potential sufficiently high permit necessary flow base current emitter follower which, turn, drives Q18. When CA3140 operating such that output terminal sinking current bus, transistor current sinking element. Transistor mirror connected with current Q21, R12, Q20. Transistor Q20, turn, biased current flow through R13, zener R14. dynamic current sink controlled voltage level sensing. purposes explanation, assumed that output terminal quiescently established potential midpoint between supply rails. When output current sinking mode operation required, collector potential transistor driven below quiescent level, thereby causing Q17, decrease output voltage terminal Thus, gate terminal PMOS transistor displaced toward bus, thereby reducing channel resistance Q21. consequence, there incremental increase current flow through Q20, R12, Q21, base Q16. result, sinks current from terminal direct response incremental change output voltage caused Q18. This sink current flows regardless load; excess current internally supplied emitter-follower Q18. Short circuit protection output circuit provided Q19, which driven into conduction high voltage drop developed across under output short circuit conditions. Under these conditions, collector diverts current from reduce base current drive from Q17, thereby limiting current flow short circuited load terminal. Bias Circuit Quiescent current stages (except dynamic current sink) CA3140 dependent upon bias current flow function bias circuit establish maintain constant current flow through diode connected transistor mirror connected parallel with base emitter junctions considered current sampling diode that senses emitter current automatically adjusts base current (via maintain constant current through base currents also determined constant current flow Furthermore, current diode connected transistor establishes currents transistors Q15.
2-128
CA3140, CA3140A Metallization Mask Layout
58-66 (1.473-1.676)
4-10 (0.102-0.254) 62-70 (1.575-1.778)
Dimensions parenthesis millimeters derived from basic inch dimensions indicated. Grid graduations mils (10-3 inch). photographs dimensions represent chip when part wafer. When wafer into chips, cleavage angles instead with respect face chip. Therefore, isolated chip actually mils (0.17mm) larger both dimensions.
Typical Performance Curves
GAIN BANDWIDTH PRODUCT (MHz) OPEN-LOOP VOLTAGE GAIN (dB) 100pF
-55oC +25oC +125oC
+25oC -55oC +125oC
SUPPLY VOLTAGE
SUPPLY VOLTAGE
FIGURE OPEN LOOP VOLTAGE GAIN SUPPLY VOLTAGE TEMPERATURE
FIGURE GAIN BANDWIDTH PRODUCT SUPPLY VOLTAGE TEMPERATURE
2-129
CA3140, CA3140A Typical Performance Curves (Continued)
100pF QUIESCENT SUPPLY CURRENT (mA) -55oC +25oC +125oC
SLEW RATE (V/µs)
+25oC +125oC -55oC
SUPPLY VOLTAGE
SUPPLY VOLTAGE
FIGURE SLEW RATE SUPPLY VOLTAGE TEMPERATURE
FIGURE QUIESCENT SUPPLY CURRENT SUPPLY VOLTAGE TEMPERATURE
OUTPUT SWING (VP-P)
COMMON-MODE REJECTION RATIO (dB)
SUPPLY VOLTAGE: 15V, -15V +25oC
SUPPLY VOLTAGE: 15V, -15V +25oC
CA3140B
CA3140, CA3140A
100K FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE MAXIMUM OUTPUT VOLTAGE SWING FREQUENCY
1000 EQUIVALENT INPUT NOISE VOLTAGE (nVHz)
FIGURE COMMON MODE REJECTION RATIO FREQUENCY
POWER SUPPLY REJECTION RATIO (dB)
SUPPLY VOLTAGE: 15V, -15V +25oC
SUPPLY VOLTAGE: 15V, -15V +25oC CA3140B CA3140, CA3140A +PSRR
-PSRR
POWER SUPPLY REJECTION RATIO (PSRR) VIO/VS
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE EQUIVALENT INPUT NOISE VOLTAGE FREQUENCY
FIGURE POWER SUPPLY REJECTION RATIO FREQUENCY
2-130
CA3140, CA3140A Applications Considerations
Wide dynamic range input output characteristics with most desirable high input impedance characteristics achieved CA3140 unique design based upon PMOS Bipolar process. Input common mode voltage range output swing capabilities complementary, allowing operation with single supply down wide dynamic range these parameters also means that this device suitable many single supply applications, such example, where input driven below potential terminal phase sense output signal must maintained most important consideration comparator applications. Output Circuit Considerations
OFFSET-VOLTAGE SHIFT (mV)
Figure shows output current sinking capabilities CA3140 various supply voltages. Output voltage swing negative supply rail permits this device operate both power transistors thyristors directly without need level shifting circuitry usually associated with series operational amplifiers. Figure shows some typical configurations. Note that series resistor, used both cases limit drive available driven device. Moreover, recommended that series diode shunt diode used thyristor input prevent large negative transient surges that appear gate thyristors, from damaging integrated circuit.
DIFFERENTIAL VOLTAGE (ACROSS TERMS OUTPUT VOLTAGE 1000 1500 2000 2500 3000 3500 4000 4500 TIME (HOURS)
Excellent interfacing with circuitry easily achieved with single 6.2V zener diode connected terminal shown Figure This connection assures that maximum output signal swing will more positive than zener voltage minus base-to-emitter voltage drops within CA3140. These voltages independent operating supply voltage.
CA3140 6.2V LOGIC SUPPLY TYPICAL GATE
+125oC TO-5 PACKAGES DIFFERENTIAL VOLTAGE (ACROSS TERMS OUTPUT STAGE TOGGLED
FIGURE TYPICAL INCREMENTAL OFFSET VOLTAGE SHIFT OPERATING LIFE
Offset Voltage Nulling
FIGURE ZENER CLAMPING DIODE CONNECTED TERMINALS LIMIT CA3140 OUTPUT SWING LEVELS
1000 OUTPUT STAGE TRANSISTOR (Q15, Q16) SATURATION VOLTAGE (mV)
SUPPLY VOLTAGE (V-) +25oC
SUPPLY VOLTAGE (V+)
input offset voltage nulled connecting potentiometer between terminals returning wiper terminal Figure 12(A). This technique, however, gives more adjustment range than required therefore, considerable portion potentiometer rotation fully utilized. Typical values series resistors that placed either potentiometer, Figure 12(B), optimize utilization range given table "Electrical Specifications" shown this bulletin. alternate system shown Figure 12(C). This circuit uses only additional resistor approximately value shown table. potentiometers, which resistance does drop zero either rotation, value resistance lower than values shown table should used. Voltage Operation
+15V +30V
0.01
LOAD (SINKING) CURRENT (mA)
FIGURE VOLTAGE ACROSS OUTPUT TRANSISTORS LOAD CURRENT
Operation total supply voltages possible with CA3140. current regulator based upon PMOS threshold voltage maintains reasonable constant operating current hence consistent performance down these lower voltages. voltage limitation occurs when upper extreme input common mode voltage range extends down
2-131
CA3140, CA3140A
CA3140 CA3140 CA3140
BASIC
IMPROVED RESOLUTION FIGURE THREE OFFSET VOLTAGE NULLING METHODS
SIMPLER IMPROVED RESOLUTION
LOAD LOAD 120VAC CA3140
LOAD
CA3140
FIGURE METHODS UTILIZING VCE(SAT) SINKING CURRENT CAPABILITY CA3140 SERIES
FOLLOWER +15V LOAD RESISTANCE (RL) LOAD CAPACITANCE (CL) 100pF SUPPLY VOLTAGE: +15V, -15V +25oC INPUT VOLTAGE
CA3140
0.1µF
SIMULATED LOAD 100pF
0.1µF 10mV 10mV 0.05µF FOLLOWER INVERTING INVERTING +15V 10mV
-15V
10mV
0.1µF CA3140
SIMULATED LOAD 100pF
SETTLING TIME (µs)
4.99k -15V
0.1µF 5.11k
SETTLING POINT IN914 IN914
TEST CIRCUITS FIGURE INPUT VOLTAGE SETTLING TIME
2-132
CA3140, CA3140A
voltage terminal This limit reached total supply voltage just below output voltage range also begins extend down negative supply rail, slightly higher than that input. Figure shows these characteristics shows that with dual supplies, lower extreme input common mode voltage range below ground potential. Bandwidth Slew Rate those cases where bandwidth reduction desired, example, broadband noise reduction, external capacitor connected between terminals reduce open loop -3dB bandwidth. slew rate will, however, also proportionally reduced using this additional capacitor. Thus, reduction bandwidth this technique will also reduce slew rate about 20%. Figure shows typical settling time required reach 10mV final value various levels large signal inputs voltage follower inverting unity gain
-105 -120 -135 -150 100pF OPEN LOOP PHASE (DEGREES)
amplifiers. exceptionally fast settling time characteristics largely high combination high gain wide bandwidth CA3140; shown Figure Input Circuit Considerations mentioned previously, amplifier inputs driven below terminal potential, series current limiting resistor recommended limit maximum input terminal current less than prevent damage input protection circuitry. Moreover, some current limiting resistance should provided between inverting input output when CA3140 used unity gain voltage follower. This resistance prevents possibility extremely large input signal transients from forcing signal through input protection network directly driving internal constant current source which could result positive feedback output terminal. 3.9k resistor sufficient.
SUPPLY VOLTAGE: 15V, -15V
OPEN LOOP VOLTAGE GAIN (dB)
SUPPLY VOLTAGE: 15V, -15V +25oC
INPUT CURRENT (pA)
FREQUENCY (Hz)
AMBIENT TEMPERATURE (oC)
FIGURE OPEN LOOP VOLTAGE GAIN PHASE FREQUENCY
FIGURE INPUT CURRENT AMBIENT TEMPERATURE
INPUT OUTPUT VOLTAGE EXCURSIONS FROM TERMINAL (V+)
-0.5 +VICR +VICR +25oC -1.0 -55oC
INPUT OUTPUT VOLTAGE EXCURSIONS FROM TERMINAL (V-)
-0.5 -1.0 -1.5 -VOUT
+125oC
+VOUT +125oC +VOUT +25oC +VOUT -55oC
-VICR +125oC -VICR +25oC -VICR -55oC +125oC
-1.5 -2.0 -2.5 -3.0
SUPPLY VOLTAGE (V+,
SUPPLY VOLTAGE (V+,
FIGURE OUTPUT VOLTAGE SWING CAPABILITY COMMON MODE INPUT VOLTAGE RANGE SUPPLY VOLTAGE TEMPERATURE
2-133
CA3140, CA3140A
typical input current order 10pA when inputs centered nominal device dissipation. output supplies load current, device dissipation will increase, raising chip temperature resulting increased input current. Figure shows typical input terminal current versus ambient temperature CA3140. well known that MOSFET devices exhibit slight changes characteristics (for example, small changes input offset voltage) application large differential input voltages that sustained over long periods elevated temperatures. Both applied voltage temperature accelerate these changes. process reversible offset voltage shifts opposite polarity reverse offset. Figure shows typical offset voltage change function various stress voltages maximum rating +125oC (for TO-5); lower temperatures (TO-5 plastic), example, +85oC, this change voltage considerably less. typical linear applications, where differential voltage small symmetrical, these incremental changes about same magnitude those encountered operational amplifier employing bipolar transistor input stage. Super Sweep Function Generator function generator having wide tuning range shown Figure 1,000,000/1 adjustment range accomplished single variable potentiometer auxiliary sweeping signal. CA3140 functions non-inverting readout amplifier triangular signal developed across integrating capacitor network connected output CA3080A current source. Buffered triangular output signals then applied second CA3080 functioning high speed hysteresis switch. Output from switch returned directly back input CA3080A current source, thereby, completing positive feedback loop triangular output level determined four 1N914 level limiting diodes second CA3080 resistor divider network connected terminal (input) CA3080. These diodes establish input trip level this switching stage and, therefore, indirectly determine amplitude output triangle. Compensation propagation delays around entire loop provided adjustment input CA3080. This adjustment, which provides constant generator amplitude output, most easily made while generator sweeping. High frequency ramp linearity adjusted single 7-to-6pF capacitor output CA3080A. must emphasized that only CA3080A characterized maximum output linearity current generator function. Meter Driver Buffer Amplifier Figure shows CA3140 connected meter driver buffer amplifier. driving impedance required CA3080A current source assure smooth operation Frequency Adjustment Control. This low-driving impedance requirement easily using CA3140 connected voltage follower. Moreover, meter placed across input CA3080A give logarithmic analog indication function generators frequency. Analog frequency readout readily accomplished means described above because output current CA3080A varies approximately decade each 60mV change applied voltage, VABC (voltage between terminals CA3080A function generator). Therefore, decades represent 360mV change VABC. Now, only reference voltage must established lower limit meter. three remaining transistors from CA3086 Array used sweep generator used this reference voltage. addition, this reference generator arrangement tends track ambient temperature variations, thus compensates effects normal negative temperature coefficient CA3080A VABC terminal voltage. Another output voltage from reference generator used insure temperature tracking lower Frequency Adjustment Potentiometer. large series resistance simulates current source, assuring similar temperature coefficients both ends Frequency Adjustment Control. calibrate this circuit, Frequency Adjustment Potentiometer end. Then adjust Minimum Frequency Calibration Control lowest frequency. establish upper frequency limit, Frequency Adjustment Potentiometer upper then adjust Maximum Frequency Calibration Control maximum frequency. Because there interaction among these controls, repetition adjustment procedure necessary. adjustments used meter. meter sensitivity control sets meter scale width each decade, while meter position control adjusts pointer scale with negligible effect sensitivity adjustment. Thus, meter sensitivity adjustment control calibrates meter that deflects full scale each decade change frequency. Sine Wave Shaper circuit shown Figure uses CA3140 voltage follower combination with diodes from CA3019 Array convert triangular signal from function generator sine-wave output signal having typically less than THD. basic zero crossing slope established potentiometer connected between terminals CA3140 9.1k resistor potentiometer from terminal ground. break points established diodes through Positive feedback establishes zero slope maximum minimum levels sine wave. This technique necessary because voltage follower configuration approaches unity gain rather than zero gain required shape sine wave extremes.
2-134
CA3140, CA3140A
CENTERING -15V EXTERNAL OUTPUT +15V
7.5k SYMMETRY -15V +15V 100k FROM BUFFER METER DRIVER (OPTIONAL) -15V
+15V 7-60 HIGH FREQ. SHAPE -15V
+15V
CA3140
HIGH FREQUENCY LEVEL 7-60pF
EXTERNAL OUTPUT 2.7k -15V OUTPUT AMPLIFIER
CA3080A
-15V
CA3080
+15V
FREQUENCY ADJUSTMENT
SINE WAVE SHAPER
THIS NETWORK USED WHEN OPTIONAL BUFFER CIRCUIT USED
OUTPUT AMPLIFIER
IN914
CIRCUIT
FREQUENCY ADJUSTMENT
(B1) FUNCTION GENERATOR SWEEPING Trace: Output junction resistors 5V/Div 500ms/Div Center Trace: External output triangular function generator 2V/Div 500ms/Div Bottom Trace: Output "Log" generator; 10V/Div 500ms/Div
METER DRIVER BUFFER AMPLIFIER FUNCTION GENERATOR
+15V POWER SUPPLY ±15V -15V
SINE WAVE SHAPER
WIDEBAND LINE DRIVER
GATE LEVEL SWEEP ADJUST INT. COARSE RATE VEXT. EXTERNAL INPUT
FINE RATE
SWEEP GENERATOR
SWEEP LENGTH
(B2) FUNCTION GENERATOR WITH FIXED FREQUENCIES 1V/Div 1sec/Div Three tone test signals, highest frequency 0.5MHz. Note slight asymmetry three second/cycle signal. This asymmetry slightly different positive negative integration from CA3080A from board component leakages 100pA level. FIGURE FUNCTION GENERATOR
INTERCONNECTIONS
2-135
CA3140, CA3140A
500k FREQUENCY ADJUSTMENT SWEEP FREQUENCY CALIBRATION MAXIMUM 620k CA3140 4.7k +15V 0.1µF FREQUENCY 2.4k CALIBRATION MINIMUM METER POSITION ADJUSTMENT
CA3080A FUNCTION CA3080A GENERATOR (FIGURE METER SENSITIVITY ADJUSTMENT 200µA METER 3.6k
+15V
-15V 0.1µF
5.1k
WIDEBAND OUTPUT AMPLIFIER EXTERNAL OUTPUT
CA3140
SUBSTRATE CA3019
0.1µF +15V -15V 9.1k
-15V
CA3019 DIODE ARRAY
CA3086 -15V
FIGURE METER DRIVER BUFFER AMPLIFIER
FIGURE SINE WAVE SHAPER
750k "LOG" IN914 SAWTOOTH IN914 0.47µF 0.047µF 4700pF 470pF +15V SAWTOOTH "LOG" +15V TRIANGLE 100k OUTPUT AMPLIFIER SAWTOOTH SYMMETRY
100k FINE RATE
100k
8.2k
+15V SAWTOOTH RAMP LEVEL (-14.5V)
COARSE RATE
+15V
CA3140
-15V GATE PULSE OUTPUT
CA3140
RATE ADJUST -15V
-15V
EXTERNAL OUTPUT
FUNCTION GENERATOR "SWEEP SWEEP WIDTH +15V
LOGVIO
CA3140
6.8k
-15V
TRIANGLE
TRANSISTORS FROM CA3086 ARRAY
SAWTOOTH "LOG"
FIGURE SWEEPING GENERATOR
2-136
CA3140, CA3140A
This circuit adjusted most easily with distortion analyzer, good first approximation made comparing output signal with that sine wave generator. initial slope adjusted with potentiometer followed adjustment final slope established adjusting thereby adding additional segments that contributed these diodes. Because there some interaction among these controls, repetition adjustment procedure necessary. Sweeping Generator Figure shows sweeping generator. Three CA3140's used this circuit. CA3140 used integrator, second device used hysteresis switch that determines starting stopping points sweep. third CA3140 used logarithmic shaping network function. Rates slopes, well sawtooth, triangle, logarithmic sweeps generated this circuit. Wideband Output Amplifier Figure shows high slew rate, wideband amplifier suitable transmission line driver. This circuit, when used conjunction with function generator sine wave shaper circuits shown Figures provides peak-to-peak output open circuited, peak-to-peak output when terminated slew rate required this amplifier 28V/µs (18V peak-to-peak 0.5MHz).
FIGURE BASIC SINGLE SUPPLY VOLTAGE REGULATOR SHOWING VOLTAGE FOLLOWER CONFIGURATION
REFERENCE VOLTAGE INPUT
VOLTAGE ADJUSTMENT
REGULATED OUTPUT
CA3140
Essentially, regulators, shown Figures connected inverting power operational amplifiers with gain 3.2. reference input yields maximum output voltage slightly greater than 25V. voltage follower, when reference input goes output will Because offset voltage also multiplied gain factor, potentiometer needed null offset voltage. Series pass transistors with high ICBO levels will also prevent output voltage from reaching zero because there finite voltage drop (VCEsat) across output CA3140 (see Figure 10). This saturation voltage level indeed lowest voltage obtainable. high impedance presented terminal advantageous effecting current limiting. Thus, only small signal transistor required current-limit sensing amplifier. Resistive decoupling provided this transistor minimize damage CA3140 event unusual input output transients supply rail. Figures show circuits which D2201 high speed diode used current sensor. This diode chosen slightly higher forward voltage drop characteristic, thus giving greater sensitivity. must emphasized that heat sinking this diode essential minimize variation current trip point internal heating diode. That forward drop represents watt which result significant regenerative changes current trip point diode temperature rises. Placing small signal reference amplifier proximity current sensing diode also helps minimize variability trip level negative temperature coefficient diode. spite those limitations, current limiting point easily adjusted over range from 10mA with single adjustment potentiometer. temperature stability current limiting system serious consideration, more usual current sampling resistor type circuitry should employed. power Darlington transistor heat sink TO-3 case), used series pass element conventional current limiting system, Figure because high power Darlington dissipation will encountered output voltage high currents. small heat sink VERSAWATT transistor used series pass element fold back current system, Figure since dissipation levels will only approach 10W. this system, D2201 diode used current sampling. Fold-
+15V SIGNAL LEVEL ADJUSTMENT 2.5k
50µF
2N3053
CA3140
IN914 IN914
OUTPUT LEVEL +15V ADJUSTMENT -15V
50µF
2.4pF
2N4037 -15V
1.8k
NOMINAL BANDWIDTH 10MHz 35ns
FIGURE WIDEBAND OUTPUT AMPLIFIER
Power Supplies High input impedance, common mode capability down negative supply high output drive current capability factors design wide range output voltage supplies that single input voltage provide regulated output voltage that adjusted from essentially 24V. Unlike many regulator systems using comparators having bipolar transistor input stage, high impedance reference voltage divider from single supply used connection with CA3140 (see Figure 23).
2-137
CA3140, CA3140A
back provided 100k divider network connected base current sensing transistor.
2N6385 CURRENT POWER DARLINGTON LIMITING ADJUST D2201 2.7k 10µF INPUT 2.2k 0.01µF CA3140 100k VOLTAGE ADJUST 100k 56pF 180k 2N2102
+30V
OUTPUT
Both regulators, Figures provide better than 0.02% load regulation. Because there constant loop gain voltage settings, regulation also remains constant. Line regulation 0.1% volt. noise voltage less than 200µV read with meter having 10MHz bandwidth. Figure shows turn turn characteristics both regulators. slow turn rise slow rate rise reference voltage. Figure shows transient response regulator with switching load output.
250µF
CA3086
SUPPLY TURN-ON TURNOFF CHARACTERISTICS
LOAD REGULATION LOAD FULL LOAD) <0.02%
NOISE OUTPUT <200µVRMS (MEASUREMENT BANDWIDTH ~10MHz) LINE REGULATION 0.1%/VOLT
5V/Div -1s/Div
FIGURE REGULATED POWER SUPPLY
+30V
"FOLDBACK" CURRENT LIMITER 2N5294 D2201 100k 2.7k 10µF CA3140 100k 100k
OUTPUT "FOLDS BACK" 40mA
2N2102 56pF 180k
TRANSIENT RESPONSE Trace: Output voltage 200mV/Div 5µs/Div
INPUT 2.2k 0.01µF
VOLTAGE ADJUST 100k
250µF
Bottom Trace: Collector load switching transistor, load 5V/Div 5µs/Div FIGURE WAVEFORMS DYNAMIC CHARACTERISTICS POWER SUPPLY CURRENTS SHOWN FIGURES
CA3086
Tone Control Circuits High slew rate, wide bandwidth, high output voltage capability high input impedance characteristics required tone control amplifiers. tone control circuits that exploit these characteristics CA3140 shown Figures
NOISE OUTPUT <200µVRMS (MEASUREMENT BANDWIDTH ~10MHz) LINE REGULATION 0.1%/VOLT
LOAD REGULATION LOAD FULL LOAD) <0.02%
FIGURE REGULATED POWER SUPPLY WITH "FOLDBACK" CURRENT LIMITING
2-138
CA3140, CA3140A
first circuit, shown Figure Baxandall tone control circuit which provides unity gain midband uses standard linear potentiometers. high input impedance CA3140 makes possible low-cost, low-value, small size capacitors, well reduced load driving stage. Bass treble boost ±15dB 100Hz 10kHz, respectively. Full peak-to-peak output available least 20kHz high slew rate CA3140. amplifier gain down from "flat" position 70kHz. Figure shows another tone control circuit with similar boost specifications. wideband gain this circuit equal ultimate boost plus one, which this case gain eleven. 20dB boost cut, input loading this circuit essentially equal value resistance from terminal ground. detailed analysis this circuit given Operational TransconductanceAmplifier (OTA) With Power Capability" Kaplan Wittlinger, IEEE Transactions Broadcast Television Receivers, Vol. BTR-18, August, 1972.
SINGLE SUPPLY +30V 2.2M 0.005µF CA3140 0.1µF
20dB Flat Position Gain ±15dB Bass Treble Boost 100Hz 10kHz, respectively 25VP-P output 20kHz -3dB 24kHz from 1kHz reference
DUAL SUPPLIES +15V 0.005µF 5.1M CA3140 0.1µF
BOOST 0.012µF 2.2M
TREBLE 200k (LINEAR) 0.001µF 100pF
0.1µF -15V
0.022µF
0.0022µF
100k (LOG) BOOST BASS TONE CONTROL NETWORK
TONE CONTROL NETWORK
FIGURE TONE CONTROL CIRCUIT USING CA3130 SERIES (20dB MIDBAND GAIN)
SINGLE SUPPLY BOOST 0.047µF BASS (LINEAR) 240k 240k 2.2M 2.2M +32V +15V CA3140 0.047µF 20pF (LINEAR) BOOST TREBLE TONE CONTROL NETWORK TONE CONTROL NETWORK CA3140 0.1µF
DUAL SUPPLIES
-15V 0.1µF
±15dB Bass Treble Boost 100Hz 10kHz, respectively 25VP-P output 20kHz -3dB 70kHz from 1kHz reference Flat Position Gain
FIGURE BAXANDALL TONE CONTROL CIRCUIT USING CA3140 SERIES
2-139
CA3140, CA3140A
Wien Bridge Oscillator Another application CA3140 that makes excellent high input impedance, high slew rate, high voltage qualities Wien Bridge sine wave oscillator. basic Wien Bridge oscillator shown Figure When frequency equation reduces familiar gain required oscillation, AOSC equal Note that increased factor four reduced factor four, gain required oscillation becomes 1.5, thus permitting potentially higher operating frequency closer gain bandwidth product CA3140.
1000pF 1000 +15V CA3140 0.1µF SUBSTRATE CA3019 0.1µF -15V 0.1µF 7.5k OUTPUT 19VP-P 22VP-P <0.3%
CA3109 DIODE ARRAY
NOTES:
OUTPUT
R1C1R2C2
50Hz, 100Hz, 1kHz, 10kHz, 30kHz,
3.3M 1.6M 160M 5.1M
3.6k
FIGURE WIEN BRIDGE OSCILLATOR CIRCUIT USING CA3140 SERIES
Simple Sample-and-Hold System
FIGURE BASIC WIEN BRIDGE OSCILLATOR CIRCUIT USING OPERATIONAL AMPLIFIER
Figure shows very simple sample-and-hold system using CA3140 readout amplifier storage capacitor. CA3080A serves both input buffer amplifier feed-through transmission switch.* System offset nulling accomplished with CA3140 offset nulling terminals. typical simulated load 30pF shown schematic.
STROBE IN914 +15V IN914 INPUT CA3140 -15V 200pF 200pF 0.1µF SIMULATED LOAD REQUIRED 30pF 100k -15V CA3080A +15V 0.1µF 3.5k HOLD SAMPLE
Oscillator stabilization takes many forms. must precisely set, otherwise amplitude will either diminish reach some form limiting with high levels distortion. element, commonly replaced with some variable resistance element. Thus, through some control means, value adjusted maintain constant oscillator output. channel resistance, thermistor, lamp bulb, other device whose resistance made increase output amplitude increased elements often utilized. Figure shows another means stabilizing oscillator with zener diode shunting feedback resistor Figure 29). output signal amplitude increases, zener diode impedance decreases resulting more feedback with consequent reduction gain; thus stabilizing amplitude output signal. Furthermore, this combination monolithic zener diode bridge rectifier circuit tends provide zero temperature coefficient this regulating system. Because this bridge rectifier system time constant, i.e., thermal time constant lamp bulb, time constant filters often used detector networks, there lower frequency limit. example, with polycarbonate capacitors frequency determining network, operating frequency 0.007Hz. frequency increased, output amplitude must reduced prevent output signal from becoming slewrate limited. output frequency 180kHz will reach slew rate approximately 9V/µs when amplitude peakto-peak.
0.1µF
FIGURE SAMPLE HOLD CIRCUIT
this circuit, storage compensation capacitance (C1) only 200pF. Larger value capacitors provide longer "hold" periods with slower slew rates. slew rate 0.5mA 200pF 2.5V
ICAN-6668 "Applications CA3080 3080A High Performance Operational Transconductance Amplifiers".
Pulse "droop" during hold interval 170pA/200pF which 0.85µV/µs; (i.e., 170pA/200pF). this case, 170pA
2-140
CA3140, CA3140A
represents typical leakage current CA3080A when strobed off. were increased 2000 "hold-droop" rate will decrease 0.085µV/µs, slew rate would decrease 0.25V/µs. parallel diode network connected between terminal CA3080A terminal CA3140 prevents large input signal feedthrough across input terminals CA3080A 200pF storage capacitor when CA3080A strobed off. Figure shows dynamic characteristic waveforms this sample-and-hold system. Current Amplifier input terminal current needed drive CA3140 makes ideal current amplifier applications such shown Figure 33.* this circuit, current supplied input potential power supply load resistor This load current increased multiplication factor R2/R1, when load current monitored power supply meter Thus, load current 100nA, with values shown, load current presented supply will 100µA; much easier current measure many systems.
+15V 0.1µF CA3140 100k 0.1µF
Trace: Output; 50mV/Div 200ns/Div Bottom Trace: Input; 50mV/Div 200ns/Div
POWER SUPPLY
4.3k -15V
FIGURE BASIC CURRENT AMPLIFIER CURRENT MEASUREMENT SYSTEMS
Note that input output voltages transferred same potential only output current multiplied scale factor.
LARGE SIGNAL RESPONSE SETTLING TIME Trace: Output Signal; 5V/Div 2µs/Div Center Trace: Difference Input Output Signals through Tektronix Amplifier 7A13; 5mV/Div 2µs/Div Bottom Trace: Input Signal; 5V/Div 2µs/Div
dotted components show method decoupling circuit from effects high output load capacitance potential oscillation this situation. Essentially, necessary high frequency feedback provided capacitor with dotted series resistor providing load decoupling. Figure shows single supply, absolute value, ideal fullwave rectifier with associated waveforms. During positive excursions, input signal through feedback network directly output. Simultaneously, positive excursion input signal also drives output terminal (No. inverting amplifier negative going excursion such that 1N914 diode effectively disconnects amplifier from signal path. During negative going excursion input signal, CA3140 functions normal inverting amplifier with gain equal -R2/R1. When equality equations shown Figure satisfied, full wave output symmetrical.
SAMPLING RESPONSE Trace: Output; 100mV/Div 500ns/Div Bottom Trace: Input; 20V/Div 500ns/Div FIGURE SAMPLE HOLD SYSTEM DYNAMIC CHARACTERISTICS WAVEFORMS
"Operational Amplifiers Design Applications", Graeme, McGraw-Hill Book Company, page "Negative Immittance Converter Circuits".
2-141
CA3140, CA3140A
+15V 0.1µF 0.1µF 1N914 100k OFFSET ADJUST PEAK ADJUST 0.1µF -15V 0.05µF (-3dB) 4.5MHz 9V/µs 100k CA3140 100pF SIMULATED LOAD +15V
CA3140
GAIN FORX -10k
0.75
20Vp-p Input BW(-3dB) 290kHz, DCOutput (Avg) 3.2V
OUTPUT INPUT
SMALL SIGNAL RESPONSE 50mV/Div 200ns/Div Trace: Output; 50mV/Div 200ns/Div Bottom Trace: Input; 50mV/Div 200ns/Div
FIGURE SINGLE SUPPLY, ABSOLUTE VALUE, IDEAL FULL WAVE RECTIFIER WITH ASSOCIATED WAVEFORMS
+15V CA3140 0.01µF NOISE VOLTAGE OUTPUT
0.01µF -15V
30.1k
INPUT-OUTPUT DIFFERENCE SIGNAL SHOWING SETTLING TIME (measurement made with Tektronix 7A13 differential amplifier) Trace: Output Signal; 5V/Div 5µs/Div Center Trace: Difference Signal; 5mV/Div 5µs/Div Bottom Trace: Input Signal; 5V/Div 5µs/Div FIGURE SPLIT SUPPLY VOLTAGE FOLLOWER TEST CIRCUIT ASSOCIATED WAVEFORMS
(-3dB) 140kHz TOTAL NOISE VOLTAGE (REFERRED INPUT 48µV TYP.
FIGURE TEST CIRCUIT AMPLIFIER (30dB GAIN) USED WIDEBAND NOISE MEASUREMENT
2-142
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