BiMOS Operational Amplifier with MOSFET Input/CMOS Output CA3130A

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

BiMOS Operational Amplifier with MOSFET Input/CMOS Output CA3130A

Datasheet Thumbnail

Top Searches for this datasheet

CA3130
BiMOS Operational Amplifier with MOSFET Input/CMOS Output
CA3130A CA3130 integrated-circuit operational amplifiers that combine advantage both CMOS bipolar transistors monolithic chip. Gate-protected p-channel MOSFET (PMOS) transistors used input circuit provide very-high-input impedance, very-low-input current, exceptional speed performance. PMOS field-effect transistors input stage results common-mode input-voltage capability down volt below negative-supply terminal, important attribute single-supply applications. complementary-symmetry (CMOS) transistor-pair, capable swinging output voltage within millivolts either supply-voltage terminal very high values load impedance), employed output circuit. CA3130 Series circuits operate supply voltages ranging from volts, ±2.5 volts when using split supplies. They phase compensated with single external capacitor, have terminals adjustment offset voltage applications requiring offset-null capability. Terminal provisions also made permit strobing output stage. CA3130A offers superior input characteristics over those CA3130.
April 1993
Features
MOSFET Input Stage Provides: Very High (1.5 1012) Typ. Very Typ. Operation Typ. Operation Ideal Single-Supply Applications Common-Mode Input-Voltage Range Includes Negative Supply Rail; Input Terminals Swung 0.5V Below Negative Supply Rail CMOS Output Stage Permits Signal Swing Either both) Supply Rails
Applications
Ground-Referenced Single Supply Amplifiers Fast Sample-Hold Amplifiers Long-Duration Timers/Monostables High-Input-Impedance Comparators (Ideal Interface with Digital CMOS) High-Input-Impedance Wideband Amplifiers Voltage Followers (e.g. Follower Single-Supply Converter) Voltage Regulators (Permits Control Output Voltage Down Zero Volts) Peak Detectors Single-Supply Full-Wave Precision Rectifiers Photo-Diode Sensor Amplifiers
Pinouts
CA3130, CA3130A (PDIP, SOIC) VIEW CA3130, CA3130A (CAN) VIEW
PHASE COMPENSATION OFFSET NULL INV. INPUT NON-INV. INPUT STROBE OUTPUT OFFSET NULL OFFSET NULL INV. INPUT
Ordering Information
PART NUMBER
CA3130AE
STROBE
TEMP. RANGE
PACKAGE
-55oC +125oC Lead PDIP -55oC +125oC Lead SOIC
CA3130AM
CA3130AM96 -55oC +125oC Lead SOIC* CA3130AT
OUTPUT
-55oC +125oC -55oC +125oC -55oC +125oC Lead PDIP -55oC +125oC Lead SOIC -55oC +125oC Lead SOIC* -55oC +125oC
CA3130BT CA3130E
NON-INV. INPUT
OFFSET NULL
CA3130M CA3130M96 CA3130T
CASE
Denotes Tape Reel
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright
Harris Corporation 1993
File Number
817.2
2-108
Specifications CA3130, CA3130A
Absolute Maximum Ratings
Supply Voltage (Between Terminals) Differential-Mode Input Voltage Input Voltage -0.5V) Input-Terminal Current Device Dissipation: Without Heat SinkUp 55oC Above 55oC Derate Linearly 6.67 mW/oC With Heat SinkUp Above Derate Linearly 16.7 mW/oC. Output Short-Circuit Duration (Note Indefinite Junction Temperature +175oC Junction Temperature (Plastic Package) +150oC Lead Temperature (Soldering Sec.). +300oC
Operating Conditions
Operating Temperature Range (All Types) -55oC +125oC Storage Temperature Range(All Types) -65oC +150oC
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
Electrical Specifications
+25oC, 15V, (Unless Otherwise Specified) LIMITS CA3130A CA3130 UNITS kV/V TEST CONDITIONS ±7.5V ±7.5V ±7.5V Vp-p
PARAMETERS Input Offset Voltage Input Offset Current Input Current Large-Signal Voltage Gain
SYMBOLS |VIO| |IIO|
Common-Mode Rejection Ratio Common-Mode Input Voltage Range Power-Supply Rejection Ratio Maximum Output Voltage
CMRR
VICR VIO/V± VOM+ VOMVOM+ VOMV± ±7.5V
-0.5
-0.5
µV/V
14.99
13.3 0.002
0.01 0.01
14.99
13.3 0.002
0.01 0.01
Maximum Output Current
IOM+ (Source) IOM- (Sink)
Supply Current
7.5V,
VIO/T
µV/oC
Input Offset Voltage Temperature Drift NOTE:
Short circuit applied ground either supply.
2-109
Specifications CA3130, CA3130A
Electrical Specifications
Typical Values Intended Only Design Guidance, +7.5V, -7.5V, +25oC (Unless Otherwise Specified) CA3130A, CA3130
PARAMETERS Input Offset Voltage Adjustment Range
SYMBOL
TEST CONDITIONS Across Terms.
UNITS
Input Resistance Input Capacitance Equivalent Input Noise Voltage Unity Gain Crossover Frequency
1MHz 0.2MHz, 47pF
Slew Rate: Open Loop Closed Loop Transient Response: Rise Time Overshoot Settling Time <0.1%, 4VP-P)
56pF 56pF, 25pF, (Voltage Follower) V/µs V/µs
0.09
Although source used this test, equivalent input noise remains constant values 10M.
Electrical Specifications
PARAMETERS Input Offset Voltage Input Offset Current Input Current Common-Mode Rejection Ratio Large-Signal Voltage Gain
Typical Values Intended Only Design Guidance, +25oC (Unless Otherwise Specified) SYMBOL CMRR 4VP-P, TEST CONDITIONS CA3130A CA3130 UNITS kV/V µV/V
Common-Mode Input Voltage Range Supply Current
VICR 2.5V,
Power Supply Rejection Ratio
VIO/V+
2-110
CA3130, CA3130A
CURRENT SOURCE "CURRENT SOURCE LOAD"
BIAS CIRCUIT
8.3V
SECOND STAGE INPUT STAGE
NON-INV. INPUT INV.-INPUT
OUTPUT STAGE
OUTPUT
OFFSET NULL
COMPENSATION
STROBING
NOTE: DIODES THROUGH PROVIDE GATE-OXIDE PROTECTION MOSFET INPUT STAGE
FIGURE SCHEMATIC DIAGRAM CA3130 SERIES
Circuit Figure block diagram CA3130 Series CMOS Operational Amplifiers. input terminals operated down below negative supply rail, output swung very close either supply rail many applications. Consequently, CA3130 Series circuits ideal single-supply operation. Three Class amplifier stages, having individual gain capability current consumption shown Figure provide total gain CA3130. biasing circuit provides potentials common first second stages. Term. used both phase compensation strobe output stage into quiescence. When Term. tied negative supply rail (Term. mechanical electrical means, output potential Term. essentially rises positive supplyrail potential Term. This condition essentially zero current drain output stage under strobed "OFF" condition only achieved when ohmic load resistance presented amplifier very high (e.g.,when amplifier output used drive CMOS digital circuits Comparator applications). Input Stages circuit CA3130 shown Figure consists differential-input stage using PMOS field-effect transistors (Q6, working into mirror-pair bipolar transistors (Q9, Q10) functioning load resistors together with resistors through mirror-pair transistors also function differential-to-single-ended converter provide base drive second-stage bipolar transistor (Q11). Offset nulling, when desired, effected connecting 100,000 potentiometer across Terms. potentiometer slider Term. Cascade-connected PMOS transistors constant-current source input stage. biasing circuit constant-current source subsequently described. small diodes through provide gate-oxide protection against high-voltage transients, including static electricity during handling Second-Stage Most voltage gain CA3130 provided second amplifier stage, consisting bipolar transistor cascade-connected load resistance provided
2-111
CA3130, CA3130A
PMOS transistors source bias potentials these PMOS transistors subsequently described. Miller Effect compensation (roll-off) accomplished simply connecting small capacitor between Terms. 47picofarad capacitor provides sufficient compensation stable unity-gain operation most applications. Bias-Source Circuit total supply voltages, somewhat above volts, resistor zener diode serve establish voltage volts across series-connected circuit, consisting resistor diodes through PMOS transistor junction resistor diode provides gate-bias potential about volts PMOS transistors with respect Term. potential about volts developed across diode-connected PMOS transistor with respect Term. provide gate bias PMOS transistors should noted that "mirror-connected"* both Since transistors designed identical, approximately 200-microampere current establishes similar current constant current sources both first second amplifier stages, respectively. total supply voltages somewhat less than volts, zener diode becomes nonconductive potential, developed across series-connected D1-D4, varies directly with variations supply voltage. Consequently, gate bias varies accordance with supply-voltage variations. This variation results deterioration power-supply-rejection ratio (PSRR) total supply voltages below volts. Operation total supply voltages below about volts results seriously degraded performance. Output Stage output stage consists drain-loaded inverting amplifier using CMOS transistors operating Class mode. When operating into very high resistance loads, output swung within millivolts either supply rail. Because output stage drain-loaded amplifier, gain dependent upon load impedance. transfer characteristics output stage load returned negative supply rail shown Figure Typical op-amp loads readily driven output stage. Because large-signal excursions non-linear, requiring feedback good waveform reproduction, transient delays encountered. voltage follower, amplifier achieve 0.01 percent accuracy levels, including negative supply rail.
general information characteristics CMOS transistorpairs linear-circuit applications, File Number 619, data bulletin CA3600E "CMOS Transistor Array".
INPUT COMPENSATION (WHEN REQUIRED) STROBE 6000X OUTPUT CA3130 200µA 1.35mA 200µA 8mA* 0mA** BIAS CKT.
OFFSET NULL
TOTAL SUPPLY VOLTAGE (FOR INDICATED VOLTAGE GAINS) *WITH INPUT TERMINALS BIASED THAT TERM. POTENTIAL +7.5V ABOVE TERM. **WITH OUTPUT TERMINAL DRIVEN EITHER SUPPLY RAIL.
FIGURE BLOCK DIAGRAM CA3130 SERIES
OPEN-LOOP VOLTAGE GAIN (dB)
SUPPLY VOLTAGE: 15V; +25oC -200 -100 OPEN-LOOP PHASE (DEGREES)
-300
CAPACITANCE: LOAD (CL) COMPENSATION (CC) FREQUENCY (Hz) LOAD RESISTANCE (RL) 30pF, 15pF, 30pF, 47pF, 30pF, 150pF,
FIGURE OPEN-LOOP VOLTAGE GAIN PHASE SHIFT FREQUENCY
2-112
CA3130, CA3130A
LOAD RESISTANCE OPEN-LOOP VOLTAGE GAIN (dB) -100 OUTPUT VOLTAGE [TERMS 17.5
SUPPLY VOLTAGE: +25oC LOAD RESISTANCE
12.5
TEMPERATURE (oC)
12.5
17.5
22.5
GATE VOLTAGE [TERMS
FIGURE OPEN-LOOP GAIN TEMPERATURE
FIGURE VOLTAGE TRANSFER CHARACTERISTICS CMOS OUTPUT STAGE
QUIESCENT SUPPLY CURRENT (mA) OUTPUT VOLTAGE V+/2 -55oC +25oC +125oC
17.5 QUIESCENT SUPPLY CURRENT (mA)
12.5
LOAD RESISTANCE +25oC OUTPUT VOLTAGE BALANCED V+/2
OUTPUT VOLTAGE HIGH V2.5
TOTAL SUPPLY VOLTAGE
TOTAL SUPPLY VOLTAGE
FIGURE QUIESCENT SUPPLY CURRENT SUPPLY VOLTAGE
VOLTAGE DROP ACROSS PMOS OUTPUT STAGE TRANSISTOR
FIGURE QUIESCENT SUPPLY CURRENT SUPPLY VOLTAGE
VOLTAGE DROP ACROSS NMOS OUTPUT STAGE TRANSISTOR
NEGATIVE SUPPLY VOLTAGE +25oC POSITIVE SUPPLY VOLTAGE
NEGATIVE SUPPLY VOLTAGE +25oC POSITIVE SUPPLY VOLTAGE
0.01
0.01
0.001
0.001
0.001
0.01 MAGNITUDE LOAD CURRENT (mA)
0.001
0.01 MAGNITUDE LOAD CURRENT (mA)
FIGURE VOLTAGE ACROSS PMOS OUTPUT TRANSISTOR (Q8) LOAD CURRENT
FIGURE VOLTAGE ACROSS NMOS OUTPUT TRANSISTOR (Q12) LOAD CURRENT
2-113
CA3130, CA3130A
Input Current Variation with Common Mode Input Voltage shown Table Electrical Characteristics, input current CA3130 Series Op-Amps typically +25oC when terminals common-mode potential +7.5 volts with respect negative supply Terminal Figure contains data showing variation input current function common-mode input voltage +25oC. These data show that circuit designers advantageously exploit these characteristics design circuits which typically require input current less than 1pA, provided common-mode input voltage does exceed volts. previously noted, input current essentially result leakage current through gate-protection diodes input circuit and, therefore, function applied voltage. Although finite resistance glass terminal-to-case insulator TO-5 package also contributes increment leakage current, there useful compensating factors. Because gate-protection network functions connected Terminal potential, TO-5 case CA3130 also internally tied Terminal input terminal essentially "guarded" from spurious leakage currents.
+25oC
input circuit. with semiconductor-junction device, including op-amps with junction-FET input stage, leakage current approximately doubles every +10oC increase temperature. Figure provides data typical variation input bias current function temperature CA3130.
4000
7.5V -7.5V
1000 INPUT CURRENT (pA)
TEMPERATURE (oC)
FIGURE INPUT CURRENT AMBIENT TEMPERATURE
INPUT VOLTAGE
VOLTS VOLTS CA3130 VOLTS VOLTS INPUT CURRENT (pA)
applications requiring lowest practical input current incremental increases current because "warm-up" effects, suggested that appropriate heat sink used with CA3130. addition, when "sinking" "sourcing" significant output current chip temperature increases, causing increase input current. such cases, heatsinking also very markedly reduce stabilize input current variations. Input-Offset-Voltage (VIO) Variation with Bias Device Operating Life well known that characteristics MOSFET device change slightly when gate-source bias potential applied device extended time periods. magnitude change increased high temperatures. Users CA3130 should alert possible impacts this effect application device involves extended operation high temperatures with significant differential bias voltage applied across Terms. Figure shows typical data pertinent shifts offset voltage encountered with CA3130 devices (TO-5 package) during life testing. lower temperatures (TO-5 plastic), example +85oC, this change voltage considerably less. typical linear applications where differential voltage small symmetrical, these incremental changes about same magnitude those encountered operational amplifier employing bipolar transistor input stage. twovolt differential voltage example represents conditions when amplifier output stage "toggled", e.g., comparator applications.
FIGURE INPUT CURRENT COMMON-MODE VOLTAGE
Offset Nulling Offset-voltage nulling usually accomplished with 100,000-ohm potentiometer connected across Terms. with potentiometer slider connected Term. fine offset-null adjustment usually effected with slider positioned mid-point potentiometer's total range. Input-Current Variation with Temperature input current CA3130 Series circuits typically +25oC. major portion this input current leakage current through gate-protective diodes
2-114
CA3130, CA3130A
+125oC TO-5 PACKAGES OFFSET-VOLTAGE SHIFT (mV) 1000 1500 2000 2500 TIME (HOURS) 3000 3500 4000 DIFFERENTIAL VOLTAGE (ACROSS TERMS OUTPUT VOLTAGE DIFFERENTIAL VOLTAGE (ACROSS TERMS OUTPUT STAGE TOGGLED
Power-Supply Considerations Because CA3130 very useful single-supply applications, pertinent review some considerations relating power-supply current consumption under both single-and dual-supply service. Figures show CA3130 connected both dual-and single-supply operation. Dual-supply Operation: When output voltage Term. zero-volts, currents supplied power supplies equal. When gate terminals driven increasingly positive with respect ground, current flow through (from negative supply) load increased current flow through (from positive supply) decreases correspondingly. When gate terminals driven increasingly negative with respect ground, current flow through increased current flow through decreased accordingly. Single-supply Operation: Initially, assumed that value very high disconnected), that inputterminal bias (Terms. such that output terminal (No. voltage V+/2, i.e., voltage-drops across equal magnitude. Figure shows typical quiescent supply-current supply-voltage CA3130 operated under these conditions. Since output stage operating Class amplifier, supply-current will remain constant under dynamic operating conditions long transistors operated linear portion their voltage-transfer characteristics (see Figure either swung their linear regions toward cut-off non-linear region), there will corresponding reduction supply-current. extreme case, e.g., with Term. swung down ground potential tied ground), NMOS transistor completely supply-current series-connected transistors goes essentially zero. preceding stages CA3130, however, continue draw modest supply-current (see lower curve Figure even though output stage strobed off. Figure shows dual-supply arrangement output stage that also strobed off, assuming pulling potential Term. down that Term. assumed that load-resistance nominal value (e.g., kilohms) connected between Term. ground circuit Figure 13B. further assumed again that input-terminal bias (Terms. such that output terminal (No. voltage V+/2. Since PMOS transistor must supply quiescent current both transistor Q12, should apparent that under these conditions supply-current must increase inverse function magnitude. Figure shows voltage-drop across PMOS transistor function load current several supply voltages. Figure shows voltage-transfer characteristics output stage several values load resistance. Wideband Noise
SINGLE POWER-SUPPLY OPERATION
FIGURE TYPICAL INCREMENTAL OFFSET-VOLTAGE SHIFT OPERATING LIFE
POSITIVE SUPPLY CA3130 NEGATIVE SUPPLY
DUAL POWER-SUPPLY OPERATION
POSITIVE SUPPLY CA3130
FIGURE CA3130 OUTPUT STAGE DUAL SINGLE POWER-SUPPLY OPERATION
From standpoint low-noise performance considerations, CA3130 most advantageous applications where source resistance input signal order megohm more. this case, total input-referred noise voltage typically only 23µV when
2-115
CA3130, CA3130A
test-circuit amplifier Figure operated total supply voltage volts. This value total input-referred noise remains essentially constant, even though value source resistance raised order magnitude. This characteristic fact that reactance input capacitance becomes significant factor shunting source resistance. should noted, however, that values source resistance very much greater than megohm, total noise voltage generated dominated thermal noise contributions both feedback source resistors.
+7.5V +7.5V
0.01µF -7.5V 56pF 0.01µF 25pF
0.01µF 0.01 30.1k NOISE VOLTAGE OUTPUT
(-3dB) 4MHz 10V/µs
0.1µF
47pF -7.5V (-3dB) 200kHz TOTAL NOISE VOLTAGE (REFERRED INPUT) 23µV TYP.
FIGURE TEST-CIRCUIT AMPLIFIER (30-dB GAIN) USED WIDEBAND NOISE MEASUREMENTS
Typical Applications
Voltage Followers Operational amplifiers with very high input resistances, like CA3130, particularly suited service voltage followers. Figure shows circuit classical voltage follower, together with pertinent waveforms using CA3130 split-supply configuration. voltage follower, operated from single supply, shown Figure together with related waveforms. This follower circuit linear over wide dynamic range, illustrated reproduction output waveform Figure with input-signal ramping. waveforms Figure show that follower does lose input-to-output phasesense, even though input being swung volts below ground potential. This unique characteristic important attribute both operational amplifier comparator applications. Figure also shows manner which CMOS output stage permits output signal swing down negative supply-rail potential (i.e., ground case shown). digital-to-analog converter (DAC) circuit, described following section, illustrates practical CA3130 single-supply voltage-follower application.
Trace: Bottom Trace:
Output Input
SMALL-SIGNAL RESPONSE (50mV/DIV. 200ns/DIV.)
Trace: Center Trace: Bottom Trace:
Output Signal (2V/DIV. 5µs/DIV.) Difference Signal (5mV/DIV. 5µs/DIV.) Input Signal (2V/DIV. 5µs/DIV.)
INPUT-OUTPUT DIFFERENCE SIGNAL SHOWING SETTLING TIME (MEASUREMENT MADE WITH TEKTRONIX 7A13 DIFFERENTIAL AMPLIFIER) FIGURE SPLIT-SUPPLY VOLTAGE FOLLOWER WITH ASSOCIATED WAVEFORMS
2-116
CA3130, CA3130A
+15V
9-Bit COS/MOS typical circuit 9-bit Digital-to-Analog Converter (DAC)* shown Figure This system combines concepts multiple-switch CMOS lC's, low-cost ladder network discrete metal-oxide-film resistors, CA3130 op-amp connected follower, inexpensive monolithic regulator simple single power-supply arrangement. additional feature that readily interfaced with CMOS input logic, e.g., 10-volt logic levels used circuit Figure circuit uses R/2R voltage-ladder network, with output potential obtained directly terminating ladder arms either positive negative power-supply terminal. Each CD4007A contains three "inverters", each "inverter" functioning single-pole double-throw switch terminate R/2R network either positive negative power-supply terminal. resistor ladder assembly percent tolerance metal-oxide film resistors. five arms requiring highest accuracy assembled with series parallel combinations 806,000-ohm resistors from same manufacturing lot. single 15-volt supply provides positive CA3130 follower amplifier feeds CA3085 voltage regulator. "scale-adjust" function provided regulator output control, nominal 10-volt level this system. line-voltage regulation (approximately 0.2%) permits 9-bit accuracy maintained with variations several volts supply. flexibility afforded COS/MOS building blocks simplifies design systems tailored particular needs. Single-Supply, Absolute-Value, Ideal Full-Wave Rectifier
0.01µF 56pF 100k OFFSET ADJUST
0.1µF
OUTPUT-WAVEFORM WITH INPUT-SIGNAL RAMPING (2V/ DIV. 500µs/DIV.)
absolute-value circuit using CA3130 shown Figure During positive excursions, input signal through feedback network directly output. Simultaneously, positive excursion input signal also drives output terminal (No. inverting amplifier negative-going excursion such that 1N914 diode effectively disconnects amplifier from signal path. During negative-going excursion input signal, CA3130 functions normal inverting amplifier with gain equal -R2/R1. When equality equations shown Figure satisfied, fullwave output symmetrical. Peak Detectors Peak-detector circuits easily implemented with CA3130, illustrated Figure both peak-positive peak-negative circuit. should noted that with large-signal inputs, bandwidth peak-negative circuit much less than that peak-positive circuit. second stage CA3130 limits bandwidth this case. Negative-going output-signal excursion requires positive-going signal excursion collector transistor Q11, which loaded intrinsic capacitance associated circuitry this mode. other hand, during negative-going signal excursion collector Q11, transistor functions active "pull-down" mode that intrinsic capacitance discharged more expeditiously.
Trace: Bottom Trace:
Output (5V/DIV. 200µs/DIV.) Input Signal (5V/DIV. 200µs/DIV.)
OUTPUT WAVEFORM WITH GROUND-REFERENCE SINEWAVE INPUT FIGURE SINGLE-SUPPLY VOLTAGE-FOLLOWER WITH ASSOCIATED WAVEFORMS. (e.g., SINGLE-SUPPLY CONVERTER; FIGURE AN6080)
2-117
CA3130, CA3130A
LOGIC INPUTS +10.010 CD4007A "SWITCHES" 806K 402K 200K 100K 806K 806K 806K 750K 806K 806K 806K 806K CD4007A "SWITCHES" CD4007A "SWITCHES" REQUIRED RATIO-MATCH STANDARD ±0.1% ±0.2% ±0.4% ±0.8%
RESISTANCES OHMS
806K VOLTAGE REGULATOR CA3085 0.001µF +10.010
PARALLELED RESISTORS +15V
+15V
OUTPUT LOAD
CA3130 100K OFFSET NULL 56pF VOLTAGE FOLLOWER
REGULATED VOLTAGE
0.1µF
FIGURE 18-9-BIT USING CMOS DIGITAL SWITCHES CA3130
+15V 0.01 CA3130 20pF 100k OFFSET ADJUST PEAK ADJUST Gain IN914 5.1k
0.5:
0.75
Trace: Bottom Trace:
Output Signal (2V/div.) Input Signal (10V/div.) 0.2ms/div.
Time base both traces:
20Vp-p Input: BW(-3dB) 230kHz, Output (Avg.) 3.2V 1Vp-p Input: BW(-3dB) 130kHz, Output (Avg.) 160mV FIGURE SINGLE-SUPPLY, ABSOLUTE-VALUE, IDEAL FULL-WAVE RECTIFIER WITH ASSOCIATED WAVEFORMS
2-118
CA3130, CA3130A
6VP-P INPUT; BW(-3dB) 1.3MHz VP-P INPUT; BW(-3dB) 240kHz +7.5V 0.01µF CA3130 0.01µF -7.5V -7.5V IN914 0.01µF OUTPUT 6VP-P INPUT; BW(-3dB) 360kHz VP-P INPUT; BW(-3dB) 320kHz +7.5V 0.01µF CA3130 IN914 OUTPUT
PEAK POSITIVE DETECTOR CIRCUIT
PEAK NEGATIVE DETECTOR CIRCUIT
FIGURE PEAK-DETECTOR CIRCUITS
CURRENT LIMIT
CA3086 56pF 25µF CA3130 100k VOLTAGE ADJUST ERROR AMPLIFIER OUTPUT 40mA
0.01µF
2.2k
+20V INPUT CA3086
REGULATION LOAD FULL LOAD): 0.01% INPUT REGULATION: 0.02%/V NOISE OUTPUT: 25µV 100kHz
0.01
FIGURE VOLTAGE REGULATOR CIRCUIT 40mA)
2-119
CA3130, CA3130A
2N3055 2N2102 4.3k 3.3k 2N5294 1000pF 2.2k CA3086 2N2102 CA3130 8.2k ERROR AMPLIFIER 100µF CURRENT LIMIT ADJUST
100µF
+55V INPUT
OUTPUT:
VOLTAGE ADJUST
REGULATION LOAD FULL LOAD): 0.005% INPUT REGULATION: 0.01%/V NOISE OUTPUT: 250µV 100kHz
FIGURE VOLTAGE REGULATOR CIRCUIT (0.1
2-120
CA3130, CA3130A
Error-Amplifier Regulated-Power Supplies CA3130 ideal choice error-amplifier service regulated power supplies since function erroramplifier when regulated output voltage required approach zero. Figure shows schematic diagram 40mA power supply capable providing regulated output voltage continuous adjustment over range from volts. CA3086 transistor-array function zeners provide supply-voltage CA3130 comparator (IC1). configured impedance, temperature-compensated source adjustable reference voltage error amplifier. Transistors (another CA3086 transistor-array connected parallel series-pass element. Transistor functions current-limiting device diverting base drive from series-pass transistors, accordance with adjustment resistor Figure contains schematic diagram regulated power-supply capable providing regulated output voltage continuous adjustment over range from volts currents ampere. error amplifier (lC1) circuitry associated with function previously described, although output boosted discrete transistor (Q4) provide adequate base drive Darlington-connected series-pass transistors Transistor functions previously described current-limiting circuit. Multivibrators exceptionally high input resistance presented CA3130 attractive feature multivibrator circuit design because permits timing circuits with high ratios. circuit diagram pulse generator (astable multivibrator), with provisions independent control "on" "off" periods, shown Figure Resistors used bias CA3130 mid-point supply-voltage feedback resistor. pulse repetition rate selected positioning desired position rate remains essentially constant when resistors which determine "on-period" "off-period" adjusted. Function Generator Figure contains schematic diagram function generator using CA3130 integrator threshold detector functions. This circuit generates triangular squarewave output that swept over 1,000,000:1 range (0.1 kHz) means single control, voltagecontrol input also available remote sweep-control. heart frequency-determining system (OTA)*, lC1, operated voltage-controlled current-source. output, current applied directly integrating capacitor, feedback loop integrator lC2, using CA3130, provide triangular-wave output. Potentiometer used adjust circuit slope symmetry positive-going negative-going signal excursions. Another CA3130, IC3, used controlled switch excursion limits triangular output from integrator circuit. Capacitor "peaking adjustment" optimize high-frequency square-wave performance circuit. Potentiometer adjustable perfect "amplitude symmetry" square-wave output signals. Output from threshold detector back resistor input toggle current source from plus minus generating linear triangular wave. Operation with Output-Stage Power-Booster current-sourcing and-sinking capability CA3130 output stage easily supplemented provide power-boost capability. circuit Figure three CMOS transistorpairs single CA3600E* array shown parallel connected with output stage CA3130. Class mode CA3600E shown, typical device consumes supply current operation. This arrangement boosts current-handling capability CA3130 output stage about 2.5X. amplifier circuit Figure employs feedback establish closed-loop gain typical large-signal bandwidth (-3dB) kHz.
File Number technical information.
+15V
0.01µF 100k ON-PERIOD ADJUST 100k 100k 0.1µF 0.01µF 0.001µF CA3130 OUTPUT OFF-PERIOD ADJUST
FREQUENCY RANGE: POSITION 0.001µF 0.01µF 0.1µF PULSE PERIOD 40µs 10ms 0.4µs 100ms
FIGURE PULSE GENERATOR (ASTABLE MULTIVIBRATOR) WITH PROVISIONS INDEPENDENT CONTROL "ON" "OFF" PERIODS.
2-121
CA3130, CA3130A
270k VOLTAGE-CONTROLLED CURRENT SOURCE +7.5V +7.5V 100k -7.5V +7.5V SLOPE SYMMETRY ADJUST VOLTAGE CONTROLLED INPUT 56pF FREQUENCY ADJUST (100kHz MAX) -7.5V -7.5V 100k AMPLITUDE SYMMETRY ADJUST -7.5V CA3130 INTEGRATOR 100pF +7.5V HIGH FREQ. ADJUST 30pF
THRESHOLD DETECTOR 150k +7.5V CA3130
CA3080A
-7.5V
FILE NUMBER AN6668 TECHNICAL INFORMATION
FIGURE FUNCTION GENERATOR (FREQUENCY VARIED 1,000,000/1 WITH SINGLE CONTROL).
+15V
0.01µF CA3600E* CA3130
750k
500µF
150mW 10%)
AV(CL) LARGE SIGNAL BW(-3 50kHz
NOTE: TRANSISTORS PARALLEL CONNECTED WITH Q12, RESPECTIVELY, CA3130
510k
*SEE FILE NUMBER
FIGURE CMOS TRANSISTOR ARRAY (CA3600E) CONNECTED POWER BOOSTER OUTPUT STAGE CA3130.
2-122

BiMOS Operational Amplifier with MOSFET Input/CMOS Output CA3130A

Top Searches for this datasheet

Other recent searches