BiCMOS Interface Logic, D-Type Flip-Flops, Three-State CD74FCT821

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BiCMOS Interface Logic, D-Type Flip-Flops, Three-State CD74FCT821

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CD74FCT821A, CD74FCT822A
BiCMOS Interface Logic, D-Type Flip-Flops, Three-State
CD74FCT821A CD74FCT822A bit, D-Type, three-state, positive edge triggered flip-flops small geometry BiCMOS technology. output stage combination bipolar CMOS transistors that limits output HIGH level diode drops below VCC. This resultant lowering output swing 3.7V) reduces power ringing source EMI) minimizes bounce ground bounce their effects during simultaneous output switching. output configuration also enhances switching speed capable sinking milliamperes. flip-flops enter data into their registers HIGH transition clock(CP). Output Enable (OE) controls three state outputs independent register operation. When Output Enable (OE) HIGH, outputs high impedance state. CD74FCT821A CD74FCT822A share same configurations, CD74FCT821A outputs noninverted while CD74FCT822A devices have inverted outputs.
January 1997
Features
Buffered Inputs
MMEN ology
Typical Propagation Delay: 7.5ns 25oC, 50pF CD74FCT821A Noninverting CD74FCT822A Inverting Latchup Resistant BiCMOS Process Circuit Design Speed Bipolar FASTTM/AS/S 48mA Output Sink Current Output Voltage Swing Limited 3.7V Controlled Output Edge Rates Input/Output Isolation BiCMOS Technology with Quiescent Power
Ordering Information
PART NUMBER CD74FCT821AEN CD74FCT822AEN CD74FCT821AM TEMP. RANGE (oC) PACKAGE PDIP PDIP SOIC PKG. E24.3 E24.3 M24.3
NOTE: When ordering suffix packages, entire part number. suffix obtain variant tape reel.
Pinouts
CD74FCT821A (PDIP, SOIC) VIEW
CD74FCT822A (PDIP, SOIC) VIEW
CAUTION: These devices sensitive electrostatic discharge. Users should follow proper Handling Procedures. FASTis trademark Fairchild Semiconductor. Copyright Harris Corporation 1997
File Number
2390.2
CD74FCT821A, CD74FCT822A Functional Diagram
821A 822A
TRUTH TABLE OUTPUTS INPUTS NOTE: HIGH level (steady state) level (steady state) Immaterial Transition from HIGH level HIGH impedance change CD74FCT821A CD74FCT822A
Logic Symbol
CD74FCT821A
CD74FCT822A
CD74FCT821A, CD74FCT822A
Absolute Maximum Ratings
Supply Voltage (VCC) -0.5V Diode Current, (For -0.5V) -20mA Output Diode Current, (for -0.5V) -50mA Output Sink Current Output Pin, 70mA Output Source Current Output Pin, -30mA Current (ICC) 260mA Ground Current (IGND). 500mA
Thermal Information
Thermal Resistance (Typical, Note (oC/W) PDIP Package SOIC Package Maximum Junction Temperature 150oC Maximum Storage Temperature Range .-65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC (SOIC-Lead Tips Only)
Operating Conditions
Operating Temperature Range, .0oC 70oC Supply Voltage Range, .4.75V 5.25V Input Voltage, Output Voltage, Input Rise Fall Slew Rate, dt/dv. 10ns/V
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTE: measured with component mounted evaluation board free air.
Electrical Specifications Commercial Temperature Range 70oC, 5.25V, VCC, 4.75V
AMBIENT TEMPERATURE (TA) TEST CONDITIONS PARAMETER High Level Input Voltage SYMBOL IOZH IOZL Input Clamp Voltage 3.4V (Note (mA) 4.75 5.25 4.75 5.25 25oC 70oC UNITS
Level Input Voltage
High Level Output Voltage Level Output Voltage High Level Input Current Level Input Current Three-State Leakage Current
0.55 -0.1 -0.5 -1.2
0.55 -1.2
Short Circuit Output Current (Note
Quiescent Supply Current, Additional Quiescent Supply Current Input Inputs High, Unit Load NOTES:
more than output should shorted time. Test duration should exceed 100ms. Inputs that measured GND. Input Loading: inputs unit load. Unit load limit specified Electrical Specifications table, e.g., 1.6mA Max. 70oC.
CD74FCT821A, CD74FCT822A
Switching Specifications Over Operating Range Series 2.5ns, 50pF, (See Figures)
25oC PARAMETER Propagation Delays (Note Clock Clock Output Enable Output Disable Output Enable Output Disable Power Dissipation Capacitance (Note Minimum (Valley) During Switching Other Outputs (Output Under Test Switching) Maximum (Peak) During Switching Other Outputs (Output Under Test Switching) Input Capacitance Three-State Output Capacitance NOTES: Minimum 5.25V 70oC, Maximum 4.75 70oC, Typical CPD, measured flip-flop, used determine dynamic power consumption. (per package) (VCC2 fOCL where: supply voltage flow through current unit load output load capacitance duty cycle input high output frequency input frequency CD74FCT821A CD74FCT822A CD74FCT821A CD74FCT821A CD74FCT822A CD74FCT822A tPLH, tPHL tPLH, tPHL tPZL, tPZH tPLZ, tPHZ tPZL, tPZH tPLZ, tPHZ VOHV VOLP Typical 25oC Typical 25oC SYMBOL 70oC UNITS
Prerequisite Switching
25oC PARAMETER Maximum Frequency (Note Data Clock Setup Time Data Clock Hold Time Clock Pulse Width NOTE: Minimum 4.75V 70oC, Typical SYMBOL fMAX 70oC UNITS
CD74FCT821A, CD74FCT822A Test Circuits Waveforms
2.5ns (NOTE PULSE 50pF
SWITCH POSITION TEST tPLZ, tPZL, Open Drain tPHZ, tPZH, tPLH, tPHL SWITCH Closed Open
NOTE: Pulse Generator Pulses: Rate 1.0MHz; ZOUT 2.5ns. FIGURE TEST CIRCUIT
DEFINITIONS: Load capacitance, includes probe capacitance. Termination resistance, should equal ZOUT Pulse Generator. Input: 2.5ns (10% 90%), unless otherwise specified
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL tREM
1.5V 1.5V 1.5V
LOW-HIGH-LOW PULSE
1.5V
SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. 1.5V HIGH-LOW-HIGH PULSE
1.5V
FIGURE SETUP, HOLD, RELEASE TIMING
FIGURE PULSE WIDTH
ENABLE CONTROL INPUT tPZL 3.5V OUTPUT NORMALLY SWITCH CLOSED tPZH OUTPUT NORMALLY HIGH SWITCH OPEN 1.5V 1.5V
DISABLE 1.5V tPLZ 3.5V OUTPUT 0.3V tPHZ 0.3V OPPOSITE PHASE INPUT TRANSITION tPLH tPHL SAME PHASE INPUT TRANSITION tPLH tPHL
1.5V 1.5V 1.5V
FIGURE ENABLE DISABLE TIMING
FIGURE PROPAGATION DELAY
Test Circuits Waveforms
(Continued)
OTHER OUTPUTS OUTPUT UNDER TEST VOHV VOLP
NOTES: VOLP measured with respect ground reference near output under test. VOHV measured with respect VOH. Input pulses have following characteristics: 1MHz, 2.5ns, 2.5ns, skew 1ns. R.F. fixture with 700MHz design rules required. should soldered into test board bypassed with 0.1µF capacitor. Scope probes require 700MHz bandwidth. FIGURE SIMULTANEOUS SWITCHING TRANSIENT WAVEFORMS
IMPORTANT NOTICE Texas Instruments subsidiaries (TI) reserve right make changes their products discontinue product service without notice, advise customers obtain latest version relevant information verify, before placing orders, that information being relied current complete. products sold subject terms conditions sale supplied time order acknowledgement, including those pertaining warranty, patent infringement, limitation liability. warrants performance semiconductor products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS INVOLVE POTENTIAL RISKS DEATH, PERSONAL INJURY, SEVERE PROPERTY ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). SEMICONDUCTOR PRODUCTS DESIGNED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. INCLUSION PRODUCTS SUCH APPLICATIONS UNDERSTOOD FULLY CUSTOMER'S RISK. order minimize risks associated with customer's applications, adequate design operating safeguards must provided customer minimize inherent procedural hazards. assumes liability applications assistance customer product design. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used. TI's publication information regarding third party's products services does constitute TI's approval, warranty endorsement thereof.
Copyright 1999, Texas Instruments Incorporated

BiCMOS Interface Logic, D-Type Flip-Flops, Three-State CD74FCT821

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