AP083001.EXE available additional file Emulating synchronous

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

AP083001.EXE available additional file Emulating synchronous

Datasheet Thumbnail

Top Searches for this datasheet

AP083001
AP083001.EXE available
additional file
Emulating synchronous serial interface (SSC) interface software routines
Abstract: solution presented this paper attached source files emulates most important functions using routines implemented code focused C513, will C500 derivatives. Beyond level software drivers test shell delivered. This shell allows quick test software drivers emulator starter demo board.
Author: Boelderl-Ermel,
Semiconductor Group
09/98, Rel.
Emulating Interface Routines
Introduction. General Operation Hardware Environment. Supported Features. Required Resources External Routing Principles Emulation 2.4.1 Master Mode. 2.4.2 Slave Mode. Emulation Software Description. Software Structure. Main Program Emulation Subroutines Baud Rate Calculation Load Measurement. Performance Limitations. Make File. Support KitCON-513 Evaluation Board
AP0830 ApNote Revision History Actual Revision Rel.01 Previous Revision: none Page Page (Subjects changes since last release) actual Rel. prev. Rel.
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Introduction
C500 microcontroller family usually provides only on-chip synchronous serial channel (SSC). second required, emulation missing interface help avoid external hardware solution with additional electronic components. solution presented this paper attached source files emulates most important functions using optimized routines with performance KBaud Slave Mode with half duplex transmission overhead less than C513 with MHz. implementation this performance limit chip. pure implementation assembler will result strong reduction load therefore increase maximum speed interface. addition, microcontrollers like C505 will speed interface factor because optimized architecture compared with C513. Moreover, this solution lays stress using on-chip hardware resources possible. more excessive consumption those resources will result higher maximum speed emulated interface. restricted performance microcontroller compatible solution provided only; internal register based programming interface replaced subroutine calls. attached source files also contain test shell, which demonstrates exchange information between on-chip HW-SSC emulated SW-SSC external wires different operation modes. based C513 (Siemens microcontroller).
table with load measurements presented give indication fraction performance required software emulating SSC.
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
General Operation Hardware Environment
Supported Features following enumeration summarizes features on-chip emulated software routines: data frames with variable baud rate, master mode selected: reception transmission data half duplex mode slave mode selected: either reception transmission data possible falling clock edge Clock Polarity selection, Clock Phase selection, following enumeration lists functions C500 on-chip SSC, which could cloned technical limitations performance restrictions: baud rates higher than Master Mode higher than Slave Mode C513 with crystal, Slave Mode with data transmission reception triggered rising clock edge, full duplex communication.
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Required Resources emulate interface software routines requires some resources listed following table: Table Resource Requirements Resource Number required pins Number interrupt pins Interrupt Priority Timer Program Memory (Emulation routines only) Data Memory (Emulation routines only)
Emulated (Auto Reload) Byte Byte
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
External Routing external wire connecting clock input with External0 Interrupt required trigger SW-SSC configured Slave Mode. test boards with C513 processor on-chip HW-SSC also used `external party'.
SCLK SCLK
/SLS
/SLS
C513 HWSSC
-SSC-EN
-SSC-EN
Figure External Routing Transmission Control Lines
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Principles Emulation algorithms required emulating data transmission depend operation mode. 2.4.1 Master Mode timer configured `Auto-Reload Mode' loaded with half time required baud rate. associated interrupt service routine toggles SW-SCLK transmits receives data bit. timer stopped after 16th clock edge.
start_sw_ master_write()
Timer generating SCLK, shifting data out, reading data Data shifted
Data read
Figure Schematic Diagram emulated operating Master Mode
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
2.4.2 Slave Mode Slave Mode handled External Interrupt triggered falling edges external Master Clock. restrictions controller architecture rising signal edges cannot detected External Interrupt pins which prevents full duplex data transmission unlimited combination Clock Phase Clock Polarity selection. Therefore, falling edges external Master Clock used sampling externally provided data bits shifting internally generated data bits only. file ssc_emul.c communication direction selected when code translated compiler.
External generated SCLK External Interrupt handling read, write
Data shifted
Data read Figure Schematic Diagram emulated operating Slave Mode
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Emulation Software Description
Software Structure emulation software written split into files: ssc_emul.c contains level software drivers (subroutines interrupt services) emulate SSC. This file directly added user's application software directory included make file. ssc_test.c demonstrates start, control finish emulation. complete file (test shell) used check level software drivers real application. Afterwards, user copy required statements calling individual functions into application code segments. ssc_defi.h holds definitions declarations related emulation software (ssc_test.c, ssc_emul.c)
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Main Program main program (ssc_test.c) implemented state machine handles several test cases.
SSC_INIT_ _SW_MASTER_ _LINK
SSC_FINISH_ _SW_SLAVE_ _LINK SSC_SW_ _MASTER_ _WRITE_OUT ssc_byte_number SSC_BUFFER _LENGTH SSC_WHILE_ _SW_MASTER _WRITES_OUT
ssc_sw_flag_ _slave_ready ssc_byte_number SSC_BUFFER_LENGTH ssc_sw_ _flag_ _slave_ _ready
SSC_WHILE_ _SW_SLAVE_ _READS_IN
ssc_byte_number SSC_BUFFER _LENGTH
ssc_sw_flag_ _slave_ready ssc_byte_number SSC_BUFFER _LENGTH
SSC_FINISH_ _SW_MASTER_ _LINK
SSC_HW_ _MASTER_ WRITE_OUT
SSC_INIT_ _SW_SLAVE_ _LINK
Figure State Machine Diagram test program "ssc_test.c"
Semiconductor Group AP083001 09.98
Emulating Interface Routines
first test case verifies emulated data transmission external source: first state `SSC_INIT_SW_MASTER_LINK' emulated interface initialized Master Mode with baud rate supported (15KBaud). communication partner serves on-chip HW-SSC which Slave Mode. second state `SSC_SW_MASTER_WRITE_OUT' starts SW-SSC writing clock signal conform selected Clock Phase Clock Polarity. third state flag polled indicating data transmission SW-SSC. User application code executed during SW-SSC write operation included here instead wasting times only running polling loop. After finishing transmission whole message string containing programmable number bytes state machine proceeds next state. last state `SSC_FINISH_SW_MASTER_LINK' disables hardware software modules required data transmission. state machine continues with next test case. second test case communication started with altered transmission direction. SW-SSC operates Slave receives message string from onchip HW-SSC.
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Emulation Subroutines file ssc_emul.c contains subroutines interrupt services required controlling emulation: `ssc_init_sw_ssc' initializes required auxiliary hardware modules like Timer External Interrupt input programming their control registers.
`ssc_start_sw_master_write()' prepares data transmission SW-SSC writing
first data first clock state. timer loaded with half time desired baud rate started `Auto-Reload Mode'. timer load value achieving `half time' calculated formula presented chapter 3.4. addition, this subroutine called software emulated wants read word master mode, because timer clock generation started here. `ssc_disable_sw_ssc()' disables required auxiliary hardware modules like Timer External Interrupt input setting their control registers respectively. `ssc_int0_interrupt_service()' enabled SW-SSC initialization `Slave Mode' started `Low' level SW-SSC-SCLK pin, which externally wired interrupt0 pin. Because half duplex transmission supported only transmission direction controlled Conditional Compiling Directive. Selecting `READ' directive produces code sample logic state SW-SSC-SRI input bit; otherwise code generated which provides SW-SSC-STO with output bit. enabled `SW-SSC Master Mode' only. generates clock edge SW-SSC-SCLK pin. transmission direction also controlled Conditional Compiling Directive. Selecting `READ' directive produces code read data from SW-SSC-SRI according Clock Phase initialization SCLK edge count; otherwise code generated which shifts data SW-SSC-STO pin. software emulated which wants make both directions modified easily this point.
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Baud Rate Calculation Data transmission emulated interface initialized `Master Mode' requires baud rate generation internal timer. transmission baud rate determined clock oscillator base frequency selected prescaler factor. load reload values timer emulating SW-SSC baud rate generator calculated presented next formula:
Half_ Bit_ Time_ using_ timer0 *(256 TL0) fosc
Timer Reload Register must loaded with same value. Table Calculated Timer0 Load Reload Values Master Mode Baud Rate TL0, Load Value fosc Time fosc 15.0 66.66 0xDF 133.33 0xBE 266.66 0x7b
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Load Measurement Emulating hardware module software subroutines decreases processor performance available user application software. load analysis shows fraction processor performance required emulating routines. processor load generated emulation software defined
Load Time spent emulating interrupt service routines 100% Total amount time transmitting receiving bytes
execution time required interrupt service routines emulating calculated analyzing compiler object module listing. next table presents load measurement results emulation running with different baud rates operation modes. Table Load Measurement Values emulation Master Mode C513 Crystal Frequency Baud Rate Load 15.0 70.0% 35.0% 18.0% Attention: load value increases with falling clock generator frequencies. Table Load Measurement Values emulation Slave Mode C513 Crystal Frequency Baud Rate Load
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Performance Limitations most severe limitation seen timer interrupt service routine handling Master mode baud rate. Every clock edge generated timer (twice bit!) which also reloads timer reads writes data beginning with position. Another fact which reduces maximum baudrate application implementation solution assembler would have much more performance. course, this solution would that easy understood like solution code. advised implement intensive routines assembler performance sensitive applications used. Moreover this application note attempt on-chip hardware resources possible. This effort results higher demand software performance. addition having look C500 derivatives taken care about fact that e.g. C505 twice performance than C513. solution using C505 will result twice maximum baudrate than C513.
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Make File file ssc_make.bat contains statements start Keil C51compiler, linker locator. (Versions: V5.10, V3.52, V2.1) paths source file compiler library directories must modified user respect individual file structure personal computer. Make-File started typing `ssc_make.bat' window switched directory containing this batch file.
Semiconductor Group
AP083001 09.98
Emulating Interface Routines
Support KitCON-513 Evaluation Board KitCON-513 Evaluation Board starter (order Siemens Semiconductors www) which helps general approach C513. Generally speaking printed circuit board which lets load software down C513. After that C513 executes that code verified. starter delivered with C513 romless device C513 EEPROM device. advised firstly make C513 romless device load (program) code down C513 EEPROM device. After that devices (romless EEPROM) have changed programmed code executed on-chip EEPROM. Using "test shell" usa_test.c SW-USART C513 EEPROM communicates with chip HW-USART C513 EEPROM device. port pins selected SW-SSC neighboured related HW-SSC pins easily connected setting jumpers KitCON application area connector: next table presents port pins externally wired: Table Port pins externally wired KitCON-513 Evaluation Board HW-SSC-SCLK HW-SSC-SRI HW-SSC-SLS (P1.2) (P1.3) (P1.5) SW-SSC-SLK (P1.0) SW-SSC-STO (P1.1) SW-SSC-SLS (P1.6) Ext. Interrupt (P3.2) Enable-HWX SSC-SLS (P1.7) Note: SW-SSC-SRI HW-SSC-STO internally connected sharing same (P1.4) need external wire. Note: SW-SSC-SLS directly controlled test state machine file ssc_test.c does need external wire. After pressing restart button test program runs endless loop.
Semiconductor Group
AP083001 09.98

AP083001.EXE available additional file Emulating synchronous

Top Searches for this datasheet

Other recent searches