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AN-HK-32

Motorola Semiconductor Application Note
Order this document by AN-HK-32 / H Rev. 2.0
AN-HK-32
In-Circuit Programming of FLASH Memory in the MC68HC908GP32
By T.C. Lun Applications Engineering Microcontroller Division Hong Kong
This application note describes In-Circuit Programming (ICP) of the FLASH memory in the Motorola MC68HC908GP32 (GP32) microcontroller, a general purpose device based on the HC08 architecture that has 32k-bytes of on-chip FLASH. The text is divided into two parts: · · PART 1 - covers a general overview of ICP and techniques that can be applied to the GP32 PART 2 - covers a simple low-cost ICP implementation on the GP32
For detailed specification on MC68HC908GP32, please refer to the datasheet: Motorola order number MC68HC908GP32 / H.
PART 1 Introduction
In-circuit programming is a process by which the device is programmed or erased with the device on the final circuit board - the target system. This allows the user code to be changed without having to remove the device off the target system for reprogramming or initial programming. On GP32, the 32k-bytes FLASH memory is allocated for the user code, with an additional 36-bytes of FLASH for user defined reset and interrupt vectors. A high voltage supply is not required by the GP32 for program or erase operations as it is generated by an internal charge-pump. This
Monitor Mode
Initial FLASH Programming
In-Circuit Programming in User Mode
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In-Circuit Programming in Monitor Mode
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High Volt Entry to Monitor Mode
Blank Vector Entry to Monitor Mode
Other ICP Considerations
Signal Conditioning
Normal system activities will usually be halted during an ICP operation, to allow an uninterrupted programming process. Therefore, at the start of the ICP process, the MCU should be configured such that no pin contention or runaway signal will occur during the ICP process. Also note that when the system is first switched-on with a MCU having a blank FLASH memory, the port pins default to their reset states. If the MCU pins used for connecting to the external host are shared with the target system, make sure they are isolated to the proper logic level when the ICP connection is made.
Pin Isolation
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PART 2 Introduction
Mass Erasing the FLASH Memory in User Mode
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VDD GP32 MCU
PA0 Pins for target system use PA7
Figure 1. Mass Erase Port Pin Configuration The flowchart in figure 2 shows the sequence of events for the mass erase operation.
Power-On Reset
Initialize the PLL
Continue with user main program Perform mass erase routine
Figure 2. Mass Erase Flowchart 6
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Procedure for Mass Erase
Using the sample program, this step-by-step procedure erases the GP32 FLASH in user mode: 1. Switch off the power to the target system. 2. Isolate port pins PA0 and PA7 from target system logic. 3. Set PA0 to high via a pull-up resistor to VDD. 4. Set PA7 to ground directly to VSS. 5. Switch on the power to the target system. 6. Wait 2 seconds. 7. Switch off power to the target system. 8. FLASH memory is now erased. The next section describes the procedure for programming the GP32 FLASH memory using blank vector entry to monitor mode.
Programming the FLASH Memory in Monitor Mode
The other two wires are only necessary for a high voltage entry to monitor mode. For this implementation, PA7 and IRQ are required to be grounded for the mode entry, and the crystal frequency must be 32.768kHz.
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SPGMR08 Adapter board connector GND CLK
(4.9152MHz) 1
GP32 MCU SW1
VSS OSC1
32.768kHz
R1 8k2 See note 5 R2 43k PA0
SW2 IRQ
VDD PA7
Pins for target system use power-on reset
Figure 3. Programming Setup Once the programming system is connected as in figure 3, the programming is carried out by running the MCUscribe utility supplied with the SPGMR08. When MCUscribe has finished programming, set the jumpers back to their original position, and then select the "power-off" command on the MCUscribe utility screen menu. 8
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Further Information
The above ICP method has two limitations. They are: 1. The erase and program operations are for the entire 32k-bytes of FLASH memory - An erase operation erases all FLASH locations a program operation programs all FLASH locations. 2. There must be no power outage during erase or program operations otherwise, a high voltage must be applied to the IRQ pin so that the MCU can enter Monitor mode. The alternative is to extract the MCU off the target system and reprogrammed using an external programmer. Further cost-savings can be achieved by using the circuit in figure 4 to replace the SPGMR08. Other ICP methods that can be applied to the GP32 are described in the application note: AN1770 - In-Circuit Programming of FLASH memory in the MC68HC908GP20.
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7.75V to 8V
0.1 µF VDD
2N3906
(optional)
10 k 10 k 1k 1N914 2N3906
Serial Programming Schematic
74HC125
1 k 2N3904
4.9152 MHz 74HC125 OSCILLATOR
Figure 4. ICP Interface Circuit
DB-9 CONNECTOR
4.9152 MHz
CLK (optional)
2 Serial Out
Serial In
PC HOST
The optional signals are required for high voltage entry to Monitor Mode.
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Program Listing
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set HVEN delay 4ms
clear ERASE flag delay 100us clear HVEN flag
RESET
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Notes
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