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Single 3.3V Supply Fast Read Access Time Automatic Page Write Operatio


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AT28LV010
Single 3.3V Supply Fast Read Access Time Automatic Page Write Operation Internal Address Data Latches 128-Bytes Internal Control Timer Fast Write Cycle Time Page Write Cycle Time Maximum 128-Byte Page Write Operation Power Dissipation Active Current CMOS Standby Current Hardware Software Data Protection DATA Polling Write Detection High Reliability CMOS Technology Endurance: 100,000K Cycles Data Retention: Years JEDEC Approved Byte-Wide Pinout Commercial Industrial Temperature Ranges
Megabit (128K Voltage Paged CMOS E2PROM
Description
AT28LV010 high-performance 3-volt only Electrically Erasable Programmable Read Only Memory. megabit memory organized 131,072 words bits. Manufactured with Atmel's advanced nonvolatile CMOS technology, device offers access times with power dissipation just When device deselected, CMOS standby current less than (continued) Configurations
Name I/O0 I/O7 Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs Connect Don't Connect
PDIP View
AT28LV010
PLCC View TSOP View
0395A
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Description (Continued)
AT28LV010 accessed like Static read write cycle without need external components. device contains 128-byte page register allow writing 128-bytes simultaneously. During write cycle, address 128-bytes data internally latched, freeing address data other operations. Following initiation write cycle, device will automatically write latched data using internal control timer. write cycle detected DATA polling I/O7. Once write cycle been detected access read write begin. Atmel's 28LV010 additional features ensure high quality manufacturability. device utilizes internal error correction extended endurance improved data retention characteristics. Software data protection implemented guard against inadvertent writes. device also includes extra 128-bytes E2PROM device identification tracking.
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias. -55°C +125°C Storage Temperature. -65°C +150°C Input Voltages (including Pins) with Respect Ground -0.6V +6.25V Output Voltages with Respect Ground .-0.6V 0.6V Voltage with Respect Ground -0.6V +13.5V
*NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions beyond those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
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AT28LV010
AT28LV010
Device Operation
READ: AT28LV010 accessed like Static RAM. When high, data stored memory location determined address pins asserted outputs. outputs high impedance state when either high. This dualline control gives designers flexibility preventing contention their system. WRITE: write operation AT28LV010 allows 128-bytes data written into device during single internal programming period. Each write operation must preceded software data protection (SDP) command sequence. This sequence series three unique write command operations that enable internal write circuitry. command sequence data written must conform software protected write cycle timing. Addresses latched falling edge whichever occurs last data latched rising edge whichever occurs first. Each successive byte must written within (tBLC) previous byte. tBLC limit exceeded AT28LV010 will cease accepting data commence interal programming operation. more than data byte written during single programming operation, they must reside same page defined state inputs. each high transition during page write operation, must same. inputs used specify which bytes within page written. bytes loaded order altered within same load period. Only bytes which specified writing will written; unnecessary cycling other bytes within page does occur. DATA POLLING: AT28LV010 features DATA Polling indicate write cycle. During byte page write cycle attempted read last byte written will result complement written data presented I/O7. Once write cycle been completed, true data valid outputs, next write cycle begin. DATA Polling begin anytime during write cycle. TOGGLE BIT: addition DATA Polling AT28LV010 provides another method determining write cycle. During write operation, successive attempts read data from device will result I/O6 toggling between zero. Once write completed, I/O6 will stop toggling valid data will read. Reading toggle begin time during write cycle. DATA PROTECTION: precautions taken, inadvertent writes occur during transitions host system power supply. Atmel incorporated both hardware software features that will protect memory against inadvertent writes. HARDWARE PROTECTION: Hardware features protect against inadvertent writes AT28LV010 following ways: power-on delay once reached 2.0V (typical) device will automatically time (typical) before allowing write: write inhibit holding low, high high inhibits write cycles; noise filter pulses less than (typical) inputs will initiate write cycle. SOFTWARE DATA PROTECTION: AT28LV010 incorporates industry standard software data protection (SDP) function. Unlike standard 5-volt only E2PROM's, AT28LV010 enabled times. Therefore, write operations must preceded command sequence. data 3-byte command sequence written device; addresses command sequence utilized just like other location device. attempt write device without 3-byte sequence will start internal timers. data will written device. However, duration tWC, read operations will effectively polling operations.
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Operating Range
AT28LV010-20 Operating Temperature (Case) Power Supply Com. Ind. 70°C -40°C 85°C 3.3V AT28LV010-25 70°C -40°C 85°C 3.3V
Operating Modes
Mode Read Write Standby/Write Inhibit Write Inhibit Write Inhibit Output Disable
DOUT High
High
Notes: VIH. Refer Programming Waveforms.
Characteristics
Symbol Parameter Input Load Current Output Leakage Current Standby Current CMOS Active Current Input Voltage Input High Voltage Output Voltage Output High Voltage 3.0V -100 3.0V Condition VI/O 0.3V MHz; IOUT 3.6V Com. Ind. Units
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AT28LV010
AT28LV010
Read Characteristics
AT28LV010-20 Symbol tACC
AT28LV010-25
Parameter Address Output Delay Output Delay Output Delay Output Float Output Hold from Address, whichever occurred first
Units
Read Waveforms
Notes: delayed tACC after address transition without impact tACC. delayed after falling edge without impact tACC after address change without impact tACC.
specified from whichever occurs first 5pF). This parameter characterized 100% tested.
Input Test Waveforms Measurement Level
Output Test Load
Capacitance MHz, 25°C)
COUT
Note:
Units
Conditions VOUT
This parameter characterized 100% tested.
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Write Characteristics
Symbol tAS, tOES tDH, tOEH
Note:
Parameter Address, Set-up Time Address Hold Time Chip Select Set-up Time Chip Select Hold Time Write Pulse Width Data Set-up Time Data, Hold Time
Units
write operations must preceded command sequence.
Write Waveforms
Controlled
Controlled
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AT28LV010
AT28LV010
Software Protected Write Characteristics
Symbol tBLC tWPH Parameter Write Cycle Time Address Set-up Time Address Hold Time Data Set-up Time Data Hold Time Write Pulse Width Byte Load Cycle Time Write Pulse Width High Units
Programming Algorithm
LOAD DATA ADDRESS 5555 LOAD DATA ADDRESS 2AAA LOAD DATA ADDRESS 5555 LOAD DATA ADDRESS LOAD LAST BYTE LAST ADDRESS
Notes: Data Format: I/O7 I/O0 (Hex); Address Format: (Hex). Data protect state will re-activated program cycle. 128-bytes data loaded.
WRITES ENABLED
ENTER DATA PROTECT STATE
Software Protected Program Cycle Waveforms
Notes: must conform addressing sequence first 3-bytes shown above. After command sequence been issued page write operation follows, page address inputs A16) must same each high transition CE). must high only when both low.
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Data Polling Characteristics
Symbol tOEH Parameter Data Hold Time Hold Time Output Delay
Units
Write Recovery Time
Notes: These parameters characterized 100% tested.
Read Characteristics.
Data Polling Waveforms
Toggle Characteristics
Symbol tOEH tOEHP Parameter Data Hold Time Hold Time Output Delay High Pulse Write Recovery Time
Read Characteristics.
Units
Notes: These parameters characterized 100% tested.
Toggle Waveforms
Notes: Toggling either both will operate toggle bit. Beginning ending state I/O6 will vary.
address location used address should vary.
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AT28LV010
AT28LV010
Ordering Information
tACC (ns) (mA) Active Standby AT28LV010-20JC AT28LV010-20PC AT28LV010-20TC AT28LV010-20JI AT28LV010-20PI AT28LV010-20TI AT28LV010-25JC AT28LV010-25PC AT28LV010-25TC AT28LV010-25JI AT28LV010-25PI AT28LV010-25TI Ordering Code Package 32P6 32P6 32P6 32P6 Operation Range Commercial 70°C) Industrial (-40° 85°C) Commercial 70°C) Industrial (-40° 85°C)
Note: Valid Part Number table below.
Valid Part Numbers
following table lists standard Atmel products that ordered. Device Numbers
AT28LV010 AT28LV010
Speed
Package Temperature Combinations
Package Type
32P6
Lead, Plastic J-Leaded Chip Carrier (PLCC) Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) Lead, Plastic Thin Small Outline Package (TSOP)
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