| |
Datasheet Home \ Datasheet Details
Download
PDF Abstract Text:
AT27C080
· Fast Read Access Time - 90 ns · Low Power CMOS Operation ·
AT27C080
Features
· Fast Read Access Time - 90 ns · Low Power CMOS Operation ·
8-Megabit (1M x 8) UV Erasable CMOS EPROM AT27C080
Description
Pin Configurations
Pin Name A0 - A19 O0 - O7 CE OE Function Addresses Outputs Chip Enable Output Enable TSOP Top View Type 1
A11 A9 A8 A13 A14 A17 A18 VCC A19 A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE / VPP A10 CE 07 06 05 04 03 GND 02 01 O0 A0 A1 A2 A3
CDIP, PDIP, SOIC Top View
A19 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A18 A17 A14 A13 A8 A9 A11 OE / VPP A10 CE 07 06 05 04 03
PLCC Top View
A12 A15 A16 A19 VCC A18 A17
01 02 GND 03 04 05 06
A14 A13 A8 A9 A11 OE / VPP A10 CE 07
0360F-B-7 / 97
System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.
Erasure Characteristics
AT27C080
Block Diagram
Absolute Maximum Ratings
Temperature Under Bias ..........-55°C to +125°C Storage Temperature.............-65°C to +150°C Voltage on Any Pin with Respect to Ground ..............-2.0V to +7.0V(1) Voltage on A9 with Respect to Ground .............-2.0V to +14.0V(1) VPP Supply Voltage with Respect to Ground .............-2.0V to +14.0V(1) Integrated UV Erase Dose........ 7258 W·sec / cm2
Note: 1. NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.
Operating Modes
Mode / Pin Read Output Disable Standby Rapid Program PGM Verify PGM Inhibit Product Identification
Notes:
CE VIL X VIH VIL VIL VIH VIL
OE / VPP VIL VIH X VPP VIL VPP VIL
Outputs DOUT High Z High Z DIN DOUT High Z Identification Code
DC and AC Operating Conditions for Read Operation
Operating Temperature (Case) VCC Power Supply
Com. Ind.
DC and Operating Characteristics for Read Operation
1. VCC must be applied simultaneously or before OE / VPP, and removed simultaneously or after OE / VPP.
AC Characteristics for Read Operation
AT27C080
-90 Symbol Parameter tACC(4) tCE
-10 Max 90 90 20 30 Min Max 100 100 20 30 0 0 Min
-12 Max 120 120 30 35 0 Min
-15 Max 150 150 35 40 Units ns ns ns ns ns
Address to Output Delay CE to Output Delay OE to Output Delay OE or CE High to Output Float, whichever occurred first Output Hold from Address, CE or OE / VPP, whichever occurred first
tDF(2)(5) tOH Note:
2, 3, 4, 5. See AC Waveforms for Read Operation.
AT27C080
AC Waveforms for Read Operation(1)
Notes:
Input Test Waveform and Measurement Levels
Output Test Load
Note:
Pin Capacitance
Note:
Units pF pF
Programming Waveforms
Notes:
The Input Timing reference is 0.8V for V IL and 2.0V for VIH. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
DC Programming Characteristics
AT27C080
AC Programming Characteristics
Notes:
Parameter Address Setup Time OE / VPP Setup Time OE / VPP Hold Time Data SetupTime Address Hold Time Data Hold Time CE High to Output Float Delay VCC Setup Time CE Program Pulse Width Data Valid from CE OE / VPP Recovery Time OE / VPP Pulse Rise Time During Programming
Test Conditions(1)
Min 2.0 2.0
Units µs µs µs µs µs µs
Pins Codes Manufacturer Device Type A0 0 1 O7 0 1 O6 0 0 O5 0 0 O4 1 0 O3 1 1 O2 1 0 O1 1 1 O0 0 0 Hex Data 1E 8A
Rapid Programming Algorithm
A 50 µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and OE / VPP is raised to 13.0V. Each address is first programmed with one 50 µs CE pulse without verification. Then a verification reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 50 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. OE / VPP is then lowered to VIL and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails.
AT27C080
Ordering Information
tACC (ns) 90 ICC (mA) Active 40 Standby 0.1 Ordering Code AT27C080-90DC AT27C080-90JC AT27C080-90PC AT27C080-90RC AT27C080-90TC AT27C080-90DI AT27C080-90JI AT27C080-90PI AT27C080-90RI AT27C080-90TI AT27C080-10DC AT27C080-10JC AT27C080-10PC AT27C080-10RC AT27C080-10TC AT27C080-10DI AT27C080-10JI AT27C080-10PI AT27C080-10RI AT27C080-10TI Package 32DW6 32J 32P6 32R 32T 32DW6 32J 32P6 32R 32T 32DW6 32J 32P6 32R 32T 32DW6 32J 32P6 32R 32T Operation Range Commercial (0°C to 70°C)
Industrial (-40°C to 85°C)
Commercial (0°C to 70°C)
Industrial (-40°C to 85°C)
(continued)
Package Type 32DW6 32J 32P6 32R 32T 32-Lead, 0.600" Windowed, Ceramic Dual Inline Package (Cerdip)
32-Lead, Plastic J-Leaded Chip Carrier (PLCC) 32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
32-Lead, 0.450" Wide, Plastic Gull Wing Small Outline (SOIC)
32-Lead, Plastic Thin Small Outline Package (TSOP)
Ordering Information (Continued)
tACC (ns) 120 ICC (mA) Active 40 Standby 0.1 Ordering Code AT27C080-12DC AT27C080-12JC AT27C080-12PC AT27C080-12RC AT27C080-12TC AT27C080-12DI AT27C080-12JI AT27C080-12PI AT27C080-12RI AT27C080-12TI AT27C080-15DC AT27C080-15JC AT27C080-15PC AT27C080-15RC AT27C080-15TC AT27C080-15DI AT27C080-15JI AT27C080-15PI AT27C080-15RI AT27C080-15TI Package 32DW6 32J 32P6 32R 32T 32DW6 32J 32P6 32R 32T 32DW6 32J 32P6 32R 32T 32DW6 32J 32P6 32R 32T Operation Range Commercial (0°C to 70°C)
Industrial (-40°C to 85°C)
Commercial (0°C to 70°C)
Industrial (-40°C to 85°C)
Package Type 32DW6 32J 32P6 32R 32T 32-Lead, 0.600" Windowed, Ceramic Dual Inline Package (Cerdip)
32-Lead, Plastic J-Leaded Chip Carrier (PLCC) 32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
32-Lead, 0.450" Wide, Plastic Gull Wing Small Outline (SOIC)
32-Lead, Plastic Thin Small Outline Package (TSOP)
AT27C080
|