AN878 POWER APPLICATIONS Prepared Hejhall Staff Engineer

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AN878 POWER APPLICATIONS Prepared Hejhall Staff Engineer

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AN878
POWER APPLICATIONS
Prepared Hejhall Staff Engineer
INTRODUCTION
assumption made that reader familiar with types, construction, electrical characteristics FETS. References contain information this subject. Silicon power FETs generally N-Channel enhancement mode devices. Most vertical structures, meaning that current flow primarily vertical through chip with bottom forming drain contact. Vertical construction advantage providing greater current density which translates more watts unit area silicon. assembly power wafers into finished devices similar assembly bipolar power transistors (BPTs). Identical packaging utilized both types devices.
ADVANTAGES POWER FETS
advantages FETs have been described elsewhere, will repeated detail. Some observations this subject given below. inherently higher power gain illustrated comparison MRF171 MRF315 BPT. Both devices rated watts power output. Typical power gains similar operating conditions MHz, Pout supply voltage 15.0 BPT. gain comparison should also include ruggedness data. Ruggedness defined ability device survive operation into mismatched loads. Obviously, microwave BPTs available with gains exceeding that MRF171 MHz, higher frequency BPTs will survive much abuse VHF. superior ruggedness even more impressive when recognized that source site ballasting used. Another gain comparison provided MRF174 MRF317 BPT. MRF317 rated watts output, contains internal input matching network which increases device gain typically MRF174 rated watts output internal input matching, typical gain MRF174 watts output while typical gain MRF317 watts output (both devices operating with supply). Impedance differences found mainly device input. input impedance approaches infinity, dropping level approximately equal slightly higher than input impedances comparable BPTs. This point illustrated considering again aforementioned watt devices. When operating with supply watts output,
large-signal input impedances 1.89-j4.81 ohms MRF171 +j1.0 ohms MRF315 BPT. These devices illustrate another difference. largesignal input impedance FETs capacitive. contrast, most BPTs with power outputs greater than watts have inductive input impedance MHz. input impedance MRF315 passes through resonance about MHz. low-noise figure FETs facilitates design low-noise power amplifiers high dynamic range receiver front ends. Noise figures less than MHz, have been measured with watt MRF174. MRF134 typical noise figure MHz, values have been measured. Transmitter noise floor determines antenna front back ratio required duplex systems. most interesting characteristic inherent gain control mechanism. power output amplifier varied from full rated output over range greater than (with input power held constant) varying gate voltage. Further, device gate does draw current, source utilized gain control does have deliver power FET. This capability, which does exist power BPT, facilitates design systems requiring gain control, either manual automatic.
AMPLIFIER DESIGN
design TMOS power amplifiers much common with design amplifiers. amplifier must include circuitry apply bias voltages matching networks perform necessary impedance transformation over frequency band interest. Amplifier design consists synthesis circuitry perform above tasks. positive supply voltage required drain. date most power FETs have been designed standard operating collector voltages, i.e. 12.5 Some higher voltage FETs also available. FETs described designed operation. There parallel popular zero base bias amplifier. typical power amplifier requires forward gate bias optimum power output gain. That news; good news that gate open circuit bias network often just simple resistive divider. convenient gate bias source drain supply. When utilizing this technique care must taken filtering bias circuitry. inadequately filtered bias circuit connected drain supply form output-to-input feedback path oscillations.
Application Motorola, Inc. 1993 Reports
AN878
amplifier (quiescent drain current) critical values range suggested. varied from less than values approaching Class operation without large changes gain efficiency full rated power. Linear applications exception this where should selected optimize linearity. design impedance matching networks amplifiers similar corresponding task amplifiers. These networks usually take form broadband transformers lumped reactive elements VHF, microstrip lines with chip capacitors UHF.5,6 Solid-state power amplifier drain collector load impedances primarily supply voltage power level. Therefore, amplifiers with like performance parameters utilize similar output networks. inductive input impedance high power BPTs usually dictates that input network design include shunt capacitors placed close transistor package physically possible. FETs, with their capacitive input impedances VHF, require these critical capacitive circuit elements. Figure shows watt amplifier which utilizes MRF174 TMOS FET. Note following items which have been discussed previously: shunt capacitors gate. Resistive bias network operating from drain supply voltage. Impedance matching networks similar those comparable amplifier (except item above). This amplifier operates from volt supply. typical gain survive operation into 30:1 VSWR load phase angle with damage. amplifier range excess This means that with input power held constant level that provides watts output, output power reduced less than watt continuously driving gate voltage negative from value. Figure illustrates this performance feature. Note that negative voltage capability would have added bias system take full advantage this performance. Another useful feature power FETs that they have less variation input output impedances with power level than does BPT. This characteristic permits small-signal port scattering parameters develop useful design information gain, stability, impedances.7 S-parameters often found power data sheets. While s-parameters will provide exact design solution high power operation, they produce useful first approximation. Power FETs with outputs below watt range often have such high gain that stability problems encountered. This problem addressed classic methods used stabilize small-signal amplifiers loading input output terminals, feedback, both. Here area where s-parameters useful calculating effects circuit techniques achieving stability. References discuss amplifier stability.
BIAS ADJUST
RFC1 INPUT
OUTPUT
Unleco Arco 462, Unleco Unleco Unleco Arco 461, Arco 463, C11, Erie Redcap C12, Feedthru 1N5925A Motorola Zener
AWG, 1-1/4 Turns, 0.213 0.25 AWG, Hairpin 0.25 0.062
AWG, Hairpin
Turns Enameled Wire RFC1 Turns Enameled Wire, Turn Bourns
0.47
Figure Watt, TMOS Amplifier
Application Reports
AN878
POWER OUTPUT (WATTS) mAdc CONSTANT
VGS, GATE-SOURCE VOLTAGE (Vdc)
Figure Gain Control Performance Watt Amplifier Figure shows watt amplifier utilizing MRF134 TMOS power FET. MRF134 very high gain which potentially unstable both UHF. Note that input loading resistor been utilized enhance stability. This amplifier gain drain efficiency 55%. Figure shows watt amplifier with nominal gain 10.5
involves temperature coefficient. Literature abounds with statements that FETs totally immune thermal runaway because their negative temperature coefficient. Actually, many power FETs have positive temperature coefficient over portion their operating range. Increasing drain current usually shifts coefficient from positive negative. Figure bias experiments have been conducted with several TMOS FETs. While they positive temperature coefficients over portion their operating ranges, none exhibited tendency toward thermal runaway drain currents ranging from less than full Class bias. Thermal runaway does appear problem, positive temperature coefficients suggest that designer should completely ignore thermal aspects bias design. second potential problem danger permanent damage gates from static electricity. Fortunately, larger capacitances power devices reduce this danger. special precautions have been taken protect FETs described from static damage, there were failures known caused static induced voltages. However, worthwhile exercise usual precautions taken handling devices.
SUMMARY
construction, characteristics, advantages power FETs have been described with emphasis frequency range. Particular attention given excellent gain control characteristics these devices.
CAUTIONARY NOTES
Some precautions regarding power amplifiers should mentioned.
INPUT
OUTPUT
BIAS ADJUST Arco 406,15 Arco 403, Arco 402,1.5 Erie Redcap C10, Feedthru 1N5925A Motorola Zener Turns, 0.310 Enamel, Long 3-1/2 Turns, 0.310 Enamel, 0.25 Long Turns, Enamel Wound Ferroxcube VK-200 19/4B ,1.0 Thin Film Turns, Beckman Instruments 8108 k,1/2 Carbon Board G10, mils
Figure Watt, TMOS Amplifier
Application Reports
AN878
INPUT OUTPUT
BIAS ADJUST mils Johanson C10, Erie Redcap, 0.001 C12, Feedthru 1N5925A Motorola Zener Turns, Enamel Ferroxcube VK-200 19/4B Thin Film Turns, Beckman Instruments 8108 0.166 Microstrip 0.166 Microstrip 0.95 0.166 Microstrip 0.166 Microstrip 0.85 0.166 Microstrlp Board Glass Teflon, mils
Figure Watt, TMOS Amplifier
VGS, GATE-SOURCE VOLTAGE (NORMALIZED)
CASE TEMPERATURE (°C)
REFERENCES
Field Effect Transistors Theory Practice, Motorola Semiconductor Sector Application Note AN-211A. Radio Amateur's Handbook, 59th Edition, Chapter ARRL, Inc., Newington, Granberg, Power MOSFETs versus Bipolar Transistors, R.F. Design Magazine, Nov./Dec., 1981. Also available Motorola Semiconductor Sector Application Note AN-860. DeMaw, Practical Class-A Class-C PowerFET Applications paper presented Midcon Electronic Show Convention, December, 1982. Granberg, Broadband Transformers Power Combining Techniques Motorola Semiconductor Sector Application Note AN-749. Becciolini, Impedance Matching Networks Applied Power Transistors, Motorola Semiconductor Sector Application Note AN-721. S-Parameters Circuit Analysis Design, HewlettPackard, Palo Alto, Application Note Hejhall, Small-Signal Design using Two-Port Parameters, Motorola Semiconductor Sector Application Note AN-215A.
Figure Gate-Source Voltage versus Case Temperature Constant Values Drain Current MRF174
Application Reports
AN878
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters vary different applications. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
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