Application Note September 1993 AN-7511 /Title (AN93 /Subject (In

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Application Note September 1993 AN-7511 /Title (AN93 /Subject (In

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Insulated-Gate Transistors Simplify AC-Motor Speed Control
Application Note September 1993 AN-7511
/Title (AN93 /Subject (InsulatedGate Transistors Simplify ACMotor Speed Control) /Autho /Keywords (Intersil Corporation, Semiconductor, Avalanche Energy Rated, Switch Power Supplies, Power Switch
IGT's input requirements On-state resistance simplify drive circuitry increase power efficiency motorcontrol applications. voltage-controlled, MOSFET-like input transfer characteristics insulated-gate transistor (IGT) (see EDN, September 1983, details) simplify power-control circuitry when compared with bipolar devices. Moreover, input capacitance mirroring that MOSFET that only one-third powerhandling capability. These attributes allow design simple, low-power gate-drive circuits using isolated level-shifting techniques. What's more, drive circuit control IGT's switching times suppress EMI, reduce oscillation noise, eliminate need snubber networks. Optoisolation Avoid Ground Loops gate-drive techniques described following sections illustrate economy flexibility brings power control: economy, because drive device's gate directly from preceding collector, resistor network, example; flexibility, because choose drive circuit's impedance yield desired turn-off time, switchable impedance that causes chargecontrolled device requiring less than nanocoulombs drive charge full turn-on. Take Some Driving Lessons Note IGT's straightforward drive compatibility with CMOS, NMOS open-collector TTL/HTL logic circuits common-emitter configuration Figure controls turnoff time, parallel combination sets turn-on time. Drive-circuit requirements, however, more complex common-collector configuration Figure this floating-gate-supply floating-control drive scheme, controls gate supply's power loss, governs turn-off time, sets turn-on time. Figure shows another common-collector configuration employing bootstrapped gate supply. this configuration, defines turn-off time, while controls turnon time. Note that gate's very leakage allows low-consumption bootstrap supplies using very low-value capacitors. Figure shows IGT's strong points. common-emitter Figure MOS-logic circuits drive device directly. common-collector mode, you'll need level shifting, using either second power supply Figure bootstrapping scheme Figure
LOAD CONTROLS tOFF
FIGURE SIMPLE DRIVING TRANSITION-TIME CONTROL
CONTROL INPUT
CONTROLS GATE SUPPLY POWER LOSS CONTROLS tOFF CONTROLS
LOAD
FIGURE SECOND POWER SUPPLY
CONTROLS tOFF CONTROLS LOAD
FIGURE BOOTSTRAPPING SCHEME
common-collector circuits, power-switch current flowing through logic circuit's ground create problems. Optoisolation solve this problem (Figure 2A.) Because high common-mode dV/dt possible this configuration, should optoisolator with very isolation capacitance; H11AV specs 0.5pF maximum.
©2001 Fairchild Semiconductor Corporation
Application Note 7511 Rev.
Application Note 7511
optically isolated "relay-action" switching, makes sense replace phototransistor optocoupler with H11L1 Schmitt-trigger optocoupler (Figure 2B).) applications requiring extremely high isolation, optical fiber provide signal gate-control photodetector. These circuit examples gate-discharge resistor control IGT's turn-off time. exploit fully IGT's safe operating area (SOA), this resistor allows time device's minority carriers recombine. Furthermore, recombination occurs without current crowding that could cause hot-spot formation latch-up pnpn action. very fast turn-off, minimal snubber network, which allows safe lower value gate resistors higher collector currents.
CONTROL INPUT H11AV2 LOAD
directly from levels, thanks 1.2V, 20mA input parameters. Available photovoltaic couplers have output-current capability approximately 100µA. Combined with approximately 100k equivalent shunt impedance IGT's input capacitance, this current level yields very long switching times. These transition times (typically ranging msec) vary with photovoltaic coupler's drive current IGT's Miller-effect equivalent capacitance. Figure illustrates typical photovoltaic-coupler drive along with transient response. some applications, photovoltaic element charge storage capacitor that's subsequently switched with phototransistor isolator. This isolator technique similar that used bootstrap circuits provides rapid turn-on turn-off while maintaining small size, good isolation cost. common-collector applications involving high-voltage, reactive-load switching, capacitive currents low-level logic circuits flow through isolation capacitance control element (eg, pulse transformer, optoisolator, piezoelectric coupler level-shift transistor). These currents cause undesirable effects logic circuitry, especially highimpedance, low-signal-level CMOS circuits.
DIG22 CONTROL INPUT
FIGURE AVOID GROUND-LOOP PROBLEMS USING OPTOISOLATOR. ISOLATOR IGNORES SYSTEM GROUND CURRENTS ALSO PROVIDES HIGH COMMON-MODE RANGE.
300V 1N5061 10µF 5.6k 5.6k CONTROL INPUT H11L1 5.6k
OUTPUT CURRENT
INPUT CURRENT LOAD
FIGURE SCHMITT-TRIGGER OPTOISOLATOR YIELDS "SNAP-ACTION" TRIGGERING SIMILAR THAT RELAY.
FIGURE ANOTHER OPTICAL-DRIVE OPTION, PHOTOVOLTAIC COUPLER PROVIDES ISOLATED, REMOTE SUPPIY IGT'S INPUT. 100µA OUTPUT, HOWEVER, YIELDS LONG TURN-ON TURN-OFF TIMES.
Pulse-Transformer Drive Cheap Efficient Photovoltaic couplers provide another means driving IGT. Typically, these devices contain array small silicon photovoltaic cells, illuminated infrared diode through transparent dielectric. photovoltaic coupler provides isolated, controlled, remote supply without need oscillators, rectifiers filters. What's more, drive
solution? fiber-optic components Figure eliminate problems completely. added feature, this lowcost technique provides physical separation between power logic circuitry, thereby eliminating effects radiated high-flux magnetic fields typically found near power-switching circuits. could this method with bootstrap-supply circuit, although fiber-optic system's reduced transmission efficiency could require gain/speed trade-off. added bipolar signal transistor minimizes potential compromise.
Application Note 7511 Rev.
©2001 Fairchild Semiconductor Corporation
Application Note 7511
CONTROL 1N914 INPUT GFOE1A1 2N5354 GFOD1A1
EMITTER (DISCONNECTED)
(30FT) QSF2000C (W/CONNECTORS)
DETECTOR (CONNECTED)
FIGURE ELIMINATE HIGH-FLUX NOISE ENVIRONMENTS USING FIBER-OPTIC COMPONENTS. THESE PARTS ALSO ALLEVIATE PROBLEMS ARISING FROM CAPACITIVE COUPLING ISOLATION ELEMENTS.
Piezos Pare Prices
ACOUSTIC WAVE
OUTPUT VOLTAGE OSCILLATOR
FIGURE YIELDING 4-kV ISOLATION, PIEZOELECTRIC COUPLER PROVIDES TRANSFORMER-LIKE PERFORMANCE ISOLATED POWER SUPPLY.
2.5k
1N914
3.3k PZ61343 2.7k NE555 0.001 1N914 D33D21 4.7k
0.001
FIGURE THIS CIRCUIT PROVIDES DRIVE THIS ARTICLE'S MOTOR-CONTROL CIRCUIT.
©2001 Fairchild Semiconductor Corporation
Application Note 7511 Rev.
Application Note 7511
piezoelectric coupler operationally similar pulse-train drive transformer, potentially less costly high volume small, efficient device with isolation capability ranging 4kV. What's more, unlike optocouplers, they require auxiliary power supply. piezo element ceramic component which electrical energy converted mechanical energy, transmitted acoustic wave, then reconverted electrical energy output terminals Figure piezo element's maximum coupling efficiency occurs resonant frequency, control oscillator must operate that frequency. example, PZT61343 piezo coupler Figure 5B's driver circuit requires 108kHz, ±1%-accurate astable multivibrator maximize mechanical oscillations ceramic material. This piezo element power handling capability 30mA secondary current rating. timer shown provides compatible waveforms while network sets frequency. Isolate With Galvanic Impunity require tried true isolation? Then transformers; IGT's gate requirements simplify design independent, transformer-coupled gate-drive supplies. supplies directly drive gate discharge resistor Figure they simply replace level-shifting supplies Figure It's good practice pulse transformers drive circuitry, both IGT's MOSFETs, because these components economical, rugged highly reliable.
CONTROL INPUT 1N914 CONTROL INPUT 1N914 1N914 2N5232
PULSE TRANSFORMER
FIGURE PROVIDING HIGH ISOLATION COST, PULSE TRANSFORMERS IDEAL DRIVING IGT. SUFFICIENTLY HIGH FREQUENCIES, IGT'S GATE-EMITTER CAPACITANCE ALONE.
1N914
3µSEC
FIGURE HIGH-FREQUENCY OSCILLATOR TRANSFORMER'S PRIMARY YIELDS UNLIMITED ONTIME CAPABILITY.
pulse-on, pulse-off method Figure stores positive pulse, holding moderate frequencies (several hundred Hertz above), gate-emitter capacitance alone store enough energy keep lower frequencies require additional external capacitor. common-base n-p-n bipolar transistor discharge capacitance minimizes circuit loading capacitor. This action extends continuous on-time capability without capacitor refreshing; also controls gate-discharge time emitter resistor.
220V 60Hz
VARIABLE VOLTAGE THREE-PHASE BRIDGE RECTIFIER SWITCHING REGULATOR THREE-PHASE INVERTER INDUCTION MOTOR
VOLTAGE ENABLE ADJUST VOLTAGE
TIMING DRIVE
ENABLE LOWER LEGS
CURRENT SENSE SIGNAL
VOLTAGE POWER SUPPLY TRANSFORMER CONTROL RECTIFIER CIRCUITS FILTER
VOLTAGE CONTROLLED OSCILATOR
MOTOR CONTROL LOGIC
SHUT DOWN DRIVE OSCILLATOR OVERLOAD PROTECTION
TACHOMETER FEEDBACK
SIGNAL PATH ISOLATOR OPTOCOUPLIER PIEZO COUPLER
FIGURE THIS 6-STEP 3-PHASE-MOTOR DRIVE USES IGT-DRIVE TECHNIQUES DESCRIBED TEXT. REGULATOR ADJUSTS OUTPUT DEVICES' INPUT LEVELS; VOLTAGE-CONTROLLED OSCILLATOR VARIES SWITCHING FREQUENCY ALSO PROVIDES CLOCK 3-PHASE TIMING LOGIC. RATIO STAYS CONSTANT MAINTAIN CONSTANT TORQUE REGARDLESS SPEED.
©2001 Fairchild Semiconductor Corporation
Application Note 7511 Rev.
Application Note 7511
Piezoelectric Couplers Provide 4-kV Isolation Using high-frequency oscillator pulse-train drive Figure yields unlimited on-time capability. However, scheme requires oscillator that turned control logic. diode zener clamp across transformer's primary will limit leakage-inductance flyback effects. optimize transformer efficiency, make pulses' voltage time products equal both pulses. situations where line voltage generates drive power, simple relaxation oscillator using programmable unijunction transistor derive power directly from line provide pulse train gate. circuit shown Figure accommodates applications involving lower frequencies hundred Hertz below). high oscillator frequency (greater than 20kHz) helps keep pulse transformer reasonably small. voltD7
age-doubler circuitry improves turn-on time also provides long on-time capability. Although this design uses only supply primary side standard trigger transformer, provides gate-to-emitter voltage.
1N914 OSCILLATOR 0.001 4.7k 1N914 0.001µF
FIGURE THIS DRIVING METHOD LOW-FREQUENCY SWITCHING PROVIDES IGT'S GATE
325V NOTES: D94FR4 1N3913 1N914 4.7k, 1/2W 100µF, 400V 40µH INDUCTION MOTOR
220V
FIGURE POWER INVERTER'S DRIVE CIRCUIT USES IGTS DRIVE 2-HP MOTOR.
Q5ON Q6ON 180o DELAY Q2ON Q3ON Q4ON
FIGURE TIMING DIAGRAM SHOWS THAT EACH CONDUCTS 165o EVERY 360o CYCLE; DELAY NECESSARY AVOID CROSS CONDUCTION.
FIGURE THREE WINDINGS' VOLTAGES CURRENTS SHOWN. NOTE THAT ALTHOUGH COSTLY SNUBBER NETWORKS ELIMINATED, FREEWHEELING DIODES NEEDED; IGTS HAVE INTRINSIC OUTPUT DIODE.
©2001 Fairchild Semiconductor Corporation
Application Note 7511 Rev.
Application Note 7511
Polyphase motors, controlled solid-state, adjustable-frequency drives, used extensively pumps, conveyors, mills, machine tools robotics applications. specific control method could either 6-step pulse-width modulation. This section describes 6-step drive that uses some previously discussed drive techniques (see page "Latch-Up: Hints, Kinks Caveats"). Figure defines drive's block diagram. 3-phase rectifier converts 220V switching regulator varies output voltage inverter. regulator's output, large filter capacitor provides stiff voltage supply inverter. motor used this example slip characteristic therefore very efficient. change motor's speed varying inverter's frequency. frequency increases, however, motor's air-gap flux diminishes, reducing developed-torque capability. maintain flux constant level shunt motor) also vary voltage ratio remains constant. Fiber-Optic Drive Eliminates Interference example given, switching regulator varies inverter's output controlling input; voltage-controlled oscillator (VCO) adjusts inverter's switching frequency, thereby varying output frequency. also drives 3-phase logic that provides properly timed pulsed outputs piezo couplers that directly drive IGT. Sensing current negative rail inhibiting gate signal protect from overload shoot-through
(simultaneous conduction) conditions. fault continues exist appreciable period, inhibiting switching regulator causes inverter shut off. inverter's power-output circuit shown Figure corresponding timing diagrams show resistive-load current waveforms that indicate 3-phase power Figure waveforms output line voltage current Figure Figure circuit, appears that IGTs through will conduct 180o. However, practical situation, it's necessary provide some time delay (typically 15o) during positive-to-negative transition periods phase current. This delay allows complementary IGTs turn before their opposite members turn thus preventing cross conduction eventual destruction IGTs. Because time delay, maximum conduction time 165o every 360o period. Because IGTs don't have integral diode, it's necessary connect antiparallel diode externally allow freewheeling current flow. Inductor limits di/dt during fault conditions; freewheeling diode clamps IGT's collector supply bus. peak full-load line current specified motor manufacturer determines maximum steady-state current that each transistor must switch. must convert this RMSspecified current peak values specify proper IGT. input voltage regulator fixed output voltage constant frequency, each would required supply starting locked-rotor current motor. This current could much times full-load running current.
325V SWITCHES LOAD
FIGURE 10A. COMPONENT SELECTION IMPORTANT. SELECTED CIRCUIT HANDLES 10A, 500V ANTIPARALLEL DIODES HAVE SIMILAR CURRENT RATING.
tD(OFF) 0.9IC 0.1IC
tD(OFF)
FIGURE 10B. SELECT YIELD DESIRED TURN-OFF TIME. FINALLY, L1'S VALUE DETERMINES FAULT-CONDITION ACTION TIME.
©2001 Fairchild Semiconductor Corporation Application Note 7511 Rev.
Application Note 7511
It's impractical, however, rate inverter based lockedrotor current. avoid this necessity adjusting switching regulator's output voltage providing fixed output-current limit slightly higher than maximum fullload current. This way, current requirements during startup will never exceed current capability efficiently sized inverter. example, consider 2-hp, 3-phase induction motor specifying 230V full-load current (ILFL) 6.2A RMS. peak current 8.766A, select type D94FR4. This device reverse-breakdown (RBSOA) 10A, 500V clamped inductive load junction temperature 150oC. 400V could also job, 500V choice gives additional derating safety margin. must current limit limit inrush current during start-up. Note that thanks IGT's adequate RBSOA, don't need turn-off snubbers.
2.5k
PIEZOCOUPLER 1N914
D94FR4
3.3k 1N914 2.7k 1000pF 0.001µF 1N914 4.7k 2N3903 TIMING LOGIC 4.7k 2N3903 D29E10 D33030 22µF 1N914 2N3903 4.7k 1N914 D94FR4 2N3903 PZT61343 1N914 4.7k
NE555
FIGURE 11A. PROVIDING PROPERLY TIMED DRIVE IGTS, CIRCUIT USES PIEZO COUPLING UPPER POWER DEVICE. 3-TRANSISTOR DELAY CIRCUIT PROVIDES NEEDED LOWER AVOID CROSS CONDUCTION.
VOLTS 100kHz TIME TIME TIME TIME TIME
FIGURE 11B. TIMING DIAGRAM SHOWS 555'S 108-KHz DRIVE PIEZO DEVICE LATTER'S SLOW RESPONSE.
©2001 Fairchild Semiconductor Corporation
Application Note 7511 Rev.
Application Note 7511
6-Step Drive Speed-Invariant Torque Figure shows inverter circuit configured this example. Diodes through carry same peak current IGTs; consequently, they're rated handle peak currents least 8.766A. However, they only conduct short time (15o 180o), their average-current requirement relatively small. External circuitry control IGT's current fall time. Resistor controls Figure 10B; there's control tF2, inherent characteristic selected IGT. this example, 4.7-k gate-to-emitter resistor provides appropriate fall time. choice current-limiting inductor based IGT's overload-current rating action time (the sensor's sensing response time IGT's turn-off time) fault conditions. could flip flops multivibrator generate necessary drive pulses corresponding 120o delay between three phases Figure 10's circuit. voltage-controlled oscillator serves change inverter's output frequency. this circuit, IGTs require isolated gate drive; drive referred common. optocouplers isolation, you'll need three isolated bootstrap power supplies addition power supplies) drive IGTs. Another alternative transformer coupling. 165o Conduction Prevents Shoot-Through Consider, however, using Figure 11A's novel, low-cost circuit. uses piezo coupler drive isolated IGT. noted, coupler needs high-frequency square wave induce mechanical oscillations primary side. oscillator provides necessary 108-kHz waveform; output gated according required timing logic then applied piezo coupler's primary. coupler's rectified output drives IGT's gate; 4.7kW gate-to-emitter resistor provides discharge path during IGT's turnoff. circuit's logic-timing diagram shown Figure 11B. piezo coupler's slow response time Figure contributes approximately turn-on/turn-off delay needed avoid shoot-through complementary pairs. corresponding collector current shown Figure 12B. associated circuitry provide remaining delay follows:
FIGURE 12A. PIEZO COUPLER'S SLOW RESPONSE DISADVANTAGE THIS ARTICLE'S CIRCUIT. FACT, CONTRIBUTES REQUIRED TURN-ON/TURN-OFF DELAY. TRACE VERTICAL 5V/DIV 5V/DIV HORIZONTAL 200µSEC/DIV 200µSEC/DIV
FIGURE 12B. DRIVEN IGT'S COLLECTOR CURRENT SHOWN TRACE VERTICAL 3A/DIV 5V/DIV HORIZONTAL 200µSEC/DIV 200µSEC/DIV
When Q3's base swings negative, this time discharged turns Once charged, turns off, allowing drive pulse turn When Q7's base goes ground, turns discharges initiating IGT's turn-off. Figure shows motor current corresponding line voltage under light-load Figure full-load Figure conditions.
©2001 Fairchild Semiconductor Corporation
Application Note 7511 Rev.
Application Note 7511
FIGURE 13A. MOTOR CURRENT VOLTAGE SHOWN HERE, LIGHT LOADS TRACE VERTICAL 1A/DIV 50V/DIV HORIZONTAL 1mSEC/DIV 1mSEC/DIV
FIGURE 13B. MOTOR CURRENT VOLTAGE SHOWN HERE, HEAVY LOADS. TRACE VERTICAL 3A/DIV 100V/DIV HORIZONTAL 2mSEC/DIV 2mSEC/DIV
complete design 6-step motor drive, it's necessary consider protection circuitry output IGTs. drive receives power from switching supply already containing provisions protection from line over-voltage under-voltage transient effects. However, still have guard power switches against unwanted effects output lines possibility noise other extraneous signals causing gate-drive timing errors. best protection circuit must match characteristics power switch circuit's bias conditions. very rugged during turn-on conduction, requires time dissipate minority carriers when turning high currents voltages. analysis possible malfunction condition
320V LINE INPUT RECTIFIER FILTER SWITCHING POWER SUPPLY ADJUST ISOLATION ISOLATION ISOLATION CONTROL TIMING dI/dt LIMIT UPPER ISOLATION LOWER SWITCHES MOTOR
DISABLE
GATE DRIVE
TURNOFF
CHOPPER
RECYCLE TIME
COMPARATOR LATCH
LIMIT
FIGURE LOWEST COST SENSOR IMAGINABLE, PIECE COPPER WIRE SERVES CURRENT MONITOR THIS SYSTEM. CHOPPED AMPLIFIED VOLTAGE DROP ACROSS WIRE TRIGGERS GATE-DRIVE SHUT-OFF CIRCUIT UNDER FAULT CONDITIONS.
©2001 Fairchild Semiconductor Corporation
Application Note 7511 Rev.
Application Note 7511
A139M 320V 50µH 3.9k DRIVE 470pF 0.01µF 2N5232 220k 2.2k 0.001 H11F3 COPPER) POWER SUPPLY CURRENT SENSE CHOPPER AMPLIFIER LATCHING FAST COMPARATOR 10ms RESET POWER SWITCHES H11F3 CONTROL CIRCUIT H11AV2 SHUTDOWN H11AV2 HI-V SHUTDOWN C203B 0.02 0.2µF 2N5306 2.7k 180k 0.001 DT230F MOTOR
750k
3.3k
2N5355
FIGURE 15A. THIS ALL-ENCOMPASSING PROTECTION SYSTEM PROVIDES THREE INDEPENDENT SHUTDOWN FUNCTONS EACH UPPER LOWER IGTS HIGH-VOLTAGE SUPPLY.
CHOPPER DRIVE PIEZO DRIVERS
TIMER
DT230F HIGH-VOLTAGE SHUTDOWN 0.002 0.002 2N5232 H11F3 0.005 0.005µF 2.2k SG3524 CONTROL
5.1k
5.1k
10µF H11AV2
2N5232 H11F3
OPTOCOUPLERS PROTECTION CIRCUIT
FIGURE 15B. THIS CIRCUIT PROVIDES CHOPPER DRIVE COPPER-WIRE SENSOR FIGURE 15A.
FIGURE 15C. SHOWS HIGH-VOLTAGE SHUTDOWN CIRCUIT.
©2001 Fairchild Semiconductor Corporation
Application Note 7511 Rev.
Application Note 7511
Latch-Up: Hints, Kinks Caveats rugged device, requiring snubber network when operating within published safe-operating-area (SOA) ratings. Within SOA, gate emitter voltage controls collector current. fact, conduct three four times published maximum current it's state junction temperature +150oC maximum. However, current exceeds rated maximum, could lose gate control latch during turn-off attempts. culprit parasitic formed pnpn structure shown Figure equivalent circuit, power MOSFET with normal parasitic transistor (Q2) whose baseemitter junction shunted low-value resistance
EMITTER METAL POLYSILICON GATE
Forward-Bias Latch-Up Within IGT's current junction-temperature ratings, current does flow through under forward-biased conditions. When current exceeds rated value, current flow through increases Q3's also increases because MOSFET channel saturation. Once Q3's ICR1 drop exceeds Q2's VBE(ON), turns more current flow bypasses FET. positive feedback thus established causes device latch forward-biased mode. value which latches while forward conduction typically three four times device's maximum rated collector current. When collector current drops below value that provokes turn-on, normal operation resumes chip temperature still within ratings. gate-to-emitter resistance low, Q2-Q3 parasitic cause latch during turn-off. During this period, determines drain-source dV/dt power MOSFET causes rapid rise voltage this increases Q2's VCE, increasing both R1's value Q2's gain. Because storage time, Q3's collector current continues flow level that's higher than normal bias. During rapid turn-off, portion this current could flow Q2's base-emitter junction, causing conduct. This process results device latch-up; current distribution will probably less uniform than case forward-bias latch-up. Because gains increase with temperature VCE, latching current high +25oC decreases function increasing junction temperature given gateto-emitter resistance. test IGT's turn-off latching characteristic? Consider circuit Figure Q1's base-current pulse width approximately 2µsec greater than IGT's gatevoltage pulse width. This way, device under test (DUT) switched through when reverse-bias latch-up occurs. This circuit allows test IGT's latching current nondestructively. results? Clamped-inductive-load testing with without snubbers reveals that snubbering increases current handling dramatically: With 0.02µF snubber capacitor increases current capability from 10A; with 0.09µF snubber practically doubles capacity (25A 13A). Conclusions? double IGT's latching current increasing from double again with polarized snubber using 0.1µF. therefore useful situations where device must conduct currents five times normal levels short periods. Finally, also latching behavior your advantage under fault conditions. other words, device latches during turn-off under normal operation, could arrange that suitable snubber switched electronically across IGT.
MAIN CURRENT PATH
EPITAXIAL LAYER
MINORITY CARRIER INJECTION
SUBSTRATE
METAL COLLECTOR COLLECTOR GATE EMITTER
FIGURE IGT'S PARASITIC RESPONSIBLE DEVICE'S LATCH-UP CHARACTERISTICS.
large current overloads, current flowing through provoke triggering. simplest terms, represents equivalent distributed resistor network, whose magnitude function Q2's VCE. During normal operation, positive gate voltage (greater than threshold) applied between Q1's gate source turns then turns transistor with very gain), causing small portion total collector current flow through network. turn off, must reduce gate-to-emitter voltage zero. This turns off, thus initiating turn-off sequence within device. Total fall time includes currentfall-time (tF1) current-fall-time (tF2) components. turn-off function gate-emitter resistance, Q3's storage time value prior turn-off. Device characteristics both delay time fall time.
©2001 Fairchild Semiconductor Corporation
Application Note 7511 Rev.
Application Note 7511
100µH A139P D66EV7 A114A A114A PULSE GENERATOR PULSE GENERATOR A114A D66EV7 D94FQ4 D38H1 1-10k D44D6 DS0026x2 A139M VCLAMP (400V MAX) 10µF
1N914 PE-63385
TRIGGER 1000pF
0.02µF
FIGURE THIS LATCHING-CURRENT TESTER TEST IGTS NONDESTRUCTIVELY. Q1'S BASE-DRIVE PULSE WIDTH GREATER THAN THAT IGT'S GATE DRIVE, UNDER TEST SWITCHED THROUGH WHEN REVERSE-BIAS LATCH-UP OCCURS.
©2001 Fairchild Semiconductor Corporation
Application Note 7511 Rev.
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Application Note September 1993 AN-7511 /Title (AN93 /Subject (In

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