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MAX1241 Evaluation System / Evaluation Kit

19-1160 Rev 1 8 / 97
MAX1241 Evaluation System / Evaluation Kit
o Proven PC Board Layout o Complete Evaluation System o Convenient On-Board Test Points o Data-Logging Software o Source Code Provided o Fully Assembled and Tested
Evaluates: MAX1240 / MAX1241
PART MAX1241EVKIT-DIP MAX1241EVL11-DIP TEMP. RANGE 0°C to +70°C 0°C to +70°C BOARD TYPE Through-Hole Through-Hole
DESIGNATION C1 C2, C3, C6 C4 C5 C7 J1 J7 JU1, JU2 R1 U1 U2 None QTY 1 3 1 1 1 1 1 2 1 1 1 1 DESCRIPTION 0.01µF capacitor 0.1µF capacitors 4.7µF capacitor 10µF capacitor 0.047µF capacitor 2x20 header 6-pin header 2-pin headers 1k resistor MAX1241BCPA MAX872CPA PC board
QTY 1 1 DESCRIPTION MAX1241EVKIT-DIP 68L11D µC Module (68L11D MODULE)
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468.
MAX1241 Evaluation System / Evaluation Kit Evaluates: MAX1240 / MAX1241
Systems Using 3V and 5V Logic
Changing the Reference Voltage
The MAX872 is a 2.5V reference. To supply a different external reference, open JU2 and apply the reference voltage between VREF and GND. Refer to the MAX1241 data sheet for reference voltage requirements.
Table 1. Jumper Settings
JUMPER STATE Closed JU1 Open (default) Closed (default) JU2 Open Force SHDN to float. Disable internal reference (MAX1240). Drive VREF with on-board MAX872 reference. Disconnect MAX872 reference. Use internal reference (MAX1240) or drive VREF pad with a user-supplied reference. FUNCTION The µC module controls the state of SHDN.
10) Press ALT+C to switch to the control-panel screen after the RAM resident program has been successfully downloaded. 11) Apply input signals to AIN on the MAX1241 EV kit board. Observe the readout on the screen. Table 2 lists the commands that are available from the control-panel screen. 12) Before turning off power to the MAX1241 EV kit, exit the program by pressing ALT+X.
The software allows the user to control the throughput rate, power-up delay, and reference-range setting. It also provides for data logging. Refer to Table 2 for a complete listing of the available features. The EV kit software program (KIT1241.L11) loaded into the 68L11D module operates at a 6.7ksps throughput. For faster throughput, download the program FAST1241.L11 at step 9 of the MAX1241 EV System Quick Start section. This program has a throughput rate of approximately 14ksps.
MAX1241 Stand-Alone EV Kit
The MAX1241 EV kit provides a proven PC board layout to facilitate evaluation of the MAX1241. It must be interfaced to appropriate timing signals for proper operation. Refer to the MAX1241 data sheet for timing requirements.
Evaluating the MAX1240
To evaluate the MAX1240, turn off power to the kit, remove the MAX1241, and replace it with a MAX1240BCPA. Select the internal reference by opening JU2 and closing JU1.
MAX1241 Evaluation System / Evaluation Kit Evaluates: MAX1240 / MAX1241
Table 2. Command Reference
Table 3. Command-Line Options when Starting MAX1241 Software
COMMAND 1 2 MONO -Lfilename FUNCTION Default to COM1 PC serial port. Default to COM2 PC serial port. For use with LCD or monochrome display. Open file "filename" for data logging, and enable the data-logging commands. Specify the actual measured voltage at the REF pin (nominally 2.5V). List command-line options.
V F3 F5 , ALT+T ALT+X
MAX1241 Evaluation System / Evaluation Kit Evaluates: MAX1240 / MAX1241
TO 68L11D MODULE GND GND GND GND J1-1 J1-2 J1-3 J1-4
VDD C5 10µF VDD
VDD VDD PA1 / IN2
J1-7 J1-8 J1-28
VDD SHDN SCLK PA3 / SHDN JU1 3 6
U2 MAX1241
1 SHDN DOUT SCLK CS VDD AIN REF GND 2 4 5
C2 0.1µF
PA3 / IN4 / OUT5 J1-30
R1 1k C1 0.01µF GND
PA6 / OUT2
J1-33
CS DOUT DOUT SCLK CS VDD
PA7 / PAL / OUT1 J1-34 MISO SCK J1-35 J1-37 J1-38
U1 MAX872CPA
1 COMP VIN VOUT GND 8 7 6 5
C3 0.1µF
C4 4.7µF
VREF (2.5V NOMINAL)
TEST POINTS
J7-1 GND C6 0.1µF
C7 0.047µF JU2
Figure 1. MAX1241 EV Kit Schematic
MAX1241 Evaluation System / Evaluation Kit Evaluates: MAX1240 / MAX1241
Figure 2. MAX1241 EV Kit Component Placement Guide
MAX1241 Evaluation System / Evaluation Kit Evaluates: MAX1240 / MAX1241
Figure 3. MAX1241 EV Kit PC Board Layout-Component Side
MAX1241 Evaluation System / Evaluation Kit Evaluates: MAX1240 / MAX1241
Figure 4. MAX1241 EV Kit PC Board Layout-Solder Side
MAX1241 Evaluation System / Evaluation Kit Evaluates: MAX1240 / MAX1241
NOTES
68L11D Module
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468.
68L11D Module 68L11D Module
Power Requirements
The 68L11D module draws its power from a user-supplied power source connected to terminal block J2. Note the positive and negative markings on the board. Nominal input voltages should be between +5V and +16V. The input current requirement for the 68L11D module is typically 20mA plus the current drawn by the evaluation kit (EV kit). The VDD supply is set by U4, a MAX667 low-dropout CMOS regulator. Trim potentiometer R2 sets the supply voltage, with an adjustment range of approximately 2.5V to 5V. Although the board is designed primarily for 3V applications, all of the circuitry is rated to withstand 5V levels. The 20 x 2-pin header (J1) connects the 68L11D module to a Maxim EV kit. Table 2 lists the function of each pin. Use the 68L11D module only with EV kits that are designed to support it, and download only code that is targeted for the Maxim 68L11D module. Downloading incorrect object code into the 68L11D module will produce unpredictable results. The 8k x 8 boot ROM (U10) checks the system and waits for commands from the host. Refer to the EV kit manual for specific startup procedures.
Software
All software is supplied on a disk with the EV kit. Software operating instructions are included in the EV kit manual.
Serial Communications
68L11D Microcontroller (µC) Module Hardware
Table 1. Serial Communications Port J3
PIN 1 2 3 4 5 6 7 8 9 NAME DCD RXD TXD DTR GND DSR RTS CTS None FUNCTION Handshake hard-wired to DTR and DSR RS-232-compatible data output from 68L11D module RS-232-compatible data input to 68L11D module Handshake hard-wired to DCD and DSR Signal ground connection Handshake hard-wired to DCD and DTR Handshake hard-wired to CTS Handshake hard-wired to RTS Unused
68L11D Module 68L11D Module
Table 2. 40-Pin Data-Connector Signals
PIN 1-4 5, 6 7, 8 9 10 11 12 13 14 15 16 17 18 19 20-26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 NAME GND V++ VDD RD WR CS0 CS1 CS2 CS3 ADDR0 ADDR1 ADDR2 ADDR3 DB0 DB1-DB7 PA0 / IC3 PA1 / IC2 PA2 / IC1 PA3 / IC4 / OC5 PA4 / OC4 PA5 / OC3 PA6 / OC2 PA7 / OC1 / PAI MISO MOSI SCK RESERVED E SS FUNCTION Ground Unregulated input voltage VDD from on-board MAX667 regulator Read strobe Write strobe Chip select for 8000-8FFF Chip select for 9000-9FFF Chip select for A000-AFFF Chip select for B000-BFFF Address bit 0 (LSB) Address bit 1 Address bit 2 Address bit 3 Data bus bit 0 (LSB) Data bus bits 1-7 General I / O port bit 0 (LSB) General I / O port General I / O port General I / O port General I / O port General I / O port General I / O port General I / O port MSB SPI master-in, slave-out SPI master-out, slave-in SPI serial clock Reserved for factory use System E-clock output SPI slave-select input
Table 3. 68L11D Module Memory Map
ADDRESS RANGE (HEX) 0000-7FFF 8000-8FFF 9000-9FFF A000-AFFF B000-BFFF C000-C03F C040-C0FF C100-CFFF D000-D03F D040-DFFF E000-FFFF FUNCTION User RAM area (U5) External chip-select 0 (J1 pin 11) External chip-select 1 (J1 pin 12) External chip-select 2 (J1 pin 13) External chip-select 3 (J1 pin 14) Unused Internal RAM (U1) Unused Internal register area (U1) Unused Boot ROM (U10)
68L11D Module 68L11D Module
VPREREG D1 1N4001 SW1 C10 22µF 20V VDD VDD C16 C12 0.1µF C13 0.1µF 1 3 4 5 11 16 VCC C1+ C1C2+ C20.1µF V+ V2 6 C15 0.1µF T1 14 0.1µF J3-7 RTS J3-2 RXD J3-3 TXD J3-4 DTR J3-6 DSR 9 GND 15 J3-5 GND J3-9 RI PA0 / IN3 PA1 / IN2 PA2 / IN1 PA3 / IN4 / OUT5 PA4 / OUT4 PA5 / OUT3 PA6 / OUT2 PA7 / OUT1 / PULSE ACCIN RXD TXD MISO MOSI SCK SS RESET XIRQ IRQ 30 29 28 27 26 25 24 23 16 17 18 19 20 21 14 11 15 44 43 42 3 PA0 PC0 U1 4 PA1 PC1 5 PA2 PC2 MC68L11D0FN2 PC3 6 PA3 7 PA4 PC4 8 PA5 PC5 9 PA6 PC6 10 PA7 PC7 13 PD6 / AS PD0 / RXD PD1 / TXD 12 PD7 / R / W 39 PD2 / MISO PB0 38 PD3 / MOSI PD4 / SCK PB1 37 PD5 / SS PB2 36 PB3 35 RESET PB4 34 XIRQ / VPP PB5 33 IRQ / CE PB6 32 PB7 XTAL 41 EXTAL MODA / LIR 40 E MODB / VSTBY D0 D1 D2 D3 D4 D5 D6 D7 AS R / W A8 A9 A10 A11 A12 A13 A14 A15 MODA MODB R2 8 J3-1 DCD 4 PFI GND 3 SW2 RESET 1 C4 0.1µF C3 0.01µF C14 J3-8 CTS 4 1 2 3 VDD
U2 MAX3232
VDD VCC
U7 MAX708R
MR PFO NC RESET RESET 5 6 8 7 RESET
POWER CONNECTIONS GND U1 1, 2 VDD 22 C17 0.1µF
C2 22pF
Y1 8.00MHz
R1 10M
C1 22pF
Figure 1. 68L11D Module Schematic Diagram
68L11D Module 68L11D Module
U9A 74HC139
C5 0.1µF A12 A13
U9B 74HC139
14 A0 13 A1 Y0 Y1 Y2 IOBUFFER 15 E Y3 12 11 10 9 CS8XXX CS9XXX CSAXXX CSBXXX
C7 0.1µF
1 R / W 2 U3A 74HC00 R / W E C6 0.1µF 4 5 U3B 74HC00 R / W E 9 10 U3C 74HC00 E A13 12 13 U3D 74HC00
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 VDD VDD
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 PGM VPP OE CE
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
C8 0.1µF
11 DATA-XX1X
CS-11XXX
POWER CONNECTIONS GND AS D0 D1 D2 D3 D4 D5 D6 D7 1 OE 11 C U8 2 3 4 5 6 7 8 9 D0 D1 D2 D3 D4 D5 D6 D7 VDD U3 19 18 17 16 15 14 13 12 A0 A1 A2 A3 A4 A5 A6 A7 U5 U8 U9 U10 14 28 20 16 28 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND 7 14 10 8 14 C18 0.1µF VDD
74HC573
Figure 1. 68L11D Module Schematic Diagram (continued)
68L11D Module 68L11D Module
VDD R5 200 GND LED1 19 1 OE DIR U6 2 3 4 5 6 7 8 9 A1 A2 A3 A4 A5 A6 A7 A8 GND GND VPREREG VDD RD CS8XXX EXTD0 EXTD1 EXTD2 EXTD3 EXTD4 EXTD5 EXTD6 EXTD7 CSAXXX A0 A2 EXTD0 EXTD2 EXTD4 VDD U6 20 GND 10 VDD C9 0.1µF EXTD6 PA0 / IN3 PA2 / IN1 VDD PA4 / OUT4 PA6 / OUT2 MISO R6A 10k 2 VDD R6E 10k VDD 6 R6B 10k SCK XIRQ E J1-1 J1-3 J1-5 J1-7 J1-9 J1-11 J1-13 J1-15 J1-17 J1-19 J1-21 J1-23 J1-25 J1-27 J1-29 J1-31 J1-33 J1-35 J1-37 J1-39 J1-2 J1-4 J1-6 J1-8 J1-10 J1-12 J1-14 J1-16 J1-18 J1-20 J1-22 J1-24 J1-26 J1-28 J1-30 J1-32 J1-34 J1-36 J1-38 J1-40 GND GND VPREREG VDD WR CS9XXX CSBXXX A1 A3 EXTD1 EXTD3 EXTD5 EXTD7 PA1 / IN2 PA3 / IN4 / OUT5 PA5 / OUT3 PA7 / OUT1 / PULSE ACCIN MOSI RESERVED SS 7 R6F 10k SS 3 IRQ 8 VDD R6G 10k
IOBUFFER RD D0 D1 D2 D3 D4 D5 D6 D7
74HCT245 18 B1
R6H 10k
R6C 10k
JU1 MODA MODA MODB JU2
R6I 10k
R6D 10k
Figure 1. 68L11D Module Schematic Diagram (continued)
68L11D Module 68L11D Module
Figure 2. 68L11D Module Component Placement Guide
Figure 3. 68L11D Module PC Board Layout-Component Side
68L11D Module 68L11D Module
Figure 4. 68L11D Module PC Board Layout-Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.