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High-Speed-CMOS designs address noise and I / O levels

Fairchild Semiconductor Application Note 375 October 1984

High-Speed-CMOS designs address noise and I / O levels
Fairchild Semiconductor Application Note 375 October 1984
To maximize the benefits of high-speed CMOS, you must cope with environmental interactions and component limitations. Especially important are system noise decoupling and both transient and steady-state level control.
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Published in EDN Magazine rCopyright 1984 Cahners Publishing
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FIGURE 2. The reaction of 74HC00 gates (a) to noise spikes is clearly seen in these scope drawings. The gate exhibits noise immunity of 2V or more (b). Furthermore, the immunity is equally good for positive- and negative-going noise spikes. (a) (b)
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FIGURE 3. Exhibiting high clock-noise immunity, this 74HC74 flip flop (a) shows no change in output for noise spikes greater than 2V (b)
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FIGURE 5. Comparing HC and HCT logic, this graph shows noise immunity of the respective families. HC wins for ground noise, HCT for VCC noise. CONSIDER SYSTEM NOISE Now take a closer look at system noise, which you can group into several categories, depending on the source. The type of noise dictates the appropriate noise-supression technique.
Power-supply ICC noise, generated in the power-supply line, comes from logic switching in CMOS circuits. Transmission-line reflections, unwanted ringing and overshoot phenomena arise from signals propagating down improperly terminated transmission and signal lines. Signal crosstalk is caused by capacitive or inductive coupling of extraneous voltages from one signal line to another or to the power-supply line. Radiated noise, an RF phenomenon that originates within a high-speed-logic system, emits to other systems. It arises from the high-frequency energy emitted when logic toggles. This noise, not a major problem with regard to logic integrity, can interfere with other systems.
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FIGURE 10. Demonstrating the importance of bypassing, drawings (b) through (e) show power-supply transients that occur when a 74HC00 is decoupled with 1-, 4.7-, 10- and 100-nF capacitors, respectively.
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High-Speed-CMOS designs address noise and I / O levels
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2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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