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AC Characteristics of MM74HC High-Speed CMOS

Fairchild Semiconductor Application Note 317 April 1989

AC Characteristics of MM74HC High-Speed CMOS
Fairchild Semiconductor Application Note 317 April 1989
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(b) FIGURE 2. Typical 3-STATE (a) Timing Waveforms and (b) Test Circuit for 74HC Devices
Note: Some early data sheets used a different test circuit. This has been changed or will be changed.
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The / MM74HCT TTL input compatible devices are intended to operate with TTL devices, and so it makes sense to specify them the same way as TTL. Thus, as shown in Figure 3, typical timing input waveforms use 0-3V levels and timing measurements are made from the 1.3V levels on these signals. The test circuits used are the same as standard HC input circuits. This is shown in Figure 3. These measurements are compatible with TTL type specified devices. Specifying standard MM74HC speeds using 2.5V input measurement levels does represent a specification incompatibility between TTL and most RAM / ROM and microprocessor speed specifications. It should not, however, present a de-
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Speed Variation with Capacitive Loading When high-speed CMOS is designed into a CMOS system, the load on a given output is essentially capacitive, and is the sum of the individual input capacitances, 3-STATE output capacitances, and parasitic wiring capacitances. As the load is increased, the propagation delay increases. The rate of increase in delay for a particular device is due to the increased charge / discharge time of the output and the load. The rate at which the delay changes is dependent on the output impedance of the MM74HC circuit. As mentioned, for high-speed CMOS, there are two output structures: bus driver and standard.
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FIGURE 6. Typical Propagation Delay Variation With Load Capacitance for 74HC04, 74HC164, 74HC240, 74HC374
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FIGURE 7. Propagation Delay Capacitance Variation Constant Vs. Power Supply Speed Variations with Change in Temperature Changes in temperature will cause some change in speed. As with CD4000 and other metal-gate CMOS logic parts, MM74HC operates slightly slower at elevated temperatures, and somewhat faster at lower temperatures. The mechanism which causes this variation is the same as that which causes variations in metal-gate CMOS. This factor is carrier mobility, which decreases with increase in temperature, and this causes a decrease in overall transistor gain which has a corresponding affect on speed.
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Where tPD(T) is the delay at the desired temperature, and tPD(25) is the room temperature delay. Using the 74HC00
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When comparing to CD4000 operating at 5V, HC-CMOS is typically ten times faster, and about three times faster than CD4000 logic operating at 15V. This is shown in Figure 11.
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FIGURE 9. Typical Output Rise or Fall Time Vs. Load For Standard and Bus Driver Outputs
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FIGURE 11. Comparison of Metal-Gate CMOS and High-Speed CMOS Delays
FIGURE 12. Comparison of HC-CMOS, Metal-Gate CMOS, and LSTTL Propagation Delay Vs. Temperature Conclusion High-speed CMOS circuits are speed compatible with 74LS circuits, not only on the data sheets, but even driving different loads. In general, HC-CMOS provides a large improvement in performance over older metal-gate CMOS. By using some of the equations and curves detailed here, along with data sheet specifications, the designer can very closely estimate the performance of any MM74HC device. Even though the above examples illustrate typical performance calculations, a more conservative design can be implemented by more conservatively estimating various constants and using worst case data sheet limits. It is also possible to estimate the fastest propagation delays by using speeds about 0.4-0.7 times the data sheet typicals and aggressively estimating the various constants.
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AC Characteristics of MM74HC High-Speed CMOS
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Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.