In-Circuit Program ACExFamily Microcontrollers Fairchild Note 200

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In-Circuit Program ACExFamily Microcontrollers Fairchild Note 200

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AN-2001 In-Circuit Program ACExFamily Microcontrollers
In-Circuit Program ACExFamily Microcontrollers
Fairchild Note 2001 Veronica Alarcon 1999
ACEx (Arithmetic Controller Engine) family programmable monolithic integrated circuits applications requiring high performance, power, small size. supports in-circuit programming code EEPROM array, data EEPROM array, Initialization Register in-circuit programming consists 4-wire interface where 32-bit command response word shifted serially into ACEx device. This 32-bit command response word contains necessary information program data EEPROM arrays initialization register. This application note provides detailed description programming interface, 32-bit command response word, programming procedures, timing specifications programming signals.
Interface
4-wire interface designed simple in-circuit programming. simply shift data serially into ACEx device through following externally controlled signals. (See Figure LOAD control signal CLOCK signal serial data SHIFT_IN input signal serial data SHIFT_OUT output signal four interface pins multiplexed with particular yielding separate device pinout while programming mode. Table describes programming mode device pinout.
Note: (pin must either connected driven high while in-circuit programming.
Figure Programming Interface Diagram
LOAD
CLOCK
LOAD ACE1101
SHIFT_OUT
DATA
DATA
SHIFT_IN
Figure Programming Signals Interface
LOAD CLOCK SHIFT_IN SHIFT_OUT
Note: numbers valid only standard packages.
Number
1999 Fairchild Semiconductor Corporation AN-2001 Rev.
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AN-2001 In-Circuit Program ACExFamily Microcontrollers
Command Response Word
32-bit command response word shifted serially into (SHIFT_IN) (SHIFT_OUT) ACEx device. When data being shifted into device referred 32-bit command word. Likewise, when data being shifted device referred 32-bit response word. command word first shift into device following other (30, bits. Consequently, command word shifted into device response word shifted device. (The response word ACEx responding previous shifted 32-bit command word.) 32-bit command response word simple format consisting control bits, read/write bit, address bits, data bits. table details. control bits (CNTRL1, CNTRL0) select between memories. read/write (RWb) selects whether reading from memory address writing memory address.
address bits specify memory address read from write memory address 10/11 bits wide range varies selected memory array. table specific address range. memory-mapped addresses used address value even though some defined 12-bits wide. ACE1101, bits masked zero ACE1202 masked zero. performing write, data bits specify data write memory address both command response word. However, when reading, data bits command word contain different values than response word. When performing read, data bits command word should zeros when shifts response word data bits will contain data contents memory specified address location.
Table 32-bit Command Response Word Number
bits ACE1101 bits Address[9:0] ACE1202 bits bits Address[10:0] Data[7:0]
Assignment
CNTRL1 CNTRL0
CNTRL1
CNTRL0
Memory Array
CODE EEPROM DATA EEPROM/ Initialization Register
Action
Write memory address. Read from memory address.
Table Address Range Definition Memory Array
DATA EEPROM Initialization Register CODE EEPROM (ACE1101) CODE EEPROM (ACE1202)
Memory Mapped Address Range
0x040 0x7F 0x0BB 0xC00 0xFFF 0x800 0xFFF
AN-2001 Rev.
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AN-2001 In-Circuit Program ACExFamily Microcontrollers
Programming Mode Procedures
There several basic steps involved programming memory ACEx devices. simply involves placing part programming mode, clocking 32-command word into device, providing additional clocks with control signal perform read write. Figure provides flow diagram this process. Step device programming mode. device place programming mode supplying single supervoltage pulse LOAD signal. Bring LOAD Supply 32-bit command word SHIFT_IN. should shifted first followed bits through Supply CLOCK pulse. Repeat Step Step Steps should repeated until bits command word shifted into device. previous command word contained read command, sample SHIFT_OUT ACCESS after rising edge CLOCK obtain 32-bit response word.
Step Step
Bring LOAD SHIFT_OUT goes Supply CLOCK pulses perform read write. When performing write, before providing second CLOCK pulse SHIFT_OUT must SHIFT_OUT BUSY signal during write process. Poll SHIFT_OUT READY signal. Once second CLOCK pulse supplied write completed, SHIFT_OUT will return SHIFT_OUT READY signal. READY signal must high before LOAD return Repeat Steps Steps should repeated until bytes read from written memory.
Step
Step Step
Step
Step Step
Step Exit programming mode. exit programming mode power down device.
Timing Specification
Figure provides programming protocol pictorially including specific timing parameters defined table addition, figures provide serial data timing pictorially including specific timing parameters defined Table
Table Programming Electrical Characteristics Parameter
tDIS tDIH tDOS tDOH tACCESS (ACE1101) tACCESS (ACE1202) tSV1, tSV2 tLOAD1, tLOAD2, tLOAD3, tLOAD4 VSUPERVOLTAGE
Description
CLOCK high time CLOCK time SHIFT_IN setup time SHIFT_IN hold time SHIFT_OUT setup time SHIFT_OUT hold time SHIFT_OUT access time SHIFT_OUT access time LOAD supervoltage timing LOAD timing Supervoltage level
Min.
11.5
Max.
Units
12.5
AN-2001 Rev.
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AN-2001 In-Circuit Program ACExFamily Microcontrollers
Figure Process Flow-diagram
Supply Pulse LOAD
Bring LOAD Supply command word SHIFT_IN serially. 32-bit response word SHIFT_OUT serially
Supply CLOCK
CLOCKs Supplied?
Bring LOAD Supply CLOCK pulse
SHIFT_OUT (READY)
Bring LOAD
Process Complete?
Power down device
AN-2001 Rev.
www.fairchildsemi.com
AN-2001 In-Circuit Program ACExFamily Microcontrollers
Figure Programming Protocol
tSV1 tSV2 tload1 tload2 tready tload3 ch1*
read mode
tload3
tload4
LOAD (G3)
enter programming mode
denotes start programming cycle
clock pulses
CLOCK (G1) SHIFT_IN (G4)
Busy clock pulse
READY
SHIFT_OUT (G2) Write mode) SHIFT_OUT (G2) Read mode)
BUSY
Figure ACE1101 Serial Data Timing
CLOCK (G1)
tDIS tDIH VALID tDOS tDOH VALID tACCESS
SHIFT_IN (G4)
SHIFT_OUT (G2)
Figure ACE1202 Serial Data Timing
CLOCK (G1)
tDIS tDIH VALID tDOS tDOH VALID tACCESS
SHIFT_IN (G4)
SHIFT_OUT (G2)
Life Support Policy
Fairchild's products authorized critical components life support devices systems without express written approval President Fairchild Semiconductor Corporation. used herein: Life support devices systems devices systems which, intended surgical implant into body, support sustain life, whose failure perform, when properly used accordance with instructions provided labeling, reasonably expected result significant injury user.
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critical component component life support device system whose failure perform reasonably expected cause failure life support device system, affect safety effectiveness.
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Fairchild does assume responsibility circuitry described, circuit patent licenses implied Fairchild reserves right time without notice change said circuitry specifications.
AN-2001 Rev.
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In-Circuit Program ACExFamily Microcontrollers Fairchild Note 200

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