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November 1999, ver. 1.03 Introduction programmable logic dev
Top Searches for this datasheetDesigning with FineLine Packages November 1999, ver. 1.03 Introduction programmable logic devices (PLDs) increase density pins, demand small packages diverse packaging options continues grow. Ball-grid array (BGA) packages ideal solution because connections interior device, improving ratio between count board area. Typical packages contain twice many connections quad flat pack (QFP) packages same area. Further, solder balls considerably stronger than leads, resulting robust packages that tolerate rough handling. Altera developed solution users high-density PLDs called FineLine BGApackage. format requires less than half board space standard packages. This application note provides guidelines designing your printed circuit board (PCB) Altera's FineLine packages discusses following topics: Overview packages layout terminology layout FineLine packages Overview Packages PLDs grow million gates beyond, designers require more advanced, flexible packages. packages empower designers offering technological benefits flexibility meet future system requirements. packages, connections located interior device. Leads normally placed along periphery package replaced with solder balls arranged matrix across bottom substrate. final device soldered directly using assembly processes virtually identical standard surface mount technology preferred system designers. addition, packages provide following advantages: Fewer damaged leads-BGA leads consist solid solder balls, which less likely suffer damage during handling. More leads unit area-Lead counts increased moving solder balls closer edges package decreasing pitch Altera Corporation A-AN-114-01.03 114: Designing with FineLine Packages Less expensive surface mount equipment-BGA packages tolerate slightly imperfect placement during mounting, requiring less expensive surface mount equipment. placement imperfect because packages self-align during solder reflow. Smaller footprints-BGA packages usually smaller than packages, making packages more attractive applications that require high performance smaller footprint. Integrated circuit speed advantages-BGA packages operate well into microwave frequency spectrum achieve high electrical performance using ground planes, ground rings, power rings package construction. Improved heat dissipation-Because located center FineLine package most pins located center package, pins located under die. result, heat generated device transferred through pins (i.e., pins heat sink). Layout Terminology This section defines common terms used layout. Escape Routing Escape routing method used route each signal from package another element PCB. Multi-Layer PCBs increased count associated with packages made multi-layer PCBs industry-standard method performing escape routing. Signals routed other elements through various numbers layers. Vias Vias, plated through holes, used multi-layer PCBs transfer signals from layer another. Vias actual holes drilled through multi-layer provide electrical connections between various layers. vias provide layer-to-layer connections only; device leads other reinforcing material inserted into vias. Altera Corporation 114: Designing with FineLine Packages Table describes terms used define dimensions. Table Dimension Terms Term Aspect ratio Drilled hole diameter Finished diameter Definition aspect ratio ratio via's length depth pre-plated diameter. drilled hole diameter diameter actual hole drilled board. finished diameter diameter hole that been finished. Table shows three types typically used PCBs. Table Types Type Through Description interconnection between bottom layer PCB. Through vias also provide interconnections inner layers. interconnection from bottom layer inner layer. interconnection between number inner layers. Blind Embedded Figure shows three types. Figure Types Vias Through Blind Embedded Connection Layer Layers Altera Corporation 114: Designing with FineLine Packages Blind vias through vias used more frequently than embedded vias. Blind vias more expensive than through vias, overall costs reduced because signal traces routed under blind via, requiring fewer layers. Through vias, other hand, permit signals routed through lower layers, which increase required number layers overall costs. Capture Vias connected electrically layers through capture pads, which surround each via. Surface Land Surface land pads areas which solder balls adhere. size these pads affects space available vias escape routing. general, surface land pads available following basic designs: solder mask defined (NSMD), also known copper defined Solder mask defined (SMD) main differences between surface land types size trace space, type vias use, shape solder balls after solder reflow. Solder Mask Defined solder mask defined (NSMD) pad, solder mask opening larger than copper pad. Thus, surface land pad's copper surface completely exposed, providing greater area which solder ball adhere (see Figure Altera recommends that NSMD most applications because provides more flexibility, fewer stress points, more line-routing space between pads. Solder Mask Defined solder mask defined (SMD) pad, solder mask overlaps surface land pad's copper surface (see Figure This overlapping provides greater adhesion strength between copper PCB's epoxy/glass laminate, which important under extreme bending during accelerated thermal cycling tests. However, solder mask overlap shrinks amount copper surface available solder ball. Altera Corporation 114: Designing with FineLine Packages Figure Side View NSMD Land Pads NSMD Solder Mask Solder Mask Opening Copper Solder Mask Solder Mask Opening Copper Figure shows side view NSMD solder joint. Figure Side View NSMD Solder Joints NSMD Solder Joint Package Solder Ball Solder Mask Copper Solder Joint Stringer Stringers rectangular square interconnect segments that electrically connect capture pads surface land pads. Figure shows connection between vias, capture pads, surface land pads, stringers. Figure Via, Land Pad, Stringer Capture Stringer Capture Surface Land Altera Corporation 114: Designing with FineLine Packages Layout FineLine Packages When designing FineLine packages, consider following factors: Surface land dimension capture layout dimension Signal line space trace width Number layers FineLine figures, controlling dimension millimeters. Surface Land Dimension Surface land pads should same size provide balanced stress solder joints. this reason, Altera recommends using 15.75-mil surface land pad, because same size pad. Figure shows 15.75-mil pad. Figure 15.75-Mil Package Solder Ball 0.40 (15.75 mil) 0.63 (25.00 mil) Figure shows much space available vias escape routing when 15.75-mil surface land pads. Altera Corporation 114: Designing with FineLine Packages Figure Space Available 15.75-Mil Surface Land Pads 1.00 (39.37 mil) 0.60 (23.62 mil) 0.60 (23.62 mil) 0.40 (15.75 mil) 1.01 (39.76 mil) 1.00 (39.37 mil) Surface Land Pads Capture Layout Dimension size layout capture pads affect amount space available escape routing. general, layout capture pads following ways: in-line with surface land pads diagonal surface land pads. Figure shows both layouts. Figure Placement Capture Line Surface land capture Vias 1.00 (39.37 mil) 1.00 (39.37 mil) Diagonally Stringer Stringer length Stringer width Minimum clearance between capture surface land capture diameter Trace width Space width Area escape routing (This area different layer than surface land pads.) 0.60 (23.62 mil) 1.00 (39.37 mil) 0.40 (15.75 mil) 0.40 (15.75 mil) Altera Corporation 114: Designing with FineLine Packages decision place capture pads diagonally in-line with surface lands pads based following factors: Diameter capture Stringer length Clearance between capture surface land decide your PCB, information shown Figure Table your design guidelines conform either equation Table contact Altera Applications further assistance. Table Formula Layouts Layout In-line Diagonally Formula 23.62 39.76 Table shows that place larger capture diagonally than in-line with surface land pads. capture size also affects many traces routed PCB. Figure shows sample layouts typical premium capture pads. typical layout shows capture size mil, size mil, inner space/trace mil. With this layout, only trace routed between vias. more traces required, must reduce capture size space/trace size. premium layout shows capture size mil, size mil, inner space/trace mil. This layout provides enough space route traces between vias. Figure Typical Premium Capture Sizes Typical 39.37 Premium 39.37 Capture Space Trace 8.00 27.00 5.00 20.00 15.00 Altera Corporation 114: Designing with FineLine Packages Table shows typical premium layout specifications used most vendors. Table Vendor Specifications Specification Trace/space width Drilled hole diameter Finished diameter capture Aspect ratio Typical (Mil) 25.5 Premium (Mil) 10:1 detailed information drill sizes, sizes, space/trace sizes, capture sizes, contact your vendor directly. Signal Line Space Trace Width ability perform escape routing defined width trace minimum space required between traces. minimum area signal routing smallest area that signal must routed through (i.e., distance between vias, Figure This area calculated following formula: 39.37 number traces that routed through this area based permitted line trace space widths. Table determine total number traces that routed through Table Number Traces Number Traces Formula (space width)] trace width (space width)] (trace width)] (space width)] (trace width)] Figure shows that reducing trace space size, route more traces through Increasing number traces reduces required number layers decreases overall cost. Altera Corporation 114: Designing with FineLine Packages Figure Escape Routing Double Single Traces Double Trace Routing Single Trace Routing Capture 0.12 (4.72 mil) 0.40 (15.75 mil) 0.60 (23.62 mil) 0.40 (15.75 mil) 0.40 (15.75 mil) 0.20 (7.87 mil) 0.40 (15.75 mil) 0.60 (23.62 mil) Space Trace Number Layers general, number layers required route signals inversely proportional number traces between vias (i.e., greater number traces, fewer number layers required). estimate number layers your requires first determining: Trace space size Number traces routed between capture pads Type vias used Table shows number layers required route signals various FineLine packages EPF10K50E devices, assuming power plane, ground plane, pins. This table shows that using double traces blind vias reduces required number layers. Table Maximum Required Layers FineLine Package (Balls) Single Trace Blind Vias (Layers) Double Trace Blind Vias (Layers) Through Vias (Layers) Through Vias (Layers) 1,020 Note: information number layers required, contact Altera Applications (800) 800-EPLD. Altera Corporation 114: Designing with FineLine Packages Using fewer pins than maximum reduce required number layers. type also reduce number layers required. type affect required number layers, consider sample layouts shown Figure Figure Sample Layout Blind signal from Ball routed under second layer. Ball Ball Ball Ball Ball 15.75-mil Surface Land 22-mil Capture 8-mil 5-mil Trace Through signal from Ball routed through third layer. Ball Ball Ball Ball Ball Signal travels through first layer Signal travels through second layer Signal travels through third layer blind layout Figure requires only layers. signals from first balls routed directly through first layer. signals from third fourth balls routed through second layer, signal from fifth ball routed under vias Ball Ball second layer. Together, only layers required. contrast, through layout Figure requires three layers, because signals cannot routed under through vias. signals from third fourth balls still routed through second layer, signal from fifth ball must routed through third layer. Using blind vias rather than through vias this example saves layer. Altera Corporation 114: Designing with FineLine Packages Conclusion Altera taken leadership position packaging with recent introduction 1.00-mm FineLine packages. These packages reduced area while maintaining very high count. using information this application note, easily design PCBs FineLine packages, take advantage package's reduced size. Information contained Application Note (Designing with FineLine Packages) version 1.03 supersedes information published previous versions. Revision History Version 1.03 Version 1.03 Application Note (Designing with FineLine Packages) contains following changes: Dimensions Figures Tables were updated. Minor textual style changes were made throughout document. Version 1.02 Version 1.02 Application Note (Designing with FineLine Packages) contains following changes: dimension solder ball Figure updated. surface land size Figure updated. Version 1.01 Version 1.01 Application Note (Designing with FineLine Packages) contains following changes: Information Table updated. Minor textual style changes were made throughout document. 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