Designing with Xicor's X5000 Series Supervisors Introduction

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Designing with Xicor's X5000 Series Supervisors Introduction

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Designing with Xicor's X5000 Series Supervisors
Introduction
recent years, product designs have changed rapidly. There increasing need small, programmable, high performance products. Designers face greater demands system reliability from consumers. Three more common circuits used improve system reliability Watchdog Timer, Voltage Reset Power-On management. combining these features, Xicor offers small, powerful, cost effective solution system designers. addition, Xicor's X5000 series devices offer flexibility never before possible with resettable watchdog timeout periods, reprogrammable voltage thresholds various combinations on-chip serial EEPROM. systems that FPGAs that must download code before they start their operation.
Voltage Reset Operation
second most critical area consider preventing system failures voltage protection. most systems, there differing operating voltages different components. power goes down, more devices stop operating correctly. This particularly failing device microcontroller. edge operation, microcontroller execute incorrectly send incorrect data turn wrong signal. Since other devices likely still operating correctly, system fail. Sometimes result unexpected data changes memory. When activated, RESET remains active until supply again exceeds trip voltage nominal) 250ms. This delay releasing RESET helps avoid frequent system reset conditions. Voltage Reset controller provided Xicor's supervisors protects systems from voltage conditions activating RESET output when drops below trip point. RESET asserted until returns stabilizes above trip point. trip points factory several standard voltage levels. Table
Table Factory Vtrip points
Power supply 4.5-5.5 4.5-5.5 2.7-5.5 2.7-5.5 1.8-3.6 Suffix -4.5A Blank -2.7A -2.7 -1.8 Min. 4.25 2.85 2.55 Max. 4.75 4.50 2.70
Power Reset Operation
first, perhaps most critical safeguard that added system reliable power reset. This circuit designed ensure that microcontroller powers correctly every time. combination power supply design microcontroller sensitivity power conditions make this difficult. Often, noisy slow power supply will cause microcontroller improperly initialize, resulting system failure. best ways prevent this "hold" microcontroller until power supply stabilizes. This Power-On Reset feature standard Xicor's X5000 Series Supervisors. Power-On Reset Circuit holds RESET active (preventing microcontroller from operating) until Power supply voltage above fixed threshold nominal 250ms. X51638 special family member. 800ms nominal power reset period ideal devices with power supplies that have longer settling times power oscillators that take longer stabilize
October, 2000
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Other trip points tighter tolerances possible re-programming voltage trip point. This relatively simple process that documented each devices' data sheet. Xicor uniquely implements "analog EEPROM" cell setting voltage threshold. This requires very little current, reprogrammed thousands times remains stable over both time temperature. Progamming threshold requires application signal, something that will happen inadvertently. facilitate programming voltage threshold, Xicor programming small quantities devices (XK5000). high volume needs, standard component test/inspection equipment used. future, programming will supported standard EEPROM programmers. Look future application notes that provide more detailed support documentation, other information reprogrammability special options, please contact factory.
ASIC DSP. This RESET signal returns system known state, while watchdog timer continues monitor system operations, providing improved reliability. Xicor's programmable watchdog timer provides several advantages over competitors: designer choose from three programmable time-out intervals. There need decide factory preset time-out interval before prototypes begin. programmable watchdog timer disabled easily, software, during debug during field recalibration upgrade. This eliminates endless resets that normally occur during debug system with fixed watchdog timer eliminates need remove hardware from board disable watchdog. Since software revisions require tighter looser time-out interval, software programming time-out period results easy system upgrades. This eliminates need make changes board, case with hard-wired devices. watchdog timer simple countdown timer which activates RESET signal when reaches zero. This RESET signal provides system reset microcontroller, microprocessor, ASIC DSP. During normal operation, system software sends signal reset countdown timer maximum value before reaches zero. system locks enters some unwanted state, software operates unexpectedly gets stuck infinite loop, watchdog timer will timeout assert reset signal. asserting RESET, system returns known state continues operate. After deasserting RESET signal, watchdog timer automatically begins another countdown, thus providing system continuous reliability. system software provides watchdog timer restart signal toggling Supervisory EEPROM HIGH LOW. watchdog timer begins countdown from maximum value once pulled low. remains longer than programmable time interval, watchdog timer will `time-out'
Programmable Watchdog Timer
voltage power-on reset circuits helps keep system operational. However, there conditions that impossible predict. Many these involve software hardware/software interface. example: software subroutine waiting peripheral respond never exit peripheral failed. complicated design, many different programmers develop different pieces code. Data passing defined well, completely. When unit field, condition arises that tested unexpected data passed, causing software "crash". Noise input causes processor enter unexpected mode operation. deal with these, other potential system failures, more systems today incorporate watchdog timer. watchdog timer ensures system reliability providing RESET signal microcontroller, microprocessor,
October, 2000
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assert reset signal. This edge triggered restart prevents watchdog timer from being kept continuous restart mode without toggling This feature provides protection system even when restarting watchdog timer.
enabled, Xicor's watchdog timer requires initialization after power-up.
Summary
Xicor's family supervisory EEPROMs combines Power-On Reset, Voltage Reset Watchdog Timer features with standard BlockLockEEPROM. Combined, these five features provide small, powerful, cost efficient improve system reliability. Since always necessary three supervisory features EEPROM, Xicor provides choices give designer greatest possible flexibility. summary available devices, Table
Programming Watchdog Timer
non-volatile bits (WD1, WD0) status register control programmable watchdog timer intervals (See Table These bits accessed read/write status register command described data sheet.) with nonvolatile write operation, write enable command preceeds status register write operation. This write enable command, which sets bit, helps prevent inadvertent changes watchdog timer intervals. applications where Watchdog timer setting very critical, setting WPEN soldering active LOW1 creates psuedoOTP function that requires both hardware change series software commands change watchdog time-out interval.
Table Status Register Example
WPEN
Table Watchdog Timer Intervals
Min. Typ. Max. Units
watchdog timer programmable four preset values: 200ms, 600ms, 1.4s disabled, Table Disabling watchdog timer provides easy software debugging during prototyping without nuisance frequent resets. Once watchdog timer enabled (initially disabled from factory) watchdog timer will power-up begin count down once power reset circuit (POR) de-asserted reset signal. Once
Only available devices with 16K, 32K, EEPROM
October, 2000
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Table Xicor Supervisory EEPROMs
XICOR Device X5001 X5043/X5045 X5163/X5165 X5323/X5325 X5643/X5645 X51638 X5168/X5169 X5328/X5329 X5648/X5649 4.62 4.38 2.92 2.62 1.75 Voltage Reset Options (Nom Volts) Power Reset (Nom Watchdog Timer Timeout Period (Nom Off, Watchdog Timer Reset Period (Nom Reset Active Level Low/High Low/High Off,
EEPROM Density
October, 2000
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