Powerful Instructions (Most Executed Single Clock Cycle) Low-power Idl

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Powerful Instructions (Most Executed Single Clock Cycle) Low-power Idl

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High-performance, Low-power AVR® (AVR2 Core) Enhanced RISC Architecture
Powerful Instructions (Most Executed Single Clock Cycle) Low-power Idle Power-down Modes Bond Locations Conforming 7816/2 Protection 6000V Operating Ranges: from 2.7V 3.3V 4.5V 5.5V Compliant with GSM, 3GPP Specifications Available Wafers, Modules Industry-standard Packages
Memory
Bytes EEPROM, Including 64-byte Area 64-byte Bit-addressable Area
128-byte Program/Erase Program, Erase Typically More than 500,000 Write/Erase Cycles Years Data Retention Bytes Program Memory Bytes
Secure Microcontroller Smart Cards AT90SC6432R
Peripherals
Port
Configurable Support Communication Protocols Including 7816-3
16-bit Timer Random Number Generator (RNG) 2-level, 8-vector Interrupt Controller
Security
Advanced Protection Against Physical Attack Environmental Protection Systems Voltage Monitor Frequency Monitor Secure Memory Management/Access Protection (Supervisor Mode)
Current Development Tools
Hardware Development Support Voyager Emulation Platform (ATV1) Atmel
Description
AT90SC6432R low-power, high-performance, 8-bit microcontroller with EEPROM memory, based enhanced RISC architecture. executing powerful instructions single clock cycle, AT90SC6432R achieves throughputs close MIPS MHz. Harvard architecture includes general-purpose working registers directly connected ALU, allowing independent registers accessed single instruction executed clock cycle. bytes embedded ROM, AT90SC6432R includes bytes Atmel's high density EEPROM. ability EEPROM code space allows parts program memory reprogrammed in-system. This technology combined with versatile 8-bit monolithic chip provides highly flexible cost-effective solution many smart card applications.
Rev. 1555AS-07/01
Note: This summary document. complete document available under NDA. more information, please contact your local Atmel sales office.
Figure AT90SC6432R Enhanced RISC Architecture
EEPROM User Memory Access Control Data 8-bit Random Number Generator
Program Memory
Instruction Register
General Purpose Registers
Access Control Data Memory
Instruction Decoder Control Lines Status Register
Interrupt Unit 7816 Port Timer
Secure Control
IN/OUT
Atmel Corporation 2001. Atmel Corporation makes warranty products, other than those expressly contained Company's standard warranty which detailed Atmel's Terms Conditions located Company's site. Company assumes responsibility errors which appear this document, reserves right change devices specifications detailed herein time without notice, does make commitment update information contained herein. licenses patents other intellectual property Atmel granted Company connection with sale Atmel products, expressly implication. Atmel's products authorized critical components life support devices systems. Corporate Headquarters, 2325 Orchard Parkway, Jose, 95131, (408) 441-0311, (408) 487-2600 Atmel Colorado Springs, 1150 Cheyenne Mtn. Blvd., Colorado Springs, 80906, (719) 576-3300, (719) 540-1759 Atmel Grenoble, Avenue Rochepleine, 123, 38521 Saint-Egreve Cedex, France, (33) 4-7658-3000, (33) 4-7658-3480 Atmel Heilbronn, Theresienstrasse 3535, D-74025 Heilbronn, Germany, (49) (49) Atmel Nantes, Chantrerie, 70602, 44306 Nantes Cedex France, (33) (33) Atmel Rousset, Zone Industrielle, 13106 Rousset Cedex, France, (33) 4-4253-6000, (33) 4-4253-6001 Atmel Smart Card ICs, Scottish Enterprise Technology Park, East Kilbride, Scotland 0QR, (44) 1355-357-000, (44) 1355-242-743 ATMEL AVR® registered trademarks Atmel. Other terms product names trademarks others. Printed recycled paper.
1555AS-07/01

Powerful Instructions (Most Executed Single Clock Cycle) Low-power Idl

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