Mailing Address: 11400 Tucson, 85734 Street Address: 6730 Tucson Blvd.

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

Mailing Address: 11400 Tucson, 85734 Street Address: 6730 Tucson Blvd.

Datasheet Thumbnail

Top Searches for this datasheet

Mailing Address: 11400 Tucson, 85734 Street Address: 6730 Tucson Blvd. Tucson, 85706 Tel: (602) 746-1111 Twx: 910-952-111 Telex: 066-6491 (602) 889-1510 Immediate Product Info: (800) 548-6132
BURR-BROWN SPICE BASED MACROMODELS, REV.
Hubert Biagi, Mark Stitt, Bonnie Baker, Stephan Baier
INTRODUCTION
Computer based simulation importance because significantly reduce development time therefore speed time-to-market process. increased SPICE based simulation software created rising demand accurate models. Such models, macromodels, should reflect actual performance component, without carrying burden many circuit details, which lead convergence problems. BURR-BROWN responded this need provides macromodels broad range semiconductor products. This Application Bulletin, accompanying disk collection SPICE models BURR-BROWN amps, difference amps, instrumentation amps, isolation amps, analog function circuits. There four different levels model topologies used, which are: Level Standard Macromodel Level Enhanced Macromodel Level III: Multi-Pole/Zero Macromodel Level Simplified Circuit Model standard macromodels were derived using MicroSim Corporation PSpice® Partssimulation software. detailed description this macromodel type given Section second level macromodel enhanced version standard model, which indicated suffix model's name. This model type included offer circuit designer model with higher level accuracy. Section details. Multiple-Pole/Zero macromodel uses same input stage standard enhanced macromodel, multiple poles pole/zero pairs mid-section. This model designation "M", used wide bandwidth amps function circuits where this topology showed advantage over standard topology. detailed description Section some instances, fourth type model available, which designated either "X", "X1", "X2" suffix. model this level macromodel, rather simplified circuit model transistor level. Here, Standard macromodels (Level found STD_MOD subdirectory. Enhanced macromodels (Level found ENH_MOD subdirectory. Multi-Pole/Zero macromodels (Level III) found MPZ_MOD subdirectory, Simplified circuit models (Level found CIR_MOD subdirectory. Examples model files shown Table This application bulletin macromodel disk being revised frequently. obtain latest revision please contact your nearest sales office. Each model net-list starts with header containing part number, revision information, license statement. should noted that disk contains only net-lists macromodels, does provide simulation software that allows user models. structure net-lists conforms standard SPICE format, which most SPICE based simulators will accept. Please refer individual software manual conflicts encountered. Burr-Brown also welcomes comments, which sent Applications Department address given above.
FILE NAME OPA111.MOD OPA111E.MOD OPA671M.MOD OPA603X.MOD DESCRIPTION OPA111 OPA111 OPA671 OPA603 Standard Macromodel Enhanced Macromodel Multiple Pole/Zero Macromodel Simplified Circuit Model
simplified circuit models produce most accurate simulation results, because complexity, require longer simulation time. Section detailed discussion these models. complete overview available macromodels disk Table last page. DISKETTE INFORMATION disk four different subdirectories, which models organized according their topology level: CIR_MOD ENH_MOD MPZ_MOD STD_MOD
TABLE Examples Files Macromodel Disk.
PSpice® PartsTM, MicroSim Corp.
1990 Burr-Brown Corporation
AB-020F
Printed U.S.A. January, 1995
GENERAL INFORMATION
Throughout this application bulletin net-lists macromodels, standard definitions designators used. reference they listed following tables. Table Table specifically refer Standard Enhanced macromodel only. Listed Table definitions used component prefixes.
COMPONENT CEE, EGND G11,G21 DESCRIPTION Phase-Control Capacitor Compensation Capacitor Slew-Rate Limiting Capacitor Substrate Junction Voltage-Controlled Voltage Source Output Device (Controlled Current Through VLP, VLN) Input Bias Current Correction Interstage Transconductance (Controlled Differential Voltage Input Device Loads) Common-Mode Transconductance (Controlled Common-Mode Voltage Input Device Emitters Sources) Input Stage Current Voltage-Limiting Device JFET Input Transistors Bipolar Input Transistors Interstage Resistance Input-Stage Load Resistance Input-Stage Load Resistance Input-Stage Emitter Resistance Input-Stage Current-Source Output Resistance Output Resistors Power Dissipation Resistor Independent Voltage Source Output Offset Limiter Output Offset Limiter Output Current Limiting Sensor Negative Supply Limit Positive Supply Limit
PREFIX
DEFINITION Capacitor Diode Voltage-Controlled Voltage Source Current-Controlled Current Source Voltage-Controlled Current Source Current-Controlled Voltage Source Independent Current Source Stimulus JFET Transistor Bipolar Transistor Resistor Voltage-Controlled Switch Independent Voltage Source Stimulus
TABLE Macromodel Component Prefix Definitions. LIMITATIONS These macromodels intended help designers simulate typical amplifier performance. macromodels were compiled using data sheet typical specifications. Where data sheet specifications were available, typical measured values design values were used. Macromodels were verified with several standard simulations such gainphase large- small-signal transient response. some cases, adjustments were made macromodels simulations with macromodel more closely agreed with actual measured typical performance. Since these macromodels only simulate typical performance certain selected specifications, they will predict actual device performance under conditions. Good design practice dictates that, addition simulation with macromodels, circuit verification must include: worst case analysis with data sheet minimum maximum room temperature specifications worst case analysis with variation specifications over operating temperature range thorough breadboard evaluation complete prototype characterization
IEE, HLIM RC1, RD1, RE1, REE, RO1, VLIM VLN, VLP,
TABLE Macromodel Components Standard Enhanced Macromodels.
BURR-BROWN SYMBOL MACROMODEL DESIGNATION +VPWR, -VPWR +VOUT, -VOUT Av-dc F-0dB CMRR Ro-dc Ro-ac
DEFINITION Positive, Negative Power Supply Positive, Negative Output Swing Positive-Going Slew Rate Negative-Going Slew Rate Quiescent Power Dissipation Input Bias Current Open-Loop Voltage Gain Unity-Gain Frequency Common-Mode Rejection Ratio Phase Margin F-0dB Output Resistance Output Resistance Short-Circuit Output Current Compensation Capacitance
UGBW CMRR
DUAL QUAD AMPS amps modeled single devices. model duals quads, four models. Quiescent current dual quad macromodel dual quad quiescent current divided four. INSTRUMENTATION AMPLIFIERS DIFFERENCE AMPLIFIERS Instrumentation amplifier difference amplifier macromodels standard macromodels plus additional components shown Figures There types models used difference amplifiers. They four-resistor difference amplifier five-resistor difference amplifier. FOUR-RESISTOR DIFFERENCE AMPLIFIER four-resistor difference amplifier macromodel, used INA105, INA106, difference amplifier section instrumentation amplifier macromodels, shown
TABLE III. PSpice Parts Inputs Standard Enhanced Marcomodels.
Figure circuit uses four matched resistors. R2/R1 R4/R3, GAIN R2/R1 simulate error, 0.01% low. four resistor difference amplifier LOG10 [(%/100) R1/(R1 R2)] Where: error resistor. With 0.01% resistor error, INA105 unity gain difference amplifier 86dB, INA106 gain-of-ten difference amplifier 100.8dB. simulate error, small value capacitor, placed parallel with roll-off with increasing frequency.
FIGURE INA117 High Voltage Difference Amplifier Macromodel Node Assignments.
Sense
FIGURE Difference Macromodel Node Assignments. FIVE-RESISTOR DIFFERENCE AMPLIFIER five-resistor difference amplifier macromodel used INA117 shown Figure advantage five-resistor difference amplifier configuration boost input common-mode-voltage range given common-mode range. circuit uses five matched resistors. R5)/R1 R4/R3, GAIN R2/R1 simulate error, 0.005% low. errors five-resistor difference amplifier LOG10 [(%/100) R1/(R1 R4)] Where: error R5/(R2 With 0.005% resistor error, INA117 high common-mode-voltage unity-gain difference amplifier 86.5dB. Note that unlike four resistor difference amplifier, sensitivity errors resistor value different different resistors. simulate error, small value capacitor, placed parallel with roll-off with increasing frequency.
FIGURE Standard Instrumentation Amplifier Macromodel Node Assignments.
FIGURE
DESCRIPTION Difference Macromodel Node Assignments INA117 Difference Amplifier Macromodel Instrumentation Macromodel Node Assignments INA103 Macromodel Node Assignments INA118 Macromodel Node Assignments INA110 Macromodel Node Assignments INA120 Internal Gain Setting Resistor Connections
TABLE Figure Reference.
FIGURE INA103 Current-Feedback Instrumentation Amplifier Macromodel Node Assignments.
IBAL
(V-)
FIGURE INA118 Instrumentation Amplifier Macromodel Node Assignments.
FIGURE INA110 Current-Feedback FET-Input Instrumentation Amplifier Macromodel Node Assignments.
INA120 INTERNAL GAIN CONNECTIONS(1) GAIN 1000 G4-G5 G4-G5 G4-G8 G4-G8 CONNECT G14-G15 G11-G14-G15 G11-G14 G11-G14
G10-G15 G9-G15
NOTE: numbers also package numbers.
FIGURE INA120 Internal Gain-Setting Resistor Connections.
SECTION STANDARD MACROMODELS
standard macromodels were created running PSpice® PartsSimulation software IBM-compatible This software uses standard Boyle model(1). PSpice manual available from Microsim(2) contains detailed discussion each elements used macromodels. macromodels node assignments shown Figures FET-input amplifiers using standard PSpice Parts topology shown Figures node assignments standard PSpice Part macromodels with bipolar-inputs shown Figures Figure shows external node assignments. Tables list component prefix designations, macromodel component descriptions, PSpice INPUT designations used standard enhanced models. parameters that modelled standard macromodels listed Table
FIGURE Node Assignments Standard Enhanced Macromodels.
FIGURE
DESCRIPTION Node Assignments OPTxxx Node Assignments N-Channel JFET-Input P-Channel JFET-Input Bipolar-Input Bipolar-Input
TABLE Standard Macromodels Figure Reference.
DPHOTO RPHOTO CPHOTO A1(1) ROUT
NOTE: Boyle model illustrated Figure
FIGURE OPT-Standard Macromodel.
Table more detailed description components.
HLIM
VLIM
EGND
FIGURE N-Channel JFET-Input Standard PSpice Parts Macromodel.
more information, see: G.R. Boyle, B.M. Cohn, D.O. Pederson, J.E. Solomon, "Macromodeling Integrated Circuit Operational Amplifiers," IEEE Journal Solid-State Circuits, SC-9, (1974). MicroSim Corporation, Fairbanks, Irvine, 92718 USA, (714) 770-3022, (800) 245-3022.
HLIM
Table more detailed description components.
VLIM
EGND
FIGURE N-Channel JFET-Input Standard PSpice Parts Macromodel.
Table more detailed description components.
HLIM
VLIM
EGND
FIGURE NPN-Input Standard PSpice Parts Macromodel.
Table more detailed description components.
HLIM
VLIM
EGND
FIGURE PNP-Input Standard PSpice Parts Macromodel.
SECTION ENHANCED MACROMODELS
enhanced version, "E", standard PSpice Parts model contains several additional performance features. macromodels using this topology ENH_MOD subdirectory disk. FET-input amplifiers using standard PSpice Parts topology plus enhancements shown Figures node assignments enhanced macromodels with bipolar-inputs shown Figures Figure shows external node assignments. Tables III, list component prefix designations, macromodel component descriptions, PSpice INPUT designations used standard enhanced models. parameters that modelled enhanced macromodels listed Table Additions changes standard PSpice Parts macromodel enhanced version discussed following text.
FIGURE
DESCRIPTION N-Channel JFET-Input P-Channel JFET-Input Bipolar-Input Bipolar-Input OPA27/37 Input Protection OPA77/177 Input Protection INA114/118 Input Protection Circuitry
Input Current Correction feature that Burr-Brown offers with enhanced model type accurate simulation input bias current N-Channel JFET P-Channel JFET operational amplifiers. Mathematically, input bias current JFET amps should equal twice JFET model. However, simulation will show that gate current from Figures through between 20pA larger than expected, depending common-mode voltage input stage magnitude supply voltages, included model. This additional current generated from drain-to-gate source-to-gate nodes input FETs operational amplifier, which manifests itself bias current amplifier. additional current caused Spice default value, GMIN. this case, 1/GMIN impedance between drain gate source gate. This done Spice keep gate node each from floating. default value, GMIN 1E-12 voltage dependent current sources, remove this error current from model, hence macromodel models input bias current correctly. This technique used FET-enhanced multiple pole/zero macromodels. improve simulation accuracy .OPTIONS statement should include ABSTOL 100fA 10fA. Noise Most enhanced JFET-input macromodels model device current noise voltage noise. current noise modeled using RN1, RN2, RN3, RN4, create noise source voltage-dependent current sources, G21, model noise inverting
TABLE VII. Enhanced Macromodels Figure Reference.
CDIF C2CM C1CM EGND HLIM VLIM
Table more detailed description components.
FIGURE N-Channel JFET-Input Enhanced PSpice Parts Macromodel.
inverting inputs amplifiers. voltage noise modelled using DN1, DN2, create noise source model noise non-inverting input amplifiers. Input Capacitance Differential common-mode input capacitors, CDIF, C1CM, C2CM have been added enhanced macromodels. Input capacitance could also modeled including capacitor coefficients transistor models. Instead, discrete capacitors were used comparison standard model would more obvious.
Input Protection Diodes contains input protection diodes, enhanced macromodel also contains diodes connected between input pins shown Figures example. Quiescent Power replaced value higher. models only resistive portion quiescent current. current sources described below model constant portion quiescent current. This technique provides more accurate model quiescent current power-supply voltage.
HLIM VLIM EGND
CDIF C2CM C1CM
Table more detailed description components.
FIGURE P-Channel JFET-Input Enhanced PSpice Parts Macromodel.
CDIF C2CM C1CM EGND HLIM VLIM
Table more detailed description components.
FIGURE NPN-Input Enhanced PSpice Parts Macromodel.
HLIM C2CM CDIF C1CM EGND
Table more detailed description components.
VLIM
FIGURE PNP-Input Enhanced PSpice Parts Macromodel. Output Current Flowing from Power-Supply Nodes number components were added that both load quiescent current flow from power supply nodes. mirrors current flowing from VLIM. Positive current from flows through into VQ1. Negative current from flows through into VQ2. supplies constant portion plus mirrors positive output current, which measured VQ1. supplies constant portion plus mirrors negative output current, which measured VQ2.
X1.S21
NOTE: enhanced macromodels more complicated require more simulation time than standard macromodels, will provide more accuracy simulations some applications.
X1.VS11 X1.FS22 X1.FS11 X1.S11 Protection circuitry inverting input.
D1N1 D1N2
X1.FS12
X1.FS21 X1.VS21
FIGURE Input Protection Diode Circuitry Used OPA27/37 Enhanced Macromodels.
X2.VS11 X2.FS22 X2.FS11 X2.S11 X2.S21 X2.FS12 X2.FS21 X2.VS21 Protection circuitry non-inverting input.
FIGURE Input Protection Circuitry Used OPA77/177 Enhanced Macromodels.
FIGURE Input Protection Circuitry Used INA114/118 Enhanced Macromodel.
SECTION MULTIPLE-POLE/ZERO MACROMODELS
multiple pole/zero ("M") macromodel allows modeling more than poles additional zeros macromodel. macromodels using this topology MPZ_MOD subdirectory disk. input stage this model similar standard enhanced macromodels; however, after input stage that similarity disappears. using various circuit topologies gain stages, pole stages, zero stages pole/ zero stages constructed. number each these stage types dependent performance characteristics amplifier being modelled. effort made match macromodel performance closely possible tested gain/phase amp. output stage also offers
improvements current steering from supply voltages. This model type typically used model high-speed amplifiers; however, come useful when modelling function circuits that require special considerations.
FIGURE
DESCRIPTION N-Channel JFET-Input P-Channel JFET-Input Bipolar-Input Bipolar-Input Gain-, Pole/Zero, Output Stages ACF2101M-Op Section ACF2101M-Node Assignments OPA675M/676M-Input Stage OPA675M/676M-Package Parasitics VCA610M-Macromodel
TABLE VIII. Multi Pole/Zero Macromodels Figure Reference.
CDIFF
FIGURE Input Stage N-Channel JFET-Input Multiple Pole/Zero Macromodel.
CDIFF
FIGURE Input Stage P-Channel JFET-Input Multiple Pole/Zero Macromodel.
CDIFF
FIGURE Input Stage NPN-Input Multiple Pole/Zero Macromodel.
CDIFF
FIGURE Input Stage PNP-Input Multiple Pole/Zero Macromodel. accuracy this model topology compared standard enhanced model topologies improved high speed amplifiers primarily because improved gain/ phase performance. Assuming convergence problem exists with macromodels discussed far, time taken Spice produce operating point calculation multiple pole/zero model about twice time required standard model. transient analysis using this model, simulation time reduced using .OPTION statement increase number transient iterations from proper Spice command .OPTIONS ITL4=40 basic topology input stages this model shown Figures input stage only section macromodels that differ between four types amps (N-Channel FET, P-Channel FET, Bipolar, Bipolar). remainder macromodel circuit (gain stages, phase stages, CMRR stage, output stage) shown generic form Figure summary parameters modelled listed Table
Gain Stage Reference
(V12 V16) (V12 V16) (V17 V16)
(V11 V16)
(V17 V16)
(V13 V16)
(V13 V16)
(V11 V16)
Pole/Zero Stage Zero/Pole Stage Common-Mode Gain Stage with Zero Pole Stage
V15) (From Previous Stage) Output Intermediate Output Node
V15)
(V15
(V15
Correction Current Sources
Output Stage
FIGURE Multiple Pole/Zero Macromodel without Input Stage. Refer Figures Through Input Stage Topology.
FIGURE Section ACF2101 Using Multiple Pole/Zero Macromodel Topology.
CINT
FIGURE Node Assignments ACF2101 Macromodel. multiple pole/zero topology used model section ACF2101 switched integrator. node assignments this model shown Figure transient time switches (HOLD, RESET, SELECT) should programmed have slew 6V/µs. Complying with this requirement will give user greater success convergence during transient analysis, more accurate emulation effect 200ns switching speed actual switching transistors ACF2101. This easily implemented with PULSE command Spice. Also, insure proper operation, always establish initial bias point transient analysis with RESET HOLD equal potential COMMON (node
-InA
+InA -InB
Q1-2
Q2-2
+InB
RSW1 VTTL1 CSW1
RSW2 CSW2 VTTL2
FIGURE Input Stage OPA675 OPA676 Switched-Input Using Multiple Pole/Zero Macromodel Topology.
(15)
(201)
Ideal 675/676
LOUT COUT1
COUT2
(16)
(202)
CCPP1
LCPP
CCPP2 Comp
FIGURE Package Parasitics Modelled OPA675 OPA676 Macromodel. OPA675 OPA676 wideband amps with independent differential inputs (Figure C8). multiple pole/zero topology used model portion these switched-input amplifiers. Both amplifiers identical except switch logic. OPA675 ECLswitched device OPA676 TTL-switched device. Both files will model device characteristics package parasitics. user using product form, package parasitics longer apply (Figure C9).
Gain Control
Gain Stage
Quiescent Current
Input Stage
Output Stage
FIGURE C10. VCA610M Voltage Controlled Amplifier using Multiple Pole/Zero Macromodel Topology.
SECTION SIMPLIFIED CIRCUIT MODELS
already mentioned simplified circuit models provide much different simulation approach, because they follow standard model design. They micromodels transistor level, therefore each model individual circuit schematic, which shown following pages. Almost devices this model level (Level wideband/high-speed components with bandwidth capabilities 1GHz. Some models have only simplified circuit model available, labeled with suffix "X". Other models offer simplified circuit models. general, models with "X1" suffix equivalent complexity models. They simpler implementations macromodel will simulate faster; however, accuracy good with macromodels with "X2" suffix same product. these models found CIR_MOD subdirectory disk. These models designed using different topologies than mentioned above several non-linear elements. Because increased number non-linear elements these models, simulation time longer, accuracy improved. wideband operational amplifiers that have simplified circuit macromodels were designed using several subcircuits that allow user implement variety configurations. OPA622 monolithic amplifier that configured current-feedback amplifier voltage-feedback amplifier. Like typical current-feedback amplifier, OPA622 constant large-signal bandwidth 280MHz. would expect that when OPA622 configured voltage-feedback configuration bandwidth would change with gain. This case. When OPA622 configured voltage-feedback amplifier, will again have constant bandwidth over wide gain output voltage range. voltage-feedback mode, OPA622 offers speed advantages current-feedback amplifiers matched input impedance advantage voltagefeedback amp. OPA623 strictly configured current-feedback amplifier, using same internal design OPA622.
OPA660 wideband amplifier offers user "ideal transistor" buffer. "ideal transistor" three terminals available user-a high-impedance input (base), low-impedance input/output (emitter) current output (collector). This "ideal transistor", otherwise called Operational Transconductance Amplifier (OTA), constructed using several discrete real transistors chip give user superior gain temperature performance, hence, comparison "ideal transistor". Although these transistor level models more accurate than other three topology levels used macromodels this disk, user cautioned that models circuit design suggested replacement breadboarding. Simulation should used forerunner supplement traditional testing. parameters that modelled transistor level circuit macromodels listed Table
FIGURE
DESCRIPTION BUF600/601X1 Circuit Model BUF600/602X2 Complex Circuit Model BUF634X Circuit Model ISO120/121X Circuit Model ISO130 Circuit Model MPC100X1 Circuit Model MPC100X2 Complex Circuit Model OPA603X Circuit Model OPA620/621X Circuit Model OPA622X1 Circuit Model OPA622X2 Complex Circuit Model OPA623X1 Circuit Model OPA623X2 Complex Circuit Model OPA640X/OPA641X Circuit Model OPA642X/OPA643X Circuit Model OPA644X Circuit Model OPA646X Circuit Model OPA648X Circuit Model OPA64x Package Parasitics OPA658X Circuit Model OPA660X1 Circuit Model OPA660X2 Complex Circuit Model
TABLE VIIII. Simplified Circuit Models Figure Reference.
Q16X
C208
VOUT
FIGURE BUF600X1 BUF601X1 Simplified Circuit Macromodel. Compared Figure this macromodel less complex with faster simulation times.
1.4X
1.4X
C204
C208
VOUT
1.4X
1.4X
FIGURE BUF600X2 BUF601X2 Complex Macromodel. Compared Figure this macromodel more complex requires more simulation time.
+VCC VOUT
-VCC
FIGURE BUF634X Simplified Circuit Macromodel.
3(3)(1) +VS1 GND1 24(40)
15(23) +VS2 12(20) 13(21) 11(19) VOUT GND2
23(39)
14(22)
10(18)
VOUT
COM1
21(37)
COM2 -VS2
9(17) -VS1 4(4) 16(24)
NOTE: First node number ISO120. Second node number ISO121.
FIGURE ISO120/121X Isolation Amplifiers Simplified-Circuit Macromodel.
VINP GVS1
VIN+
VIN-
GND1
TDELAY
VOUT+ VOUT-
GND2 GVS2
FIGURE ISO130X Simplified-Circuit Model.
VOUT
FIGURE MPC100X1 Simplified-Circuit Macromodel. Compared Figure this macromodel less complex with faster simulation times. Shown here only four inputs MPC100. However, same circuit schematic applies MPC102X1 MPC104X1 model.
VOUT
FIGURE MPC100X2 Complex-Circuit Macromodel. Compared Figure this macromodel more complex requires more simulation time. Shown here only four inputs MPC100.
QSCB QSCA
FIGURE OPA603X High Speed Current-Feedback Simplified-Circuit Macromodel.
NOTE: OPA620 OPA621 simplified-circuit macromodels same with following exceptions. MODEL OPA620 OPA621 (pF) (mA) (mA) (mA)
FIGURE OPA620X OPA621X High Speed Simplified-Circuit Macromodel.
Biasing Circuit (BC)
Diamond Buffer (DB) Diamond Transistor (DT)
Current Buffer (CB)
Q121
Q123
VOUT
2.2X
Buffer
Voltage
2.2X
Buffer
Q122
Q124
R122
R123
Adjust
FIGURE D10. OPA622X1 Simplified Circuit Macromodel. Compared Figure D11, this macromodel less complex with faster simulation times.
Diamond Transistor (DT)
Current Buffer (CB)
C213
C209
VOUT
C210
Buffer
Diamond Buffer (DB)
Biasing Circuit (BC) Q121 Q123 C121 Q125
I121
C208
Buffer
Q122
Q124 R122 C124
R123
C202
Adjust
FIGURE D11. OPA622X2 Complex Macromodel. Compared Figure D10, this macromodel more complex requires more simulation time.
Biasing Circuit (BC)
Diamond Transistor (DT)
Current Buffer (CB)
Q121 Q123
2.2X
2.2X
VOUT
Q122
Q124
FIGURE D12. OPA623X1 Simplified-Circuit Macromodel. Compared Figure D13, this macromodel less complex with faster simulation times.
Diamond Transistor (DT)
Current Buffer (CB)
C203
C206
VOUT
C202
Biasing Circuit (BC) Q121 Q123 C121 Q125
Q122
Q124 C124
FIGURE D13. OPA623X2 Complex Macromodel. Compared Figure D12, this macromodel less complex with faster simulation time.
ISOUR
FIGURE D14. OPA640X, OPA641X, Wide Bandwidth Simplified-Circuit Macromodel. Figure package parasitics.
ISOUR
FIGURE D15. OPA642X, OPA643X, Distortion, High-Speed Simplified-Circuit Macromodel. Figure package parasitics.
CS33 IOUT1 RB29 RE29 CE29 RBB34 CU34 ISOUR RB34 RB32 RE31 CE32 R032 C032 CU32 RE34 RE30 R029 C029 C8PP CU29 C3PP RE33 CE33 R033 RB33 RBB33 CU33
C1PP CE34
C4PP
R034 C034 C12PP
C2PP
FIGURE OPA644x, High-Speed Simplified-Circuit Macromodel. Figure package parasitics.
ISOUR
FIGURE D17. OPA646X, Power, High-Speed Simplified-Circuit Macromodel. Figure package parasitics.
B???
CCOMP
ISOUR
FIGURE D18. OPA648X, High-Speed Simplified-Circuit Macromodel.
L14P C16P C17P R22P C23P R27P C24P L18P R11P C14P L27P C29P R33P L22P C22P C18P C10P L10P R18P C15P C35P C38P
R17P
L15P
R21P
L19P R26P
C30P C31P
L23P
R31P
FIGURE D19. Schematic Model Parasitics Used OPA64X High-Speed Series.
R12P
L28P R38P
R37P L31P
L13P
L10P R10P
R11P
L11P
ISOUR1
FIGURE D20. OPA658X, OPA2658X OPA4658 Current-Feedback Wideband Simplified-Circuit Macromodel.
ISOUR2
Biasing Circuit (MBC) Diamond Transistor (MDT) Buffer Base C206
Diamond Buffer (MDB)
Q121
Q123
C208 Emitter C202 Collector
Buffer
Q122
Q124
R122
R123
C201
Adjust
FIGURE D21. OPA660X1 Simplified-Circuit Macromodel. Compared Figure D22, this macromodel less complex with faster simulation times.
Biasing Circuit (MBC)
Diamond Buffer (MDB)
Diamond Transistor (MDT) C202
Q125
Q121 Q123 Q124 Buffer C206 C203 Buffer C205 Base
C121
I121
Emitter C208 Collector
Q122
R123
C124
Adjust
C201
R122
FIGURE D22. OPA660X2 Complex Macromodel. Compared Figure D21, this macromodel more complex requires more simulation time.
OUTPUT FLOWING FROM POWER SUPPLIES
QUIESCENT CURRENT POWER SUPPLY
INPUT BIAS CURRENT CORRECTION
OUTPUT VOLTAGE SWING
QUIESCENT CURRENT TEMPERATURE
DEVICE CHARACTERISTICS MODELED
INPUT OFFSET CURRENT
OUTPUT CURRENT LIMIT
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
QUIESCENT CURRENT
GAIN TEMPERATURE
INPUT BIAS CURRENT
OUTPUT RESISTANCE
CMRR FREQUENCY
INPUT PROTECTION
GAIN FREQUENCY
OFFSET VOLTAGE
INPUT IMPEDANCE
PHASE RESPONSE
PSRR FREQUENCY
SLEW RATE
PARASITICS
GROUND REFERENCE
COMMENTS
ACF2101M BUF600X1 BUF600X2 BUF601X1 BUF601X2 BUF634X INA101 INA101E INA102 INA102E INA103 INA103E INA105 INA105E INA106 INA106E INA110 INA110E INA111 INA111E INA114 INA114E INA115 INA115E INA117 INA117E INA118 INA118E INA120 INA120E INA131 INA131E ISO120X ISO121X ISO130X MPC100X1 MPC100X2 MPC102X1 MPC104X1 OPA1013 OPA1013E OPA111 OPA111E OPA121 OPA121E OPA124 OPA124E OPA128 OPA128E OPA129 OPA129E OPA131 OPA131E OPA177 OPA177E
PSRR
MODEL
C6,7
TABLE Parameters Modeled Standard, Enhanced, Multiple Pole/Zero, Simplified Circuit Macromodel.
FIGURE
OUTPUT FLOWING FROM POWER SUPPLIES
QUIESCENT CURRENT POWER SUPPLY
INPUT BIAS CURRENT CORRECTION
OUTPUT VOLTAGE SWING
QUIESCENT CURRENT TEMPERATURE
DEVICE CHARACTERISTICS MODELED
INPUT OFFSET CURRENT
OUTPUT CURRENT LIMIT
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
QUIESCENT CURRENT
GAIN TEMPERATURE
INPUT BIAS CURRENT
OUTPUT RESISTANCE
CMRR FREQUENCY
INPUT PROTECTION
GAIN FREQUENCY
OFFSET VOLTAGE
INPUT IMPEDANCE
PHASE RESPONSE
PSRR FREQUENCY
PARASITICS
GROUND REFERENCE
SLEW RATE
COMMENTS COMMENTS
OPA2107 OPA2107E OPA2111 OPA2111E OPA2131 OPA2131E OPA2541 OPA2541E OPA2604 OPA2604E OPA2604M OPA2658X OPA27 OPA27E OPA27M OPA37 OPA37E OPA404 OPA404E OPA445 OPA445E OPA4131 OPA4131E OPA4658X OPA501 OPA501E OPA502 OPA502E OPA511 OPA511E OPA512 OPA512E OPA541 OPA541E OPA602 OPA602E OPA603X OPA604 OPA604E OPA604M OPA606 OPA606E OPA620 OPA620E OPA620X OPA621 OPA621E OPA621X OPA622X1 OPA622X2 OPA623X1 OPA623X2 OPA627 OPA627E OPA628M
PSRR
MODEL
TABLE (cont). Parameters Modeled Standard, Enhanced, Multiple Pole/Zero, Simplified Circuit Macromodel.
FIGURE
OUTPUT FLOWING FROM POWER SUPPLIES
QUIESCENT CURRENT POWER SUPPLY
INPUT BIAS CURRENT CORRECTION
OUTPUT VOLTAGE SWING
QUIESCENT CURRENT TEMPERATURE
DEVICE CHARACTERISTICS MODELED
INPUT OFFSET CURRENT
OUTPUT CURRENT LIMIT
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
QUIESCENT CURRENT
GAIN TEMPERATURE
INPUT BIAS CURRENT
OUTPUT RESISTANCE
CMRR FREQUENCY
INPUT PROTECTION
GAIN FREQUENCY
OFFSET VOLTAGE
INPUT IMPEDANCE
PHASE RESPONSE
PSRR FREQUENCY
PARASITICS
GROUND REFERENCE
SLEW RATE
COMMENTS COMMENTS
OPA637 OPA637E OPA640X OPA641X OPA642X OPA643X OPA644X OPA646X OPA648X OPA660X1 OPA660X2 OPA671M OPA675M OPA676M OPA77 OPA77E OPT101 OPT201 OPT202 OPT209 UAF42 UAF42E VCA610M
PSRR
MODEL
COMMENTS: Instrumentation Amplifier. Difference Amplifier. four amps UAF42 chip identical. This model only contains amp. Also models isolation barrier impedance. Also models enable transient response quiescent resistor transient response. Also input control switch models transient response. Model includes HOLD, RESET SELECT switches internal capacitor. Also models total harmonic distortion. Also models bias current power supply bias current common-mode. Also models group delay time. Also models switching times. Also models output recovery time. Also models gain control frequency. Contact factory more detailed description this macromodel 548-6132 (602) 746-7852.
TABLE (cont). Parameters Modeled Standard, Enhanced, Multiple Pole/Zero, Simplified Circuit Macromodel.
FIGURE
PRODUCT NOTES
more information please refer individual data sheet. ACF2101 SWITCHED INTEGRATOR integrator output voltage range from +0.5V -10V. output voltage (VOUT) calculated
three internal gain-setting resistors shown table external gain-setting resistor INA103 INSTRUMENTATION AMPLIFIER INA103 contains internal gain-setting feedback resistors: 60.606 (Gain 100) internal gain-setting feedback resistors used, external feedback resistors used. internal resistors used: GAIN (6k/RG) external feedback resistors used: GAIN RFB/RG) Where: Optional external gain-setting resistor Optional external feedback resistor INA110 INSTRUMENTATION AMPLIFIER
INA110 INTERNAL GAIN-SETTING RESISTORS 4.444K 404.04 201.0 80.16 GAIN (V/V)
VOUT output voltage ACF2101 CINT integration capacitor farads) input current amperes) integration time seconds) INA101 INSTRUMENTATION AMPLIFIER INA101 contains internal gain-setting feedback resistors; When using metal package (TO-100), these resistors must used. When using ceramic plastic packages, internal gain-setting feedback resistors used, external feedback resistors used. internal resistors used: GAIN (40k/RG) external feedback resistors used: GAIN RFB/RG) Where: external gain-setting resistor optional external feedback resistor INA102 INSTRUMENTATION AMPLIFIER INA102 contains internal gain-setting feedback resistors;
INA102 INTERNAL GAIN-SETTING RESISTORS 4.444k 40.4 GAIN (V/V) 1000
INA110 contains internal gain-setting feedback resistors; internal resistors ratio trimmed high accuracy have excellent tracking with temperature gain drift. internal resistors used: GAIN (40k/RG) External gain-setting resistors used series with internal gain-setting resistors. external gain-setting resistors used: GAIN (40k/RGI RGE]) =one four above internal gain-setting resistors external gain-setting resistor INA111 INSTRUMENTATION AMPLIFIER INA111 contains internal gain-setting feedback resistors; External gain-setting resistors used gain GAIN (50k/RG) external gain resistor
internal resistors ratio trimmed high accuracy have excellent tracking with temperature gain drift. internal resistors used: GAIN (40k/RG) External gain-setting resistors used series with internal gain-setting resistors. external gain-setting resistors used: GAIN (40k/[RGI RGE])
INA120 INSTRUMENTATION AMPLIFIER INA120 contains internal gain-setting feedback resistor string;
INA120 INTERNAL GAIN-SETTING RESISTORS 4000 GAIN [V/V] 1000
OPA660 OPERATIONAL TRANSCONDUCTANCE AMPLIFIER BUFFER This device includes voltage-controlled current source voltage buffer. voltage-controlled current source Operational Transconductance Amplifier viewed "ideal transistor". transconductance adjusted with external resistor, allowing bandwidth, quiescent current gain tradeoffs optimized. Demo boards available. OPA675 SWITCHED-INPUT OPERATIONAL AMPLIFIER OPA675 "classical" high-speed amplifier that differential input stages. Each stage selectable with logic. OPA676 SWITCHED-INPUT OPERATIONAL AMPLIFIER OPA676 "clasical" high-speed amplifier that differential input stages. Each stage selectable with logic. OPA2111 DUAL OPERATIONAL AMPLIFIER OPA2111 slew rate asymmetric with positivegoing slope faster than negative-going slope (4V/µs 2V/µs). Since PSpice macromodel only allows asymmetric slew rate opposite direction, conservative symmetrical slew rate 2V/µs used macromodel.
internal resistors ratio-trimmed high accuracy have excellent tracking with temperature gain drift. internal gain-setting resistor string used, connected amplifier input terminals give accurate gains 100, 1000. gain equation same external gain-setting resistors, higher gains, part lower gain-setting resistor added feedback resistor values shown inserted directly equation-see Figure internal feedback resistors used with external feedback resistors. internal feedback resistors used with external gain-setting resistors: GAIN (40k/RG) Where: optional gain-setting resistor connected between with open External gain-setting feedback resistors used. external feedback resistors used: GAIN RFB/RG) Where: Optional external gain-setting resistor Optional external feedback resistor OPA111 OPERATIONAL AMPLIFIER OPA111 slew rate asymmetric with positivegoing slope faster than negative-going slope (4V/µs 2V/µs). Since PSpice macromodel only allows asymmetric slew rate opposite direction, conservative symmetrical slew rate 2V/µs used macromodel. OPA121 OPERATIONAL AMPLIFIER OPA121 slew rate asymmetric with positivegoing slope faster than negative-going slope (4V/µs 2V/µs). Since PSpice macromodel only allows asymmetric slew rate opposite direction, conservative symmetrical slew rate 2V/µs used macromodel.
information provided herein believed reliable; however, BURR-BROWN assumes responsibility inaccuracies omissions. BURR-BROWN assumes responsibility this information, such information shall entirely user's risk. Prices specifications subject change without notice. patent rights licenses circuits described herein implied granted third party. BURR-BROWN does authorize warrant BURR-BROWN product life support devices and/or systems.
CONTENT MACROMODEL DISK
LEVEL STD_MOD
ACF2101M BUF600X1 BUF600X2 BUF601X1 BUF601X2 BUF634X ISO120X ISO121X ISO130X OPA646X OPA648X OPA650X OPA658X OPA2658X OPA4658X OPA660X1 OPA660X2
LEVEL STD_MOD
LEVEL STD_MOD
LEVEL STD_MOD
OPA27M OPA604M OPA628M OPA671M OPA675M OPA676M OPA2604M VCA610M MPC100X1 MPC100X2 MPC102X1 MPC104X1
INA101 INA102 INA103 INA105 INA106 INA110 INA111 INA114 INA115 INA117 INA118 INA120 INA131
INA101E INA102E INA103E INA105E INA106E INA110E INA111E INA114E INA115E INA117E INA118E INA120E INA131E
TABLE Content Macromodel Disk, Revision Listed Topology Level Directory. models bold.
OPA404E OPA445E OPA501E OPA502E OPA511E OPA512E OPA541E OPA602E OPA604E OPA606E OPA620E OPA621E OPA627E OPA637E OPA1013E OPA2107E OPA2111E OPA2131E OPA2541E OPA2604E OPA4131E UAF42E OPA603X OPA620X OPA621X OPA622X1 OPA622X2 OPA623X1 OPA623X2 OPA640X OPA641X OPA642X OPA643X OPA644X OPA27E OPA37E OPA77E OPA111E OPA121E OPA124E OPA128E OPA129E OPA131E OPA177E
OPA27 OPA37 OPA77 OPA111 OPA121 OPA124 OPA128 OPA129 OPA131 OPA177
OPA404 OPA445 OPA501 OPA502 OPA511 OPA512 OPA541 OPA602 OPA604 OPA606 OPA620 OPA621 OPA627 OPA637 OPA1013 OPA2107 OPA2111 OPA2131 OPA2541 OPA2604 OPA4131
OPT101 OPT201 OPT202 OPT209 OPT211
UAF42

Mailing Address: 11400 Tucson, 85734 Street Address: 6730 Tucson Blvd.

Top Searches for this datasheet

Other recent searches