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with Visual Software June 2000, ver. Introduction Alter
Top Searches for this datasheetSimulating a6402 Model with Visual Software June 2000, ver. Introduction Altera® intellectual property (IP) MegaCorefunctions developed pre-tested Altera, optimized specific Altera device architectures. test-drive these functions free OpenCorefeature downloading functions from Altera site installing them your UNIX workstation. help your evaluation, Altera also provides Visual simulation models these functions. Visual software from Innoveda lets create simulation models that used third-party VHDL Verilog simulation tools. Altera distributes Visual software user along with Visual models Altera functions. Altera's Visual models parameterizable, level, functional simulation models. models instantiate Altera your design simulate your choice simulation tool. This user guide describes install Visual simulation model Altera a6402 universal asynchronous receiver/transmitter (UART). Before using a6402 model, must download install Visual software, which available free from Altera MegaStore site Follow instructions Installing Visual Software User Guide. Altera recommends that also obtain a6402 Universal Asynchronous Receiver/Transmitter Data Sheet from Altera site. This data sheet describes technical specifications a6402 function. Altera Corporation A-UG-A6402VIS-01 Simulating a6402 Model with Visual Software a6402 Visual model contains following elements: Table a6402 Visual Model Elements Element a6402.* A6402_vectors.* A6402_top.* Description VHDL Verilog a6402 UART MegaCore function model file. VHDL Verilog test vectors. Top-level VHDL Verilog file that references a6402 function test vectors. Download Models have already done download Visual models from Altera's site http://www.altera.com following instructions below. Point your browser Search MegaStore function/model wish obtain. search results page, click name function/model wish obtain. Click Free Test Drive icon follow on-line instructions download function and/or model. Installation Execute a6402_vip_pc.exe file follow on-line instructions install model. following files installed: <installation path>\vip_simulation\A6402\ doc\ a6402_vipug.pdf verilog\ A6402.v A6402_vectors.v A6402_top.v vhdl\ mti\ A6402.vhd A6402_vectors.vhd A6402_top.vhd leapfrog\ A6402.vhd A6402_vectors.vhd A6402_top.vhd Altera Corporation Simulating a6402 Model with Visual Software vss\ A6402.vhd A6402_vectors.vhd A6402_top.vhd <installation path>\vip_models\a6402\* Before using Visual model, VIP_MODELS_DIR environment variable <installation path>/vip_models. installation process sets other required environment variables system registry. Altera Visual models VIP_MODELS_DIR environment variable. only wish Visual model, install model into directory variable point that directory. However, wish several models (e.g., both a6402 a8259 models) should install Visual models into same directory. Solaris Installation a6402 model tape archive file (.tar) that been compressed using gzip utility. extract files, move a6402_vip_solaris.tar.gz file location which would like install models type following commands UNIX prompt: gunzip a6402_vip_solaris.tar.gz a6402_vip_solaris.tar following directories files created: <installation path>/vip_simulation/A6402/ setup.csh doc/ a6402_vipug.pdf verilog/ A6402.v A6402_vectors.v A6402_top.v vhdl/ mti/ A6402.vhd A6402_vectors.vhd A6402_top.vhd leapfrog/ A6402.vhd A6402_vectors.vhd A6402_top.vhd vss/ A6402.vhd Altera Corporation Simulating a6402 Model with Visual Software A6402_vectors.vhd A6402_top.vhd <installation path>/vip_models/a6402/* Before using Visual models, performperform following steps: VIP_MODELS_DIR environment variable <installation path>/vip_models. Altera Visual models VIP_MODELS_DIR environment variable. only wish Visual model, install model into directory variable point that directory. However, wish several models (e.g., both a6402 a8259 models) should install Visual models into same directory. VIP_EU_ROOT environment variable root directory which installed Visual software. Source setup.csh file complete configuration Visual environment. Running Test Vectors This section describes test vectors provided with a6402 simulation model. Verilog using Verilog HDL, perform following steps: Visual interface described Installing Visual software User Guide. Make sure VIP_MODELS_DIR environment variable properly. Change <installation directory. Compile A6402.v A6402_vectors.v files. These modules attach appropriate Visual models using Verilog-XL interface. Compile A6402_top.v file. Simulate A6402_top. Altera Corporation Simulating a6402 Model with Visual Software VHDL using VHDL, perform following steps: Visual language interface described Installing Visual software User Guide. Make sure VIP_MODELS_DIR environment variable properly. Change directory <installation where <simulator> VHDL simulation tool using. Compile A6402.vhd A6402_vectors.vhd files into your work library. These components attach appropriate Visual models using language interface your VHDL simulator. Compile A6402_top.vhd file into your work library. Simulate work.A6402_top(struct). Using a6402 Model This section describes a6402 simulation model your designs. Verilog using Verilog HDL, perform following steps: Visual interface described Installing Visual software User Guide. Make sure VIP_MODELS_DIR environment variable properly. <installation directory Compile A6402. This module attachs appropriate Visual model using Verilog-XL interface. Instantiate A6402 your Verilog design. Altera Corporation Simulating a6402 Model with Visual Software VHDL using VHDL, perform following steps: Visual language interface described Installing Visual software User Guide. Make sure VIP_MODELS_DIR environment variable properly. the<installation directory, where <simulator> VHDL simulation tool using. Compile A6402.vhd into your work library. This component attaches appropriate Visual model using language interface your VHDL simulator. Instantiate work.A6402(behave) your VHDL design. Known Issues Visual models support checkpoint/restart. Therefore, must reload simulation model restart simulation. Innovation Drive Jose, 95134 (408) 544-7000 http://www.altera.com Applications Hotline: (800) 800-EPLD Customer Marketing: (408) 544-7104 Literature Services: lit_req@altera.com Altera, MegaCore, OpenCore trademarks and/or service marks Altera Corporation United States other countries. Altera acknowledges trademarks other organizations their respective products services mentioned this document. Altera products protected under numerous U.S. foreign patents pending applications, maskwork rights, copyrights. Altera warrants performance semiconductor products current specifications accordance with Altera's standard warranty, reserves right make changes products services time without notice. Altera assumes responsibility liability arising application information, product, service described herein except expressly agreed writing Altera Corporation. Altera customers advised obtain latest version device specifications before relying published information before placing orders products services. Copyright 2000 Altera Corporation. rights reserved. Printed Recycled Paper. Altera Corporation Other recent searchesIDT74LVC541A - IDT74LVC541A IDT74LVC541A Datasheet EL7900 - EL7900 EL7900 Datasheet FN7377 - FN7377 FN7377 Datasheet BUK755R2-40B - BUK755R2-40B BUK755R2-40B Datasheet BDY44 - BDY44 BDY44 Datasheet BAV99T - BAV99T BAV99T Datasheet 54ACT16652 - 54ACT16652 54ACT16652 Datasheet 74ACT16652 - 74ACT16652 74ACT16652 Datasheet 2SB1370 - 2SB1370 2SB1370 Datasheet
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