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Simulating the a6402 Model

with the Visual IP Software

Simulating the a6402 Model
with the Visual IP Software
User Guide
June 2000, ver. 1
Introduction
Altera Corporation
A-UG-A6402VIS-01
Simulating the a6402 Model with the Visual IP Software User Guide
The a6402 Visual IP model contains the following elements:
Table 1. a6402 Visual IP Model Elements
Element
Description
The VHDL or Verilog HDL a6402 UART MegaCore function model file. A set of VHDL or Verilog HDL test vectors. Top-level VHDL or Verilog HDL file that references the a6402 function and test vectors.
Download the Models
PC Installation
Altera Corporation
Simulating the a6402 Model with the Visual IP Software User Guide
Solaris Installation
Altera Corporation
Simulating the a6402 Model with the Visual IP Software User Guide
Running Test Vectors
This section describes how to use the test vectors provided with the a6402 simulation model.
Verilog HDL
Altera Corporation
Simulating the a6402 Model with the Visual IP Software User Guide
Using the a6402 Model
This section describes how to use the a6402 simulation model in your designs.
Verilog HDL
Altera Corporation
Simulating the a6402 Model with the Visual IP Software User Guide
Known Issues
Visual IP models do not support checkpoint / restart. Therefore, you must reload the simulation model to restart the simulation.
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Altera Corporation