Technical Note TN1019 Introduction When using ispMACH 4000 f

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

Technical Note TN1019 Introduction When using ispMACH 4000 f

Datasheet Thumbnail

Top Searches for this datasheet

Using ispMACH 4000 Devices Multiple JTAG Voltage Environments
Technical Note TN1019
Introduction
When using ispMACH 4000 families from Lattice Semiconductor, consideration must made standard associated with In-System Programmable (ISPTM) JTAG pins. 1.8V ispMACH 4000C device 1.8V LVCMOS JTAG pins; ispMACH 4000B 2.5V JTAG pins. When JTAG chain ispMACH 4000C ispMACH 4000B devices designed onto board, JTAG signals should driven volts respectively. result, several decisions must made including what voltage JTAG chain should driven ispMACH 4000B/C devices with other JTAG devices that operate 3.3V signaling levels. This technical note addresses design issues with multi-voltage JTAG chain that contains more ispMACH 4000B/C devices. other programming design guidelines, please In-System Programming Design Guidelines ispJTAGDevices available www.latticesemi.com.
JTAG Chain Design Recommendations
Many possible system architectures used support multiple JTAG voltages same board. Lattice recommends possible design approaches supporting multiple JTAG voltages.
Implement Separate JTAG Chains Each Voltage
example, 3.3V devices placed JTAG chain, 1.8V devices separate JTAG chain. This method reduces confusion when other vendors have interface with JTAG chain. Each chain JTAG LVCMOS standard supported devices helps reduce chance that other devices cannot interface LVCMOS standard, (i.e. 1.8V 3.3V). Figure 3.3V Programming Chain
3.3V
JTAG Port Interface
ispMACH 5000VG VCCJ
ispGDXV
3.3V JTAG Device
ispMACH
ispLSI® 2000VE
Figure 2.5V Programming Chain
2.5V
JTAG Port Interface
ispLSI 2000VL
ispMACH 5000VG VCCJ 2.5V
2.2V JTAG Device
ispMACH 4000B
www.latticesemi.com
tn1019_01
Lattice Semiconductor
Figure 1.8V Programming Chain
1.8V
Using ispMACH 4000 Devices Multiple JTAG Voltage Environments
JTAG Port Interface
ispMACH 4000C
ispMACH 5000VG VCCJ 1.8V
1.8V JTAG Device
ispMACH 4000C
Create Multi-Voltage JTAG Chain
many cases, JTAG devices exist single chain. When devices differing JTAG voltage mixed same chain, Lattice recommends following guidelines layout multi-voltage JTAG chain. highest voltage devices should placed first chain. next highest voltage placed next, down lowest voltage devices being last chain. Placing highest voltage lowest voltage JTAG signals order, output proceeding device will correctly interpreted logic high input next device when driven high. Verify that each device able tolerate maximum voltage from proceeding device. ispMACH 4000 devices tolerate maximum 3.6V JTAG inputs. Verify that interpreted device driven last chain. Lattice ispDOWNLOAD® cable version certain systems able correctly interpret from members ispMACH 4000 Family (Figure connected Lattice ispDOWNLOAD cable should higher than 3.6V interpret lowest JTAG voltage 1.8V. systems that cannot interpret ispMACH 4000 Family, voltage translator used translate 3.3V. possible device this situation 74LVC07A, available from Philips Texas Instruments (Figure Figure Multi-voltage JTAG Chain Using Lattice Version Cable Other Device That Interpret ispMACH 4000TDO
3.3V
JTAG Port Interface Using Version Cable
ispMACH
ispMACH 5000VG VCCJ 3.3V/ 2.5V
ispMACH 4000B
ispMACH 4000C
Lattice Semiconductor
Figure Multi-voltage JTAG Chain with Translator Chip
3.3V
Using ispMACH 4000 Devices Multiple JTAG Voltage Environments
JTAG Port Interface
ispMACH
ispMACH 4000B
ispMACH 4000C
74LVC07A
Technical Support Assistance
Hotline: 1-800-LATTICE (Domestic) 1-408-826-6002 (International) e-mail: techsupport@latticesemi.com

Technical Note TN1019 Introduction When using ispMACH 4000 f

Top Searches for this datasheet

Other recent searches