3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT TOLERANT BUS-HOLD Typical

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3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT TOLERANT BUS-HOLD Typical

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IDT74LVCH162245A 3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT
3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT TOLERANT BUS-HOLD
Typical tSK(0) (Output Skew) 250ps 2000V MIL-STD-883, Method 3015; 200V using machine model 200pF, 0.635mm pitch SSOP, 0.50mm pitch TSSOP 0.40mm pitch TVSOP packages Extended commercial range -40°C +85°C 3.3V ±0.3V, Normal Range 2.7V 3.6V, Extended Range CMOS power levels (0.4µ typ. static) inputs, outputs Volt tolerant Supports insertion
IDT74LVCH162245A
DESCRIPTION:
This 16-bit transceiver built using advanced dual metal CMOS technology. This high-speed, power transceiver ideal asynchronous communication between busses Direction Output Enable controls designed operate this device either independent 8-bit transceivers 16-bit transceiver. direction control (DIR) controls direction data flow. output enable (OE) overrides direction control disables both ports. inputs designed with hysteresis improved noise margin. pins driven from either 3.3V devices. This feature allows this device translator mixed 3.3V/5V supply system. LVCH162245A port) been designed with ±24mA output driver. This driver capable driving moderate heavy load while maintaining speed performance. LVCH162245 port) series resistors device output structure which will significantly reduce line noise when used with light loads. driver been designed drive ±12mA designated threshold levels. LVCH162245A "bus-hold" which retains inputs' last state whenever input goes high impedance. This prevents floating inputs eliminates need pull-up/down resistors.
Drive Features LVCH162245A: Balanced Output Drivers: port) High Output Drivers: port)
APPLICATIONS:
3.3V mixed voltage systems Data communication telecommunication systems
Functional Block Diagram
1999 Integrated Device Technology, Inc.
MARCH 1999
DSC-4597/-
IDT74LVCH162245A 3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT
CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Symbol VTERM(2) Description Terminal Voltage with Respect Terminal Voltage with Respect Storage Temperature Output Current Continuous Clamp Current, Continuous Current through each
Unit
Link
Max. +6.5 +6.5 +150 ±100
SO48-1 SO48-2 SO48-3
VTERM(3)
TSTG IOUT
NOTES: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. terminals. terminals except VCC.
CAPACITANCE +25oC, 1.0MHz)
Symbol COUT CI/O Parameter(1) Input Capacitance Output Capacitance Port Capacitance Conditions VOUT Typ. Max. Unit
Link
NOTE: applicable device type.
DESCRIPTION
Names xDIR Description Output Enable Inputs (Active LOW) Direction Control Inputs Side Inputs 3-State Outputs(1) Side Inputs 3-State Outputs(1)
NOTE: These pins have "Bus-hold". other pins standard inputs, outputs, I/Os.
SSOP/ TSSOP/ TVSOP VIEW
FUNCTION TABLE
Inputs xDIR
Outputs Data Data High State
NOTE: HIGH Voltage Level Voltage Level Don't Care High-Impedance
1998 Integrated Device Technology, Inc.
DSC-123456
IDT74LVCH162245A 3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: -40OC +85OC
Symbol IOZH IOZL IOFF ICCL ICCH ICCZ Parameter Input HIGH Voltage Level Input Voltage Level Input Leakage Current High Impedance Output Current (3-State Output pins) Input/Output Power Leakage Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current 5.5V 2.3V, 18mA 3.3V 3.6V 5.5V(2) Quiescent Power Supply Current Variation input 0.6V other inputs
Link
Test Conditions 2.3V 2.7V 2.7V 3.6V 2.3V 2.7V 2.7V 3.6V 3.6V 3.6V 5.5V 5.5V
Min.
Typ.(1)
Max.
Unit
NOTES: Typical values 3.3V, +25°C ambient. This applies disabled state only.
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
Link
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current
3.0V 2.3V 3.6V
Test Conditions 2.0V 0.8V 1.7V 0.7V 3.6V
Min.
Typ.(2)
Max.
Unit
NOTES: Pins with Bus-hold identified description. Typical values 3.3V, +25°C ambient.
IDT74LVCH162245A 3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT
OUTPUT DRIVE CHARACTERISTICS PORT)
Symbol Parameter Output HIGH Voltage Test Conditions(1) 2.3V 3.6V 0.1mA 2.7V 3.0V Output Voltage 2.3V 3.6V 2.3V 2.7V 3.0V 12mA 0.1mA 12mA Min. Max. 0.55 0.55
Link
Unit
2.3V
NOTE: must within min. max. range shown ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table appropriate range. 40°C +85°C.
OUTPUT DRIVE CHARACTERISTICS PORT)
Symbol Parameter Output HIGH Voltage Test Conditions(1) 2.3V 3.6V 0.1mA 12mA Min. 24mA 0.1mA 12mA 2.7V 3.0V 12mA 24mA Max. 0.55
Link
Unit
2.3V 2.3V 2.7V 3.0V 3.0V Output Voltage 2.3V 3.6V 2.3V
NOTE: must within min. max. range shown ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table appropriate range. 40°C +85°C.
IDT74LVCH162245A 3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT
OPERATING CHARACTERISTICS, 3.3V 0.3V, 25°C
Symbol Parameter Power Dissipation Capacitance Transceiver Outputs enabled Power Dissipation Capacitance Transceiver Outputs disabled Test Conditions 0pF, 10Mhz Typical Unit
SWITCHING CHARACTERISTICS, PORT)
2.7V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(o) Parameter Propagation Delay Output Enable Time Output Disable Time Output Skew(2) Min. Max. 3.3V±0.3V Min. Max. Unit
SWITCHING CHARACTERISTICS, PORT)
2.7V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(o) Parameter Propagation Delay Output Enable Time Output Disable Time Output Skew(2) Min. Max. 3.3V±0.3V Min. Max. Unit
NOTES: test circuits waveforms. 40°C 85°C. Skew between outputs same package switching same direction.
IDT74LVCH162245A 3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT
TEST CIRCUITS WAVEFORMS TEST CONDITIONS PROPAGATION DELAY
Symbol VLOAD VCC(1)= 3.3V ±0.3V VCC(1) 2.7V VCC(2)= 2.5V ±0.2V Unit
Link
SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION
Link
TEST CIRCUITS OUTPUTS
Pulse Generator D.U.T. LOAD Open
ENABLE DISABLE TIMES
ENABLE CONTROL INPUT OUTPUT ITCH NORMALLY tPZH OUTPUT ITCH NORMALLY OPEN HIGH LOAD/2 tPHZ DISABLE LOAD/2
Link
Link DEFINITIONS: Load capacitance: includes probe capacitance. Termination resistance: should equal ZOUT Pulse Generator.
NOTE: Pulse Generator Pulses: Rate 10MHz; 2.5ns; 2.5ns. Pulse Generator Pulses: Rate 10MHz; 2ns; 2ns.
NOTE: Diagram shown input Control Enable-LOW input Control Disable-HIGH.
SET-UP, HOLD, RELEASE TIMES
DATA INPUT INPUT ASYNCHRONOUS CONTROL SYNCHRONOUS CONTROL
Link
SWITCH POSITION
Test Open Drain Disable Enable Disable High Enable High Other tests Switch VLOAD
Open
Link
OUTPUT SKEW
INPUT tPLH1 PHL1
PULSE WIDTH
-HIGH-LOW PULSE HIGH-LOW -HIGH PULSE
Link
OUTPUT
OUTPUT PLH2 tPHL2
tPLH2 tPLH1 tPHL2
NOTES: tSK(o) OUTPUT1 OUTPUT2 outputs. tSK(b) OUTPUT1 OUTPUT2 same bank.
Link
IDT74LVCH162245A 3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT
ORDERING INFORMATION
Bus-Hold XXXX Device Type Package ange
245A
Shrink Outline Package (SO48-1) Thin Shrink Outline Package (SO48-2) Thin Very Small Outline Package (SO48-3) 16-Bit Transceiver
Double-Density esistors, ±24m Port) ±12m Port)
Bus-hold -40°C +85°C
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3.3V CMOS 16-BIT TRANSCEIVER WITH VOLT TOLERANT BUS-HOLD Typical

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