3.3V CMOS 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS VOLT TOLERANT

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3.3V CMOS 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS VOLT TOLERANT

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IDT74LVC827A 3.3V CMOS 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
3.3V CMOS 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS VOLT TOLERANT
MICRON CMOS Technology 2000V MIL-STD-883, Method 3015; 200V using machine model 200pF, 1.27mm pitch SOIC, 0.65mm pitch SSOP, 0.635mm pitch QSOP, 0.65mm pitch TSSOP packages Extended commercial range 40°C +85°C 3.3V ±0.3V, Normal Range 2.3V 3.6V, Extended Range CMOS power levels (0.4µ typ. static) Rail-to-Rail output swing increased noise margin inputs, outputs Volt tolerant Supports insertion
IDT74LVC827A
DESCRIPTION:
This 10-bit buffer/driver built using advanced CMOS technology. LVC827A device provides high-performance interface wide data paths buses carrying parity. 3-state control gate 2-input gate with active-low inputs that either output-enable (OE1 OE2) input high, outputs high-impedance state. LVC827A provides true data outputs. LVC827A been designed with ±24mA output driver. This driver capable driving moderate heavy load while maintaining speed performance. Inputs driven from either 3.3V devices. This feature allows this device translator mixed 3.3V/5V system environment.
Drive Features LVC827A: High Output Drivers: ±24mA Reduced system switching noise
APPLICATIONS:
3.3V mixed voltage systems Data communication telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
1999 Integrated Device Technology, Inc.
OCTOBER 1999
DSC-4647/-
IDT74LVC827A 3.3V CMOS 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Symbol VTERM(2) Description Terminal Voltage with Respect Terminal Voltage with Respect Storage Temperature Output Current Continuous Clamp Current, Continuous Current through each
Unit
8LVC
Max. +6.5 +6.5 +150 ±100
24-2 24-7 24-8 24-9
VTERM(3) TSTG IOUT
NOTES: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. terminals. terminals except VCC.
CAPACITANCE +25°C, 1.0MHZ)
Symbol COUT CI/O Parameter(1) Input Capacitance Output Capacitance Port Capacitance Conditions VOUT Typ. Max. Unit
8LVC Link
SOIC/ SSOP/ QSOP/ TSSOP VIEW
NOTE: applicable device type.
DESCRIPTION
Names Description When both outputs enabled. When either both HIGH outputs High 10-bit data inputs 10-bit data outputs
FUNCTION TABLE (each buffer)
Inputs Outputs 3-State Function Transparent
NOTE: HIGH Voltage Level Voltage Level Don't Care High-Impedance
IDT74LVC827A 3.3V CMOS 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: 40°C +85°C
Symbol IOZH IOZL IOFF ICCL ICCH ICCZ Parameter Input HIGH Voltage Level Input Voltage Level Input Leakage Current High Impedance Output Current (3-State Output pins) Input/Output Power Leakage Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current 5.5V 2.3V, 18mA 3.3V 3.6V 5.5V(2) Quiescent Power Supply Current Variation input 0.6V, other inputs
8LVC Link
Test Conditions 2.3V 2.7V 2.7V 3.6V 2.3V 2.7V 2.7V 3.6V 3.6V 3.6V 5.5V 5.5V
Min.
Typ.(1)
Max.
Unit
NOTES: Typical values 3.3V, +25°C ambient. This applies disabled state only.
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Output HIGH Voltage Test Conditions(1) 2.3V 3.6V 0.1mA 12mA Min. 24mA 0.1mA 12mA 2.7V 3.0V 12mA 24mA Max. 0.55
8LVC Link
Unit
2.3V 2.3V 2.7V 3.0V 3.0V Output Voltage 2.3V 3.6V 2.3V
NOTE: must within min. max. range shown ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table appropriate range. 40°C +85°C.
IDT74LVC827A 3.3V CMOS 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
OPERATING CHARACTERISTICS, 3.3V 0.3V, 25°C
Symbol Parameter Power dissipation capacitance buffer/driver Outputs enabled Power dissipation capacitance buffer/driver Outputs disabled Test Conditions 0pF, 10Mhz Typical Unit
SWITCHING CHARACTERISTICS
Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(0) Parameter Propagation Delay Output Enable Time Output Disable Time Output Skew(2) Min.
2.7V Min. Max. 3.3V±0.3V Min. Max. Unit
2.5V±0.2V Max.
NOTES: test circuits waveforms. 40°C 85°C. Skew between outputs same package switching same direction.
IDT74LVC827A 3.3V CMOS 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
TEST CONDITIONS
Symbol VLOAD VCC(1)= 3.3V ±0.3V
TEST CIRCUITS WAVEFORMS PROPAGATION DELAY
VCC(2)= 2.5V ±0.2V Unit
8LVC Link
VCC(1) 2.7V
SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL
Link
TEST CIRCUITS OUTPUTS
Pulse Generator
LOAD Open
ENABLE DISABLE TIMES
ENABLE CONTROL INPUT tPZL OUTPUT SWITCH NORMALLY CLOSED OUTPUT SWITCH NORMALLY OPEN HIGH LOAD/2 tPHZ tPLZ DISABLE LOAD/2 OH-V
Link
D.U.T.
Link
DEFINITIONS: Load capacitance: includes probe capacitance. Termination resistance: should equal ZOUT Pulse Generator. NOTES: Pulse Generator Pulses: Rate 10MHz; 2.5ns; 2.5ns. Pulse Generator Pulses: Rate 10MHz; 2ns; 2ns.
NOTE: Diagram shown input Control Enable-LOW input Control Disable-HIGH.
SWITCH POSITION
Test Open Drain Disable Enable Disable High Enable High Other tests Switch VLOAD
SET-UP, HOLD, RELEASE TIMES
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL tREM
Link
Open
8LVC Link
OUTPUT SKEW
INPUT tPLH1 tPHL1
SYNCHRONOUS CONTROL
PULSE WIDTH
LOW-HIGH-LOW PULSE HIGH-LOW-HIGH PULSE
Link
OUTPUT
OUTPUT tPLH2 tPHL2
tPLH2 tPLH1 tPHL2 tPHL1
NOTES: tSK(o) OUTPUT1 OUTPUT2 outputs. tSK(b) OUTPUT1 OUTPUT2 same bank. Link
IDT74LVC827A 3.3V CMOS 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
ORDERING INFORMATION
Bus-Hold XXXX Temp. Range Device Type Package
827A
utline (gull wing) 24-2) Shrink utline Package 24-7) uarter utline ackage 24-8) Thin Shrink utline Package 24-9) 10-Bit Buffer/Driver with 3-State utputs, ±24mA
Blank
Bus-hold -40°C +85°C
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3.3V CMOS 10-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS VOLT TOLERANT

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