3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS BUS-HOLD

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3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS BUS-HOLD

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IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER 3-STATE OUTPUTS
3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS BUS-HOLD
MICRON CMOS Technology Typical tSK(0) (Output Skew) 250ps 2000V MIL-STD-883, Method 3015; 200V using machine model 200pF, 0.40mm pitch TVSOP package Extended commercial range 40°C +85°C 3.3V 0.3V, Normal Range 2.7V 3.6V, Extended Range 2.5V 0.2V CMOS power levels (0.4µ typ. static) Rail-to-Rail output swing increased noise margin
IDT74ALVCHS162830
DESCRIPTION:
This 1-bit 2-bit address driver built using advanced dual metal CMOS technology. Diodes have been added inputs clamp overshoot. ALVCHS162830 series resistors device output structure which will significantly reduce line noise when used with light loads. This driver been designed drive ±12mA designated threshold levels. ALVCHS162830 "bus-hold" which retains inputs' last state whenever input goes high impedance. This prevents floating inputs eliminates need pull-up/down resistors.
Drive Features ALVCHS162830: Balanced Output Drivers: ±12mA switching noise
APPLICATIONS:
SDRAM Modules Motherboards Workstations
FUNCTIONAL BLOCK DIAGRAM
OTHER CHANNELS
1999 Integrated Device Technology, Inc.
OCTOBER 1999
DSC-4718/-
IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER 3-STATE OUTPUTS
CONFIGURATION
ABSOLUTE MAXIMUM RATING
Unit
NEW16link
80-1
Symbol VTERM(2) VTERM(3) TSTG IOUT
Description Terminal Voltage with Respect Terminal Voltage with Respect Storage Temperature Output Current Continuous Clamp Current, Continuous Clamp Current, Continuous Current through each
Max. ±100
NOTES: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. terminals. terminals except VCC.
CAPACITANCE +25oC, 1.0MHz)
Symbol COUT CI/O Parameter(1) Input Capacitance Output Capacitance Port Capacitance Conditions VOUT Typ. Max. Unit
NEW16link
NOTE: applicable device type.
FUNCTION TABLE(1)
Inputs
Outputs
TVSOP VIEW
DESCRIPTION
Names Description 3-State Output Enable Inputs (Active LOW) Data Inputs(1) 3-State Outputs
NOTE: HIGH Voltage Level Voltage Level Don't Care High-Impedance
NOTE: These pins have "Bus-Hold." other pins standard inputs, outputs, I/Os.
IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER 3-STATE OUTPUTS
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: 40°C +85°C
Symbol IOZH IOZL ICCL ICCH ICCZ Parameter Input HIGH Voltage Level Input Voltage Level Input HIGH Current Input Current High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current 2.3V, 18mA 3.3V 3.6V input 0.6V, other inputs Test Conditions 2.3V 2.7V 2.7V 3.6V 2.3V 2.7V 2.7V 3.6V 3.6V 3.6V 3.6V Min. Typ.(1) Max. Unit
Quiescent Power Supply Current Variation
NEW16link
NOTE: Typical values 3.3V, +25°C ambient.
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
NOTES: Pins with Bus-hold identified description. Typical values 3.3V, +25°C ambient.
NEW16link
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current
3.0V 2.3V 3.6V
Test Conditions 2.0V 0.8V 1.7V 0.7V 3.6V
Min.
Typ.(2)
Max.
Unit
IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER 3-STATE OUTPUTS
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Output HIGH Voltage Test Conditions(1) 2.3V 3.6V 0.1mA 2.7V 3.0V Output Voltage 2.3V 3.6V 2.3V 2.7V 3.0V 12mA 0.1mA 12mA Min. Max. 0.55 0.55
NEW16link
Unit
2.3V
NOTE: must within min. max. range shown ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table appropriate range. 40°C 85°C.
OPERATING CHARACTERISTICS, 25oC
2.5V 0.2V Symbol Parameter Power Dissipation Capacitance driver Outputs enabled Power Dissipation Capacitance driver Outputs disabled Test Conditions 0pF, 10Mhz Typical 3.3V 0.3V Typical Unit
SWITCHING CHARACTERISTICS
2.5V 0.2V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(o) Parameter Propagation Delay Output Enable Time Output Disable Time Output Skew(2) Min. Max. 2.7V Min. Max. 3.3V 0.3V Min. Max. Unit
NOTES: test circuits waveforms. 40°C 85°C. Skew between outputs same package switching same direction.
IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER 3-STATE OUTPUTS
TEST CIRCUITS WAVEFORMS TEST CONDITIONS PROPAGATION DELAY
Symbol VLOAD VCC(1)= 3.3V±0.3V VCC(1)= 2.7V VCC(2)= 2.5V±0.2V Unit
NEW16link
PHAS INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION
ALVC Link
TEST CIRCUITS OUTPUTS
Pulse Generator
ENABLE DISABLE TIMES
ENABLE CONTROL INPUT tPZL OUTPUT ITCH NORM ALLY CLOSE tPZH OUTPUT ITCH NORM ALLY OPEN HIGH LOAD tPLZ DISABLE LOAD
LOAD Open
D.U.T.
ALVC Link DEFINITIONS: Load capacitance: includes probe capacitance. Termination resistance: should equal ZOUT Pulse Generator. NOTES: Pulse Generator Pulses: Rate 10MHz; 2.5ns; 2.5ns. Pulse Generator Pulses: Rate 10MHz; 2ns; 2ns.
ALVC Link NOTE: Diagram shown input Control Enable-LOW input Control Disable-HIGH.
SET-UP, HOLD, RELEASE TIMES
DATA INPUT
Link
SWITCH POSITION
Test Open Drain Disable Enable Disable High Enable High Other tests Switch VLOAD
TIMING INPUT ASYNCHRONOUS CONTROL SYNCHRONOUS CONTROL
NEW16link
Open
OUTPUT SKEW INPUT
tPLH1
PULSE WIDTH
-HIGH-LOW PULSE HIGH-LOW -HIGH PULSE
Link
OUTPUT
OUTPUT tPLH2
PLH2
Link
NOTES: tSK(o) OUTPUT1 OUTPUT2 outputs. tSK(b) OUTPUT1 OUTPUT2 same bank.
IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER 3-STATE OUTPUTS
ORDERING INFORMATION
Device Type Package Range Bus-Hold
Thin Very Outline Package (SO80-1)
S162
1-Bit Address river with 3-State Outputs Double-Density with Resistors Clam ±12m Bus-Hold -40°C +85°C
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3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS BUS-HOLD

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