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ORSO / ORT82G5

Lattice Semiconductor Corp.

ORSO / ORT82G5
Lattice Semiconductor Corp.
Schematic page 3 A 7-pin serial connector used for configuration.
Serial Connector Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 JP6
Schematic page 3
GND NC PROGRMN DONE D0 CCLK VDD
JP6 is an 8-pin JTAG connector. It is physically similar to JP4 an arrow indicates pin 1.
JTAG Connector Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8
Header Connections
Standard 0.100 headers are provided for interconnecting points on the board. This can be accomplished with 0.100 IDC connectors and ribbon cable for bus connections or 0.025 pin socket patch cords(such as Pomona Electronics #5948 www.pomonelectronics.com).
D17 & D18
Schematic page 3 These LEDs indicate the status of configuration to the FPGA. When D17 is illuminated this indicates the successful completion of configuration. When D18 illuminates this indicates that the programming was aborted or reinitialized.
ORSO / ORT82G5
Lattice Semiconductor Corp.
JP1 & JP2
Schematic page 2 This is a standard header. Pin one is at the bottom left. Pin numbers increment from left to right. The even pins on this header correspond to general I / O pins. The odd pins are connected to ground .
Schematic page 2 This is a standard header (utilizing the even pins only) as described above. This header connects to 16LEDs. When a jumper cable is used, output from the ORSO / ORT82G5 can drive these LEDs to display a pattern from JP1 and JP2.
Schematic pages 4 This is a 3 by 1 header that provids differential input / output from the ORSO / ORT82G5 primary clock spines. The first pin connects to the true side of the pair. Ground is connected to the middle column. The third pin is connected to the complement side of the pair.
J39, 40, 41
Schematic page 6 These 96-pin headers fit with the 860 bus to communicate to a Windriver (www.windriver.com) MPC860 development board.
Schematic page 5 This jumper selects the data 0 bit between the 860 bus communications and the 7-pin serial connector (J1). Jumping pins 2 and 3 selects the serial communication. Jumping pins 1 and 2 selects the 860 bus.
J52 and J53
Schematic page 4 These SMA connectors provide differential input to the PLL clocks.
PLL clocks J52 J53 JP36
Schematic page 4
This 2x2 header allows connection of ac coupling for J52 and J53. Adding a jumper between pins 1 and 2 or pins 3 and 4 removes the ac coupling capacitor.
ORSO / ORT82G5
Lattice Semiconductor Corp.
PB1, PB2, PB3
Schematic page 3 These push button switches assert / de-assert the logic levels on the FPGA PRGMN, PRESET, and the SERDES reset. Depressing the button drives a logic level "0" to the device.
Schematic page 3 The 1x2 header enables the de-bounce IC for push-buttons PB1, 2, & 3. Connecting a jumper enables the circuitry.
Schematic page 3 This 1x3 header is connects PB3 to the SERDES reset or can connect the reset pin to GND.
JP12, JP13, JP14, JP15, JP16
Schematic page 5 These are 2X10 reference voltage headers are used to connect the specified voltage reference pins used by the FPGA IO pins.
JP19, 20, 21, 22, 23
Schematic page 8 These jumpers select the input for the VddI / O voltage. Jumper connections are as follows. 1 3 5 2 4 6 1.5V 2.5V 3.3V
Schematic page 3 This 2x4 header is used to drive the correct levels to the device Mode pins. When left without jumpers to the even (2, 4, 6, 8) pins the device is driven to "1". No jumpers is "1111" for slave serial programming mode.
Schematic page 9 This banana jack is connected to the ground plane of the board.
ORSO / ORT82G5
Lattice Semiconductor Corp.
JP25, 30, 28, 26, 31
Schematic page 9 These 3-pin headers select the source of the SERDES power supplies. When a jumper is placed between Pin 1 and 2 the source of the supply comes from the on-board power supply. When the jumper is between P2 and 3 this selects the source from the adjacent banana jacks to be connected to an external supply.
JP24, 27, 29
Schematic page 9 These 3-pin headers select the source of the device (3.3V, 2.5V, and 1.5V) power supplies. When no jumpers are used the source of the supply comes from the on-board power supply. When the jumper is between P1 and 2 this selects the source from the adjacent banana jacks to be connected to an external supply.
Schematic page 9 This banana jack connects to 5VDC supply.
JP17, 18
Schematic page 5 These headers are the chip select controls. The default is selected when no jumpers are present.
Schematic page 4 This connector interconnects test points for the SERDES for characterization only. It is not populated for general use. This connector type is an Amp Z-Pack 2mm header. A cable similar to one from W. L. Gore (http://www.wlgore.com / ) P / N 2MMA3193-01 adapts the 2mm Z-Pack to individual SMA connectors and is useful to observe signals or connect to other test devices.
ORSO / ORT82G5
Lattice Semiconductor Corp.
Schematic page 4 This connector interconnects test points for the SERDES for characterization only. It is not populated for general use. This connector type is an Amp Z-Pack 2mm header. A cable similar to one from W. L. Gore (http://www.wlgore.com / ) P / N 2MMA3192-01 adapts the 2mm Z-Pack to individual SMA connectors and is useful to observe signals or connect to other test devices. JP11
Pin A1 Pin A2 Pin A3 Pin A4 Pin A5 GND LDIO2 GND LDIO6 GND Pin B1 Pin B2 Pin B3 Pin B4 Pin B5 LDIO0 GND LDIO4 GND LDIO8 Pin C1 Pin C2 Pin C3 Pin C4 Pin C5 GND GND GND GND GND Pin D1 Pin D2 Pin D3 Pin D4 Pin D5 LDIO1 GND LDIO5 GND LDIO9 Pin E1 Pin E2 Pin E3 Pin E4 Pin E5 GND LDIO3 GND LDIO7 GND
Schematic page 4 This test point is used to observe the CV (code violation) signal from the SERDES.
SERDES Reference Clocks
SERDES Channels
ORSO / ORT82G5
Lattice Semiconductor Corp.
JP33 & JP34
Schematic page 3 JP33 and JP34 are unpopulated connections for the SERDES channel A.
ORSO / ORT82G5
Lattice Semiconductor Corp.
SERDESB1
SerDesB GP I / O
HSPEED I / O
VSS CONN
ORSO / ORT82G5
VDDIO CTRL
VDD1.5 VDD3.3
PWR INPUT
5V Input
MODE CTRL
VDDIB VDDOB VDDRX VDDTX
SerDesA
SERIAL PROG
HSPEED I / O
Title
ORSO / ORT82G5
Size B Date: Document Number Block Diagra December 19, 2002 Sheet 1 of 9 Rev
PB21B PB21A PB20D PB20A PB20B PB19B PB19A PB18D PB18B PB18A PB17D PB17C PB17B PB17A PT14B PT14D PT15B PT15A PT15C PT15D PT16B PT16A PT16C PT17A PT17B PT18A PT18B PT19B PT19A PT19D PT20A PT20B AM21 AM22 AN21 AK17 AL18 AM18 AM19 AK16 AP21 AP20 AN19 AN18 AK15 AL16 D14 A16 E15 E14 B16 A17 C17 D16 B18 A19 A20 D18 D17 C18 C19 B22 E16 E17 AL19 AK18 AP24 AN23 AP25 AP26 AK20 AL21 AN24 AM23 AN26 AN25 AK21 AM24 AL23 AP27 AL24 AM25 AP28 AP29 AN29 AM27 AM26 AK22 AK23 AL25 PT20C PT20D PT21A PT21B PT21C PT21D PT22A PT22B PT22C PT22D PT23B PT23C PT23D PT24B PT24D PT25B PT25C PT25D PT26B PT26D PT27A PT27B PT27C PT28A PT28B PT28C PT28D PT29A PT29B A23 B23 A24 A25 C20 C21 E18 E19 D19 D20 B24 C23 C22 C24 A27 B27 B25 B26 A28 D22 E20 E21 C25 D23 D24 D25 D26 E22 E23
HEADER 20X2
AP30PB30C AP31PB30D AK24PB31B AM28PB31D AN30PB32B AK25PB32C AL26 PB32D AL27 PB33C AN31PB34B AK26PB34D AM30PB35B AK27PB36B AL30 PB36C AK29PB36D B30 PT36D C30 PT36B D30 PT35D E29 PT35B D29 PT34B B29 PT33D E27 PT32D E26 PT32C A30 PT32B A29 PT31D E24 PT31A B28 PT30D C28 PT30C D28 PT30A C27 PT29D D27 PT29C
PB22A PB22B PB22C PB22D PB23A PB23B PB24A PB24B PB24C PB24D PB25A PB25B PB25C PB26A PB26B PB26C PB27A PB27B PB27C PB27D PB28B PB28C PB29B PB29C PB29D PB30B
HEADER 20X2
JP3 HEADER 16X2
GP0 GP1 GP2 GP3 GP4 GP5 GP6 GP7 GP8 GP9 GP10 GP11 GP12 GP13 GP14 GP15
GP0:15 1 GP10 1 GP11 1 GP12 1 GP13 1 GP14 1 GP15 1 GP8 1 GP9
R10 680 2
R11 680 2
R12 680 2
R13 680 2
R14 680 2
R15 680 2 D16 LED
R16 680
D2 LED
D3 LED
D4 LED
D5 LED
D6 LED
D7 LED
D8 LED
D9 LED
D10 LED
D11 LED
D12 LED
D13 LED
D14 LED
D15 LED
Title
ORSO / ORT82G5
4.75K JP33 1 3 5 7 9 11 13 15 2 4 6 8 10 12 14 16 R18 4.75K R19 4.75K R20 4.75K
C1 .1ufd
AE1 T3 D5
F31 F30 D32 E30 D31 C32 B32 A33 B31 A32
R21 4.75K
K33 K34 L33 L34 M33 M34 N33 N34 P33 P34 JP34 R33 R34 T33 T34
UA2G ORSO / ORT82G5
C2 .1ufd
G30 PRESERVE03 F33 PRESERVE02 G31 PRESERVE01
AD5 AC5 AM4 AM6
A14 A13 C13 C12
JP7 1 2 HEADER 2
UHD 8X2
J14 SMA J13 1 2 SMA
HEADER 4X2
D17 LED
D18 LED
R41 DONE 4.75K Q1 2N2222 / INIT
Title
ORSO / ORT82G5
Size B Date: Document Number SerDesA / Program Ctrl December 19, 2002 Sheet 3 of 9 Rev
J21 CON1 1 JP35 1 2 3 HEADER 3 SMA J24 2 1 SMA J25 2 1 AH32 B19 B20
C178 .01ufd R14750 JP36 1 3 2 4 SMA 1 1 2 J52 SMA
REFCLKP SMA J22 2 1 1 2 J23 SMA REFCLKN
HEADER 2X2 C179 R148 .01ufd 50
J53 2 R42 50 R43 50
J26 1 CON1
A22 A21
PTCK0T PTCK0C
PTCK1C PTCK1T
AF30 AF31 AE31 AE30 AJ33 AH30 AH31 AJ34 AK34 AJ31 AP32 AP33 AN32 AM31 AL31 AM33 AK30 AL32 AJ30 AK33 AM3 R45 R46 R47 R48 R49 R50 R51 R52 R53 R54 R55 R56 R57 R58 R59 R60 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XCK CV BYTSYNC WDSYNC RBC1 RBC0 E4 A4 D3 B3 E2 A2 D1 B1
AC33 AC34 SMA 1 2 AB33 AB34 AA33 AA34 Y33 Y34 SMA W33 W34 1 2
JP11 LDIO9 LDIO8 LDIO7 LDIO6 LDIO5 LDIO4 LDIO3 LDIO2 LDIO1 LDIO0 D5 B5 E4 A4 D3 B3 E2 A2 D1 B1 9 8 7 6 5 4 3 2 1 0 HEADER 5X5
AK19PBCK1C AL20 PBCK1T
AM20PBCK0C AN20PBCK0T
PLCK0C PLCK0T
W5 PLCK1T Y5 PLCK1C
PTEMP
SMA J35 2 1 SMA J36 2 1 AMP 5X4 Z-Pack Conn.
4. Place series resistors as close to device as possible. 5. Place Refclk resistors as close to device as possible. 6. Place REXT resistor as close to device pins as possible. AMP 5X5 Z-Pack Conn.
ORSO / ORT82G5
Document Number Serdes Channel B I / O December 19, 2002 Sheet 4 of 9 Rev
HEADER 5X2
HEADER 6X2 E11 E9 D8 B8 J1 J5 H5 D1 AF3 AE5 AF5 AG4 AH3 AL2 AP7 AL8 AL9 AN8 AM8 AL10 AM10 AM11 AP10 AL12 AK12 AP13 AP14 AP15 AL14 AM15 AN16 AP19 AL17 AP22 AN22 AL22 AN27 AN28 AM29 AL28 AL29 C26 D21 A26 B21 A18 A15 E28 C29 E25 AE2 AD2 AB2 W3 T2 R3 L2 H1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31
HEADER 5X2
B14 B12 A11 D9 A6 B5 B1 F3 F2 K3 AG3 AH2 AM1 AH4 AL6 AP6 AK10 AN10 AP12 AM14 AP18 G2 H3
VREF / MICROBUS
HEADER 5X2
HEADER 4X2
AF2 AG1 AA5 AB5 AF1 AB3 AB4 AC1 W4 V3 V2 P2 P3 P4 M4 N5 J2 E1 A8 B9 A9 E13
C16 A12 C15 E12
1 2 HEADER 2
Title
ORSO / ORT82G5
J39 CON96
Size B Document Number MPI Connector Interface December 19, 2002 Sheet Title Date: B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32
R104 R105 R106 R107 R108 R109 R110 R111 R112 R113 R114 R115 R116 R117 R118 R119 R120 R121
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32
ORSO / ORT82G5
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 6
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32
R68 1K R70 1K R72 1K R74 1K R76 1K R78 1K R80 1K R82 1K R84 1K R86 1K R88 1K R90 1K R91 1K R92 1K R93 1K R94 1K R95 1K R96 1K R97 1K R98 1K R99 1K R100 1K R101 1K R102 1K R103 1K R122 1K R123 1K R124 1K R125 1K R126 1K R127 1K R128 1K
V19 W16 W17 W18 W19 Y13 Y14 Y15 Y20 Y21 Y22 AH33 AD31 AC31 AA31 W31 T31 P31 M31 L31 G33
V34 V33 V32 U34 U33 U32 N32 M32 J32 H34 H33 H32 H31 H30 AG34 AG33 AG32 AG31 AG30 AF32 AC32 AB32
VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27 VSS26 VSS25 V18 V17 V16 U19 U18 U17 U16 T19 T18 T17 T16 R22 R21 R20 R15 R14 R13 P22 P21 P20 P15 P14 P13 N22
A1 VSS1 A34 VSS2 AA13VSS3 AA14VSS4 AA15VSS5 AA20VSS6 AA21VSS7 AA22VSS8 AB13VSS9 AB14VSS10 AB15VSS11 AB20VSS12 AB21VSS13 AB22VSS14 AN33VSS15 AP34VSS16 B2 VSS17 B33 VSS18 E34 VSS19 N13 VSS20 N14 VSS21 N15 VSS22 N20 VSS23 N21 VSS24
Title
ORSO / ORT82G5
Size B Date: Document Number VSS / GND Connections December 19, 2002 Sheet 7 of 9 Rev
C3 .1ufd C4 .01ufd C5 .1ufd C6 .01ufd
C7 .1ufd C8 .01ufd C9 .1ufd C10 .01ufd C11 .1ufd C12 .01ufd C13 .1ufd
C14 .01ufd C15 .1ufd C16 .01ufd C17 .1ufd C18 .01ufd C19 .1ufd C20 .01ufd
C29 .01ufd C30 .1ufd C31 .01ufd C32 .1ufd C33 .01ufd C34 .1ufd C35 .01ufd C36 .1ufd C37 .01ufd C38 .1ufd C39 .01ufd C40 .1ufd C41 .01ufd C42 .1ufd C43 .01ufd C44 .1ufd C45 .01ufd C46 .1ufd C47 .01ufd C48 .1ufd
C23 .1ufd
C24 .01ufd
C25 .1ufd
C26 .01ufd
C27 .1ufd
C28 .01ufd
C49 .1ufd AL34 AM34 AN34 B34 C33 C34 D33 D34 E32 E33 F32 F34 N16 N17 N18 N19 P16 P17 P18 P19 R16 R17 R18 R19 T13 T14 T15 T20 T21 T22 U13 U14 U15 U20 U21 U22 V13 V14 V15 V20
C50 .01ufd
C51 .1ufd
C52 .01ufd
C53 .1ufd
C54 .01ufd
.1ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
C68 .01ufd
C69 .1ufd
C70 .01ufd
C71 .1ufd
C72 .01ufd
AL33 AK32 AJ32 AB19 AB18 AB17 AB16 AA19 AA18 AA17 AA16 C3 AL4 AK5 AK28 AK31 E31 C31 A31 E5 AM32 R32 P32 AD32 AE32 K32 L32 AA32 Y32
C62 .01ufd
C63 .1ufd
C64 .01ufd
C65 .1ufd
C66 .01ufd
1.5V CORE LOGIC
C73 .1ufd
C74 .01ufd
C75 .1ufd
C76 .01ufd
C77 .1ufd
C78 .01ufd
C80 .01ufd
C81 .1ufd
C82 .01ufd
C83 .1ufd
C84 .01ufd
.1ufd
VDD3.3
C85 .1ufd
C86 .01ufd
C87 .1ufd
C88 .01ufd
C89 .1ufd
C90 .01ufd
VDDIO BANK TL
C91 .1ufd
C92 .01ufd
C93 .1ufd
C94 .01ufd
C95 .1ufd
C96 .01ufd
VDDIO BANK TC
HEADER 3X2 JP20
C97 .1ufd
C98 .01ufd
C99 .1ufd
C100 .01ufd
C101 .1ufd
AL11 AL13 AL15 AN13 AN15 AN17 G34 AH34
C103 .01ufd
C104 .1ufd
AP2 AP1 AN7 AN3 AN2 AM9 AM5 AL7
W2 U3 R2 N3 AC2 AA3
.1ufd
C110 .01ufd
C111 .1ufd
C112 .01ufd
C113 .1ufd
C114 .01ufd
C115 .1ufd
C116 .01ufd
ORSO / ORT82G5
Document Number ORSO / ORT8G25 PWR Connections December 19, 2002 Sheet 8 of 9 Rev
HEADER 3X2
U2 TAB OUT SENSE R130 124 C150 .1ufd R132 30 6
JP24 1 2 3 HEADER 3
VPWR VCTRL ADJ
U3 5 3 3 1 C148 22ufd C149 .1ufd 4 J43 +5v NO NC GND Relay5v 2 COM 1
F1 1 FUSE
C146 10ufd
C147 .1ufd
Banana F2 FUSE
Banana J44 F3 2 JP27 1 2 3 FUSE Banana 1
JP26 1 2 3 HEADER 3
5 C154 10ufd C155 .1ufd 2 ADJ AMS1503 R134 124 VCTRL C161 .1ufd R135 124 SENSE 1 U4 C159 22ufd C160 .1ufd J46 3 4 4 VPWR VCTRL TAB OUT 6 3 5
HEADER 3 U5 +5v NO NC GND Relay5v 2 COM 1 FUSE F4
Banana
JP31 1 2 3 HEADER 3 F8 1 Banana FUSE 2
0 ohm (0603)
C169 .1uF
C170 10uF
AMS1503 R139 75 VCTRL
Title
ORSO / ORT82G5
Size B Date: Document Number Power Supply Inputs December 19, 2002 Sheet 9 of 9 Rev