Rev. 1/7/03 Lattice Semiconductor Corp. Schematic page 7-pin
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ORSO/ORT82G5
Rev. 1/7/03
Lattice Semiconductor Corp.
Schematic page 7-pin serial connector used configuration.
Serial Connector
Schematic page
PROGRMN DONE CCLK
8-pin JTAG connector. physically similar JP4; arrow indicates
JTAG Connector
Header Connections
INIT_N RD_CFG_N
Standard 0.100 headers provided interconnecting points board. This accomplished with 0.100 connectors ribbon cable connections 0.025 socket patch cords(such Pomona Electronics #5948 www.pomonelectronics.com).
Schematic page These LEDs indicate status configuration FPGA. When illuminated this indicates successful completion configuration. When illuminates this indicates that programming aborted reinitialized.
ORSO/ORT82G5
Rev. 1/7/03
Lattice Semiconductor Corp.
Schematic page This standard header. bottom left. numbers increment from left right. even pins this header correspond general pins. pins connected ground
Schematic page This standard header (utilizing even pins only) described above. This header connects 16LEDs. When jumper cable used, output from ORSO/ORT82G5 drive these LEDs display pattern from JP2.
JP35
Schematic pages This header that provids differential input/output from ORSO/ORT82G5 primary clock spines. first connects true side pair. Ground connected middle column. third connected complement side pair.
J39,
Schematic page These 96-pin headers with communicate Windriver (www.windriver.com) MPC860 development board.
JP32
Schematic page This jumper selects data between communications 7-pin serial connector (J1). Jumping pins selects serial communication. Jumping pins selects bus.
Schematic page These connectors provide differential input clocks.
clocks JP36
Schematic page
PLL_CLK0C PLL_CLK0T
This header allows connection coupling J53. Adding jumper between pins pins removes coupling capacitor.
ORSO/ORT82G5
Rev. 1/7/03
Lattice Semiconductor Corp.
PB1, PB2,
Schematic page These push button switches assert/de-assert logic levels FPGA PRGMN, PRESET, SERDES reset. Depressing button drives logic level device.
Schematic page header enables de-bounce push-buttons PB1, Connecting jumper enables circuitry.
Schematic page This header connects SERDES reset connect reset GND.
JP12, JP13, JP14, JP15, JP16
Schematic page These 2X10 reference voltage headers used connect specified voltage reference pins used FPGA pins.
JP19, 22,23
Schematic page These jumpers select input VddI/O voltage. Jumper connections follows. 1.5V 2.5V 3.3V
Schematic page This header used drive correct levels device Mode pins. When left without jumpers even (2,4,6,8) pins device driven "1". jumpers "1111" slave serial programming mode.
Schematic page This banana jack connected ground plane board.
ORSO/ORT82G5
Rev. 1/7/03
Lattice Semiconductor Corp.
JP25,
Schematic page These 3-pin headers select source SERDES power supplies. When jumper placed between source supply comes from on-board power supply. When jumper between this selects source from adjacent banana jacks connected external supply.
JP24,
Schematic page These 3-pin headers select source device (3.3V, 2.5V, 1.5V) power supplies. When jumpers used source supply comes from on-board power supply. When jumper between this selects source from adjacent banana jacks connected external supply.
Schematic page This banana jack connects 5VDC supply.
Schematic page ten-pin header additional dedicated signals from ORSO/ORT82G5. column header (pins 2,4,6, etc) connected ground. LVDS_R RCLK DOUT
JP17,
Schematic page These headers chip select controls. default selected when jumpers present.
JP10
Schematic page This connector interconnects test points SERDES characterization only. populated general use. This connector type Z-Pack header. cable similar from Gore (http://www.wlgore.com/) 2MMA3193-01 adapts Z-Pack individual connectors useful observe signals connect other test devices.
ORSO/ORT82G5
Rev. 1/7/03
Lattice Semiconductor Corp.
JP10
WD_SYNC RBC0 RBC1 BYTE_SYNC
JP11
Schematic page This connector interconnects test points SERDES characterization only. populated general use. This connector type Z-Pack header. cable similar from Gore (http://www.wlgore.com/) 2MMA3192-01 adapts Z-Pack individual connectors useful observe signals connect other test devices. JP11
LDIO2 LDIO6 LDIO0 LDIO4 LDIO8 LDIO1 LDIO5 LDIO9 LDIO3 LDIO7
Schematic page This test point used observe (code violation) signal from SERDES.
SERDES Reference Clocks
Schematic page These connectors connect reference clock pins SERDES. These pins receive direct differential reference clock REFCLKA_N REFCLKB_N REFCLKA_P REFCLKB_P
SERDES Channels
Schematic page These connectors connect SERDES channels Quad SERDES. These pins receive direct differential data. INN_BA INP_BA INN_BB INP_BB INN_BC INP_BC INN_BD INP_BD OUTN_BA OUTP_BA OUTN_BB OUTP_BB OUTN_BC OUTP_BC OUTN_BD OUTP_BD
ORSO/ORT82G5
Rev. 1/7/03
Lattice Semiconductor Corp.
JP33 JP34
Schematic page JP33 JP34 unpopulated connections SERDES channel
ORSO/ORT82G5
Rev. 1/7/03
Lattice Semiconductor Corp.
CHAR
MPI_BUS1 MPI_D[1:31] MPI_TSZ0 MPI_A[0:17] MPI_TSZ1 MPI_BDIP/ MPI_BURST/ MPI_TEA/ MPI_RTRY/ 860_D0 MPI_ACK/ MPI_CLK MPI_INT 860_D0 MPI_BUS/VREFS
MPI_A[0:17] MPI_D[1:31] MPI_TSZ0 MPI_TSZ1 MPI_BDIP/ MPI_BURST/ MPI_TEA/ MPI_RTRY/ MPI_ACK/ MPI_CLK 860_D0 GP_I/O1
MPI_TSZ0 MPI_TSZ1 MPI_BDIP/ MPI_BURST/ MPI_TEA/ MPI_RTRY/ MPI_ACK/ MPI_CLK 860_D0
MPI_CONNECTORS1 MPI_D[1:31] MPI_A[0:17]
SERDESB1
MPI_Connectors
860_D0 MPI_DP3 MPI_DP2 MPI_DP1 MPI_DP0 MPI_IRQ/ MPI_STRB/ MPI_RW
SerDesB
HS_IN_CHannelB
HSPEED
MPI_INTR VSS1 GP_I/O
CONN
ORSO/ORT82G5
ORT_GND BYPASS1
VDDIO CTRL
ORT_PWR
VDD1.5 VDD3.3
INPUT
Input
MODE CTRL
HS_IN_CHANNELA1 MPI_DP3 MPI_DP2 MPI_DP1 MPI_DP0 MPI_RW MPI_STRB/ MPI_IRQ/ HS_IN_CHannelA\JTAG 860_D0 MPI_DP3 MPI_DP2 MPI_DP1 MPI_DP0 MPI_RW MPI_STRB/ MPI_IRQ/
VDDIB VDDOB VDDRX VDDTX
SerDesA
SERIAL PROG
HSPEED
JTAG
Title
ORSO/ORT82G5
Size Date: Document Number Block Diagra December 2002 Sheet
PB21B PB21A PB20D PB20A PB20B PB19B PB19A PB18D PB18B PB18A PB17D PB17C PB17B PB17A PT14B PT14D PT15B PT15A PT15C PT15D PT16B PT16A PT16C PT17A PT17B PT18A PT18B PT19B PT19A PT19D PT20A PT20B AM21 AM22 AN21 AK17 AL18 AM18 AM19 AK16 AP21 AP20 AN19 AN18 AK15 AL16 AL19 AK18 AP24 AN23 AP25 AP26 AK20 AL21 AN24 AM23 AN26 AN25 AK21 AM24 AL23 AP27 AL24 AM25 AP28 AP29 AN29 AM27 AM26 AK22 AK23 AL25 PT20C PT20D PT21A PT21B PT21C PT21D PT22A PT22B PT22C PT22D PT23B PT23C PT23D PT24B PT24D PT25B PT25C PT25D PT26B PT26D PT27A PT27B PT27C PT28A PT28B PT28C PT28D PT29A PT29B
HEADER 20X2
AP30PB30C AP31PB30D AK24PB31B AM28PB31D AN30PB32B AK25PB32C AL26 PB32D AL27 PB33C AN31PB34B AK26PB34D AM30PB35B AK27PB36B AL30 PB36C AK29PB36D PT36D PT36B PT35D PT35B PT34B PT33D PT32D PT32C PT32B PT31D PT31A PT30D PT30C PT30A PT29D PT29C
PB22A PB22B PB22C PB22D PB23A PB23B PB24A PB24B PB24C PB24D PB25A PB25B PB25C PB26A PB26B PB26C PB27A PB27B PB27C PB27D PB28B PB28C PB29B PB29C PB29D PB30B
UA1B ORSO/ORT82G5_8 VDDIO_BC BANK
CELL
VDDIO_TC BANK
HEADER 20X2
HEADER 16X2
GP10 GP11 GP12 GP13 GP14 GP15
GP[0:15] GP10 GP11 GP12 GP13 GP14 GP15
Title
ORSO/ORT82G5
Size Date: Document Number GP_I/O Headers LEDS December 2002 Sheet
VDD_3.3 RESETN
VDD_3.3
MPI_RW MPI_STRB/ MPI_IRQ/
4.75K JP33 4.75K 4.75K 4.75K
.1ufd
VDD_3.3 HEADER
PSYS_RSSIG_ALL PSYS_DOBISTN PBIST_TEST_ENN PLOOP_TEST_ENN PASB_PDN PMP_TESTCLK PASB_RESETN PASB_TRISTN PMP_TESTCLK_ENN PASB_TESTCLK
HDINN_AA HDINP_AA HDOUTN_AA HDOUTP_AA HDINN_AB HDINP_AB HDOUTN_AB HDOUTP_AB HDINN_AC HDINP_AC HDOUTN_AC HDOUTP_AC HDINN_AD HDINP_AD REFCLKN_A REFCLKP_A
/WR/MPI_RW /RD/MPI_STRB_N PCFG_MPI_IRQ
DONE PCCLK PDONE /PPRGRM /PRESET PRGM RESET 4.75K 4.75K 4.75K 4.75K 4.75K LVDS_R RDY/BUSY/RCLK DOUT /LDC
VDD_3.3
4.75K
JP34
UA2G ORSO/ORT82G5
SERDES_A/CTRL
HEADER /INIT PRD_CFG_N VDD_3.3 4.75K 4.75K 4.75K 4.75K VDD_3.3 PRGM RESET 3.32K HEADER RESETN OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 MAX6818 /INIT
HEADER
VDD_3.3 4.75K
.1ufd
REXTN_A REXT_A
HDOUTN_AD HDOUTP_AD
ATMOUT_A
PRESERVE03 PRESERVE02 PRESERVE01
HEADER
PROG PRESET SRESET
HEADER
MPI_DP3 MPI_DP2 MPI_DP1 MPI_DP0
VDD_3.3
DONE 4.75K 2N2222 /INIT
Title
ORSO/ORT82G5
Size Date: Document Number SerDesA/Program Ctrl December 2002 Sheet
CON1 JP35 HEADER AH32
C178 .01ufd R14750 JP36
REFCLKP REFCLKN
HEADER C179 R148 .01ufd
CON1
PLL_CK1C/PPLL PLL_CK1T/PPLL
AF33 AF34 AE33 AE34 AD33 AD34 HDINN_BA HDINP_BA HDOUTN_BA HDOUTP_BA HDINN_BB HDINP_BB HDOUTN_BB HDOUTP_BB HDINN_BC HDINP_BC HDOUTN_BC HDOUTP_BC HDINN_BD HDINP_BD HDOUTN_BD HDOUTP_BD
PLL_CK0C/HPPLL PLL_CK0T/HPPLL
ATMOUT_B
PTCK0T PTCK0C
PTCK1C PTCK1T
3.32K
REXT_B REXTN_B REFCLKP_B REFCLKN_B PSCHAR_XCK PSCHAR_CV PSCHAR_BYTSYNC PSCHAR_WDSYNC PSCHAR_RBC1 PSCHAR_RBC0/TBC PSCHAR_LDIO9 PSCHAR_LDIO8 PSCHAR_LDIO7 PSCHAR_LDIO6 PSCHAR_LDIO5 PSCHAR_LDIO4 PSCHAR_LDIO3 PSCHAR_LDIO2 PSCHAR_LDIO1 PSCHAR_LDIO0
AF30 AF31 AE31 AE30 AJ33 AH30 AH31 AJ34 AK34 AJ31 AP32 AP33 AN32 AM31 AL31 AM33 AK30 AL32 AJ30 AK33 BYTSYNC WDSYNC RBC1 RBC0
JP10 HEADER
AC33 AC34 AB33 AB34 AA33 AA34
UA3A ORSO/ORT82G5_3
SERDES_B/CLOCKS
JP11 LDIO9 LDIO8 LDIO7 LDIO6 LDIO5 LDIO4 LDIO3 LDIO2 LDIO1 LDIO0 HEADER
PLL_CK6C PLL_CK6T
AK19PBCK1C AL20 PBCK1T
AM20PBCK0C AN20PBCK0T
PLCK0C PLCK0T
PLCK1T PLCK1C
PLL_CK7T PLL_CK7C
PTEMP
signal traces characteristic impedance Hand Route, minimize via's and, match trace lengths following signal groups: 1.All differential pairs HDINP,HDINN REFCLKN_B, REFCLKP_B Layer differential pairs HDOUTP,HDOUTN Layer Match trace length LDIO[0:9], RBC[0:1], WDSYNC, XCK, BYTSYNC Bottom layer
Z-Pack Conn.
Place series resistors close device possible. Place Refclk resistors close device possible. Place REXT resistor close device pins possible. Z-Pack Conn.
Title Signal Size Date:
ORSO/ORT82G5
Document Number Serdes Channel December 2002 Sheet
MPI_D[1:31] 860_D[1:31] JP32 860_D0 HEADER JP12
JP13
860_D1 860_D2 860_D3 860_D4 860_D5 860_D6 860_D7 860_D8 860_D9 860_D10 860_D11 860_D12 860_D13 860_D14 860_D15 860_D16 860_D17 860_D18 860_D19 860_D20 860_D21 860_D22 860_D23 860_D24 860_D25 860_D26 860_D27 860_D28 860_D29 860_D30 860_D31
JP14
HEADER
HEADER AL10 AM10 AM11 AP10 AL12 AK12 AP13 AP14 AP15 AL14 AM15 AN16 AP19 AL17 AP22 AN22 AL22 AN27 AN28 AM29 AL28 AL29
HEADER
JP15
VREF_BC_01 VREF_BC_02 VREF_BC_03 VREF_BC_04 VREF_BC_05 VREF_BC_06 VREF_BC_07 VREF_BC_08 VREF_BC_09 VREF_TC_01 VREF_TC_02 VREF_TC_03 VREF_TC_04 VREF_TC_05 VREF_TC_06 VREF_TC_07 VREF_TC_08 VREF_TC_09 VREF_CL_08 VREF_CL_07 VREF_CL_06 VREF_CL_05 VREF_CL_04 VREF_CL_03 VREF_CL_02 VREF_CL_01
UA4D ORSO/ORT82G5_6
VREF_TL_01 VREF_TL_02 VREF_TL_03 VREF_TL_04 VREF_TL_05 VREF_TL_06 VREF_TL_07 VREF_TL_08 VREF_TL_09 VREF_TL_10 VREF_BL_01 VREF_BL_02 VREF_BL_03 VREF_BL_04 VREF_BL_05 VREF_BL_06 VREF_BL_07 VREF_BL_08 VREF_BL_09 VREF_BL_10 VREF_BL_11 MPI_RTRY_N MPI_TEA_N MPI_ACK_N MPI_CLK /CS0
AK10 AN10 AP12 AM14 AP18
VREF/MICROBUS
HEADER
JP16
A18/MPI_TSZ0 A19/MPI_TSZ1 A20/MPI_BDIP_N A21/MPI_BURST_N
HEADER
VDD_3.3 4.75K
JP17 HEADER VDD_3.3 JP18
MPI_A0 MPI_A1 MPI_A2 MPI_A3 MPI_A4 MPI_A5 MPI_A6 MPI_A7 MPI_A8 MPI_A9 MPI_A10 MPI_A11 MPI_A12 MPI_A13 MPI_A14 MPI_A15 MPI_A16 MPI_A17
MPI_A[0:17] MPI_A[0:17]
4.75K MPI_TSZ0 MPI_TSZ1 MPI_BDIP/ MPI_BURST/ MPI_RTRY/ MPI_TEA/ MPI_ACK/ MPI_CLK
HEADER
Title
ORSO/ORT82G5
Size Date: Document Number MPI_BUS/VREFS December 2002 Sheet
860_D0 MPI_TSZ1 MPI_TSZ0 MPI_RW MPI_BURST/ MPI_BDIP/ MPI_STRB/ MPI_ACK/ MPI_TEA/ MPI_CLK MPI_DP0 MPI_DP1 MPI_DP2 MPI_DP3 MPI_RTRY/ MPI_IRQ/ MPI_D[1:31] MPI_A[0:17]
860_D[1:31] MPI_A[0:17] MPI_TSZ1 MPI_TSZ0 MPI_RW MPI_BURST/ MPI_BDIP/ MPI_STRB/ MPI_ACK/ MPI_TEA/ MPI_CLK MPI_DP0 MPI_DP1 MPI_DP2 MPI_DP3 MPI_RTRY/ MPI_IRQ/ CON96 CON96
CON96
Size Document Number Connector Interface December 2002 Sheet Title Date:
R104 R105 R106 R107 R108 R109 R110 R111 R112 R113 R114 R115 R116 R117 R118 R119 R120 R121
MPI_A17 MPI_A16 MPI_A15 MPI_A14 MPI_A13 MPI_A12 MPI_A11 MPI_A10 MPI_A9 MPI_A8 MPI_A7 MPI_A6 MPI_A5 MPI_A4 MPI_A3 MPI_A2 MPI_A1 MPI_A0
MPI_A17 MPI_A16 MPI_A15 MPI_A14 MPI_A13 MPI_A12 MPI_A11 MPI_A10 MPI_A9 MPI_A8 MPI_A7 MPI_A6 MPI_A5 MPI_A4 MPI_A3 MPI_A2 MPI_A1 MPI_A0
VDD_3.3
VDD_3.3
ORSO/ORT82G5
860_D31 860_D30 860_D29 860_D28 860_D27 860_D26 860_D25 860_D24 860_D23 860_D22 860_D21 860_D20 860_D19 860_D18 860_D17 860_D16 860_D15 860_D14 860_D13 860_D12 860_D11 860_D10 860_D9 860_D8 860_D7 860_D6 860_D5 860_D4 860_D3 860_D2 860_D1 860_D0
R100 R101 R102 R103 R122 R123 R124 R125 R126 R127 R128
VDD_3.3
VSSIB_AB VSSOB_AB VSSTX_AB VSSIB_AC VSSOB_AC VSSTX_AC VSSIB_AD VSSOB_AD VSSTX_AD VSSTX_BD VSSOB_BD VSSIB_BD VSSTX_BC VSSOB_BC VSSIB_BC VSSTX_BB VSSOB_BB VSSIB_BB VSSTX_BA VSSOB_BA VSSIB_BA VSSAUX_B
AH33 AD31 AC31 AA31
AG34 AG33 AG32 AG31 AG30 AF32 AC32 AB32
VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS27 VSS26 VSS25
VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSSGB_B VSSRX_BA VSSRX_BB VSSRX_BC VSSRX_BD VSSRX_AD VSSRX_AC VSSRX_AB VSSRX_AA VSSGB_A
UA5E ORSO/ORT82G5_4
VSS1 VSS2 AA13VSS3 AA14VSS4 AA15VSS5 AA20VSS6 AA21VSS7 AA22VSS8 AB13VSS9 AB14VSS10 AB15VSS11 AB20VSS12 AB21VSS13 AB22VSS14 AN33VSS15 AP34VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24
Title
ORSO/ORT82G5
Size Date: Document Number VSS/GND Connections December 2002 Sheet
.1ufd .01ufd .1ufd .01ufd
.1ufd .01ufd .1ufd .01ufd .1ufd .01ufd .1ufd
.01ufd .1ufd .01ufd .1ufd .01ufd .1ufd .01ufd
VDD_1.5 .1ufd .01ufd
.01ufd .1ufd .01ufd .1ufd .01ufd .1ufd .01ufd .1ufd .01ufd .1ufd .01ufd .1ufd .01ufd .1ufd .01ufd .1ufd .01ufd .1ufd .01ufd .1ufd
.1ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
.1ufd AL34 AM34 AN34
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
VDD_3.3 .1ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
AL33 AK32 AJ32 AB19 AB18 AB17 AB16 AA19 AA18 AA17 AA16 AK28 AK31 AM32 AD32 AE32 AA32
VDD15_12 VDD15_13 VDD15_14 VDD15_15 VDD15_16 VDD15_17 VDD15_18 VDD15_19 VDD15_20 VDD15_21 VDD15_22 VDD15_23 VDD15_24 VDD15_25 VDD15_26 VDD15_27 VDD15_28 VDD15_29 VDD15_30 VDD15_31 VDD15_33 VDD15_34 VDD15_35 VDD15_36 VDD15_37 VDD15_38 VDD15_39 VDD15_40 VDD15_41 VDD15_42 VDD15_43 VDD15_44 VDD15_45 VDD15_46 VDD15_47 VDD15_48 VDD15_49 VDD15_50 VDD15_51 VDD15_52
VDD15_11 VDD15_10 VDD15_9 VDD15_8 VDD15_7 VDD15_6 VDD15_5 VDD15_4 VDD15_3 VDD15_2 VDD15_1 VDD33_1 VDD33_2 VDD33_3 VDD33_4 VDD33_5 VDD33_6 VDD33_7 VDD33_8 VDD33_9 VDD33_10 VDDRX_AA_2 VDDRX_AA_1 VDDRX_BA_1 VDDRX_BA_2 VDDTX_BA VDDTX_AA VDDAUX_B VDDAUX_A
VDD15_53 VDD15_54 VDD15_55 VDD15_56 VDD15_57 VDD15_58 VDD15_59 VDD15_60 VDD15_61 VDD15_62 VDD15_63 VDD15_64 VDDIO0_TL1 VDDIO0_TL2 VDDIO0_TL3 VDDIO0_TL4 VDDIO0_TL5 VDDIO0_TL6 VDDIO1_TC1 VDDIO1_TC2 VDDIO1_TC3 VDDIO1_TC4 VDDIO1_TC5 VDDIO1_TC6 VDDIO5_BC1 VDDIO5_BC2 VDDIO5_BC3 VDDIO5_BC4 VDDIO5_BC5 VDDIO5_BC6 VDDGB_A VDDGB_B .1ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
1.5V CORE LOGIC
.1ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
VDD_3.3 VDD_X
.1ufd
VDD3.3
UA5F ORSO/ORT82G5_4
.1ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
VDDIO BANK
JP19 VDD_1.5 VDD_2.5 VDD_3.3 VDD_1.5
.1ufd
.01ufd
.1ufd
.01ufd
.1ufd
.01ufd
VDDIO BANK
VDDRX/TX VDDIO BANK VDDIO BANK VDDOB_BD_1 VDDOB_BD_0 VDDIB_BD VDDOB_BC_1 VDDOB_BC_0 AA30VDDIB_BC VDDIO6_BL8 VDDIO6_BL7 VDDIO6_BL6 VDDIO6_BL5 VDDIO6_BL4 VDDIO6_BL3 VDDIO6_BL2 VDDIO6_BL1 HIGH SPEED VDDOB_AD_1 VDDOB_AD_0 VDDIB_AD VDDOB_AC_1 VDDOB_AC_0 VDDIB_AC
HEADER JP20
.1ufd
.01ufd
.1ufd
C100 .01ufd
C101 .1ufd
C102 VDD_1.5 .01ufd C105 .1ufd C106 .01ufd
VDDIO7_CL6 VDDIO7_CL5 VDDIO7_CL4 VDDIO7_CL3 VDDIO7_CL2 VDDIO7_CL1
AL11 AL13 AL15 AN13 AN15 AN17 AH34
C103 .01ufd
C104 .1ufd
VDD_1.5 VDD_2.5 VDD_3.3
AB31VDDOB_BB AB30VDDIB_BB
AC30VDDOB_BA AD30VDDIB_BA
VDDOB_AB VDDIB_AB
VDDOB_AA VDDIB_AA
JP22 VDD_1.5 VDD_2.5 VDD_3.3 C117 .1ufd C118 .01ufd C119 .1ufd C120 .01ufd C121 .1ufd HEADER
HEADER JP21 C107 C108 .01ufd VDD_1.5 VDD_1.5 VDD_2.5 VDD_3.3
VDDIB_A
.1ufd
HEADER VDDIB_B
C109 C122 .01ufd VDDOB_B VDDOB_A .1ufd
C110 .01ufd
C111 .1ufd
C112 .01ufd
C113 .1ufd
C114 .01ufd
C115 .1ufd
C116 .01ufd
JP23 VDD_1.5 VDD_2.5 VDD_3.3 C123 .1ufd C124 .01ufd C125 .1ufd C126 .01ufd C127 .1ufd C128 .01ufd C129 .1ufd C130 C131 .01ufd .1ufd C132 .01ufd C133 .1ufd C134 .01ufd C135 .1ufd C136 .01ufd C137 .1ufd C138 .01ufd C139 .1ufd C140 .01ufd C141 .1ufd C142 .01ufd Size Date: Title
ORSO/ORT82G5
Document Number ORSO/ORT8G25 Connections December 2002 Sheet
HEADER
VDD_5v AMS1505
SENSE R130 C150 .1ufd R132
JP24 HEADER
VDD_1.5 R129 (0603) JP25 C143 .1uF
VDDIB_A C144 10uF C145
VPWR VCTRL
C148 22ufd C149 .1ufd Relay5v
FUSE
C146 10ufd
C147 .1ufd
HEADER
R131 C151 .1uF C152 10uF VDDIB_B C153 (0603)
Banana FUSE
Banana JP27 FUSE Banana
JP26 HEADER
VDD_5v
C154 10ufd C155 .1ufd AMS1503 R134 VCTRL C161 .1ufd R135 SENSE C159 22ufd C160 .1ufd VPWR VCTRL
HEADER Relay5v FUSE
R133 VDD_2.5 JP28 FUSE Banana R136 R137 FUSE Banana JP30 HEADER C162 .1uF C163 10uF VDDOB_B C164 (0603) HEADER C156 .1uF C157 10uF VDDOB_A C158 (0603)
VDD_5v
Banana
JP29 C165 10ufd C166 .1ufd SENSE C167 22ufd C172 .1ufd R140 Banana FUSE Banana R143 (1205) C176 10ufd C177 .1ufd C175 R146 2N2222 R144 Banana 2N3906 VCTRL C173 .1uF C174 10uF VDD_5v VDD_1.5 R142 4.75K R145 C168 .1ufd VPWR VCTRL HEADER Relay5v R141 FUSE VDD_3.3
JP31 HEADER Banana FUSE
(0603)
C169 .1uF
C170 10uF
AMS1503 R139 VCTRL
R138 VDD_X C171
Title
ORSO/ORT82G5
Size Date: Document Number Power Supply Inputs December 2002 Sheet
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