DUAL 2-INPUT NAND GATE HIGH SPEED: (TYP.) POWER DISSIPATION: (MAX
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74V2G00
DUAL 2-INPUT NAND GATE
HIGH SPEED: (TYP.) POWER DISSIPATION: (MAX.) HIGH NOISE IMMUNITY: VNIH VNIL (MIN.) POWER DOWN PROTECTION INPUTS OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: (OPR) 5.5V IMPROVED LATCH-UP IMMUNITY
SOT23-8L
ORDER CODES PACKAGE SOT23-8L 74V2G00STR
DESCRIPTION 74V2G00 advanced high-speed CMOS DUAL 2-INPUT NAND GATE fabricated with sub-micron silicon gate double-layer metal
wiring C2MOS technology. internal circuit composed stages including buffer output, which provide high noise immunity stable output. Power down protection provided inputs outputs accepted inputs with regard supply voltage. This device used interface
CONNECTION LOGIC SYMBOLS
June 2000
74V2G00
INPUT EQUIVALENT CIRCUIT DESCRIPTION
SYMBOL NAME FUNCT Data Input Data Input Data Output Ground (0V) Positive Supply Voltage
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS
Symbol Tstg Supply Voltage Input Voltage Output Voltage (see note Output Voltage (see note Input Diode Current Output Diode Current Output Current Storage Temperature Lead Temperature sec) Parameter Value -0.5 +7.0 -0.5 +7.0 -0.5 +7.0 -0.5 +150 Unit
IGND Ground Current
Absolute Maximum Ratings those values beyond which damage device occur. Functional operation under these condition implied. High State
RECOMMENDED OPERATING CONDITIONS
Symbol dt/dv Supply Voltage Input Voltage Output Voltage (see note Output Voltage (see note Operating Temperature Input Rise Fall Time (see note (VCC 0.3V) 0.5V) Parameter Valu Unit
ns/V ns/V
High State from to70%of
74V2G00
SPECIFICATIONS
Symb Parameter Cond ition High Level Input Voltage Level Input Voltage High Level Output Voltage Level Output Voltage IOPD Input Leakage Current Quiescent Supply Current Output Leakage Current =-50 IO=-50 IO=-50 IO=-4 IO=-8 O=50 IO=50 IO=50 IO=4 IO=8 5.5V VOUT 5.5V 2.58 3.94 0.36 0.36 ±0.1 Min. 0.7VCC 0.3VCC 2.48 0.44 0.44 ±1.0 Value Max. 0.7VCC 0.3VCC Max.
ELECTRICAL CHARACTERISTICS (Input
Symb Parameter tPLH tPHL Propagation Delay Time Test ndition Value Min. Max. 11.4 Max. 13.0
3.3(*) 3.3(*) 5.0(**) 5.0(**)
Voltage range 3.3V 0.3V (**) Voltage range 0.5V
CAPACITIVE CHARACTERISTICS
Symb Parameter Cond ition
Value Min. Max. Max.
Input Capacitance Power Dissipation Capacitance (note
isdefined value IC'sinternal equivalent capacitance which calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current obtained following equation. ICC(opr) ICC/2
74V2G00
TEST CIRCUIT
15/50 equivalent (includes probe capacitance) ZOUT pulse generator (typically
WAVEFORM: PROPAGATION DELAYS (f=1MHz; duty cycle)
74V2G00
SOT23-8L MECHANICAL DATA
MIN. 0.90 0.00 0.90 0.22 0.09 2.80 2.60 1.50 0.35 0.65 1.95 TYP. MAX. 1.45 0.15 1.30 0.38 0.20 3.00 3.00 1.75 0.55 MIN. 35.4 35.4 110.2 102.3 59.0 13.8 25.6 76.7 mils TYP. MAX. 57.1 51.2 14.9 118.1 118.1 68.8 21.6
DIM.
74V2G00
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