THIS ISSUE First Single-Chip Gain Phase Measurement RF/IF Mo

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THIS ISSUE First Single-Chip Gain Phase Measurement RF/IF Mo

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THIS ISSUE
First Single-Chip Gain Phase Measurement RF/IF
Modulator
Push Performance Levels with Latest Variable Gain Amplifiers (VGA) Practice Precision with Detection Power Control Obstacles Simplify Multicarrier Receiver Design with Direct Sampling Techniques Linking Data Converters with VersaCOMM. Single Chip Direct-Conversion Radios with Othello One. World's Lowest Phase Noise Synthesizer Gets Faster Overcome Challenges Cellular Systems
INSID move toward higher capacity telephony data wireless networks seen adoption more complex modulation schemes. Analog Device's RF/IF modulators provide with guaranteed, production-tested specifications that include output power, leakage, sideband suppression, thus helping meet most demanding design budgets.
FREE OFFER
Additionally, AD8345 been tested support higher order modulation more popular cellular bands CDMA MHz, W-CDMA MHz, MHz, enabling part used modulator direct upconversion modulator. AD8345 performance exceeds that commercially available modulators, providing exceptional output signal range coupled with leakage sideband rejection.
noise floor
dBm/Hz
simplified interface TxDAC®s buffered output stage
Discover Unique Single-Band Upconversion Architecture Lowest-Power 10-Lead SOIC
Part Number Frequency Range
output power output
single supply with power down
Amplitude Balance
Phase Balance
Supply Current
Package
AD8345 AD8346
0.5°
16-Lead TSSOP 16-Lead TSSOP
page details upconversion utilizing TxDACs quadrature modulators.
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Loud Clear: Analog Announces First Single-Chip Gain Phase Measurement RF/IF
nalog designers have long been searching better perform independent gain phase measurements between input signals. Such design required discrete, multichip approach with number external components. least until now.
AD8302 simultaneously measure both gain/loss phase between input signals GHz. AD8302 integrates single chip wideband logarithmic detectors that closely matched, thus minimizing error sources associated temperature drift. gain loss measurement extends over dynamic range phase measurement range attainable 180° range. With ability measure amplitude phase within single AD8302 built into systems accurately diagnose purity signal and/or monitor/calibrate system level performance. AD8302 been tested specified operation over common cellular frequencies MHz, 1.86 GHz, specified emerging MMDS application. addition, AD8302 provides exceptional accuracy lower frequencies.
APPLICATIONS
RF/IF linearization precise power control remote system monitoring diagnostics return loss/VSWR measurements ratio function signals
measures gain/loss phase from frequencies input range system
measurement/controller/level comparator modes stable reference voltage offsetting output video bandwidth response time single supplies small 14-Lead TSSOP package
accurate gain measurement scaling mV/dB) accuracy typically <0.5 accurate phase measurement scaling mV/deg) accuracy typically degree
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Best Performance Variable Gain Amplifiers (VGA)
modern communications systems employ circuitry constantly adjust input signals maximum dynamic range through loop. Analog Devices pushed performance envelope with latest variable gain amplifier-the AD8367. Like predecessors, AD8367 employs proprietary circuit consisting variable attenuator network with Gaussian interpolator that steers currents final amplifier stage, giving user true linear-in-dB gain response.
Unique AD8367 integrated on-chip, square detector that enables user implement single chip solution. mode square detector effectively provides constant output receive signal strength indicator (RSSI) output. Alternatively, AD8367 used traditional VGA.
gain control range
42.5
flat response ideal receiver applications draws only power down
gain control voltage provides mV/dB output scaling linearity OIP3 (100 noise figure gain
Other Available Variable Gain Amplifiers
Part Number Channels Single Dual Bandwidth (MHz) Gain Range (dB) Gain Accuracy (dB) Supply Package
AD8367 AD603 AD604 AD605
42.5
±0.5 ±0.5 ±0.3 ±0.2
14-Lead TSSOP 8-Lead SOIC 24-Lead SOIC 16-Lead SOIC
Detection Power Control Obstacles
ower measurement Radio Frequencies (RF) function that required most communications systems. term measurement automatically implies certain level precision over both input range temperature, which difficult achieve.
ERROR
25°C
85°C
100pF VOUT
Figure shows same plot AD8361 rms-to-dc converter. While AD8361 response similar diode detector, higher output voltage equivalent input power level also much more stable over temperature both high levels. This integrated circuit also advantage response that independent signal crest factor. This allows precise measurement power systems with varying crest factors such CDMA, WCDMA, multicarrier base stations.
Figure Discrete Diode Response
ERROR 25°C 40°C 85°C
Amps
high dynamic range measurements, amps offer precision over multiple decades. Figure shows transfer function AD8309 MHz. This device measure power over range error bands) with noticeable degradation temperature variations. While this device higher-precision AD8306 work frequencies MHz, Analog Devices also offers amps such AD8313 AD8314 that work frequencies have dynamic ranges respectively. Analog Devices also offers amps such AD8310 that detect bursts narrow
Figure AD8361 TruPwr® Response
RSSI OUTPUT Volts
85°C
ERROR
85°C 40°C 25°C 25°C 40°C
INPUT LEVEL
Figure AD8309 Transfer Function
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VOUT Volts
VOUT Volts
Figure example, shows output voltage versus input level temperature-compensated diode detector circuit MHz. output voltage traces scaled right-hand axis error traces (with respect best-straight line 25°C) scaled left-hand axis. Clearly, while this circuit does measure power over dynamic range around does give good precision levels, especially over temperature.
40°C
Direct Sampling Techniques Simplify Multicarrier Receiver Design
uperheterodyne-based radio architectures have been workhorse radio design past years, emerging need multimode software configurability radio designs straining practical limits analog implementations based "superhet." Direct sampling techniques allow much radio architecture moved digital domain, which offers significant advantages terms cost savings, flexibility, performance. direct sampling, receive critical element, must have high enough input bandwidth, well excellent distortion noise performance, ensure that incoming signal accurately recovered. Direct sampling requires breed wideband, high-performance converters take radio into digital domain.
DIRECT RECEIVER
AD8343 FILTER FILTER
AD6640 AD9226 AD9433 AD9430 AD9244
ASIC
VersaCOMM Converter
AD9433 industry's first 12-bit MSPS optimized meet need direct sampling receivers. AD9433 achieves SFDR with multitone inputs MHz, thus making suitable today's receive architectures. Available PowerQuad4 52-pin package, AD9433 pin-compatible with AD9432 allows better thermal management. offers SFDR optimization circuit option that maximizes SFDR Direct sampling applications clock duty cycle stabilizer that eases clock duty cycle system constraints.
Direct sampling
AD9433 MULTITONE SPECTRAL PERFORMANCE 105MSPS
fIN_1 fIN_2
210MHz, 211MHz,
7dBFS 7dBFS
ENCODE
105MSPS
full analog bandwidth
with input SFDR with input optional input voltage:
12.50
25.00
37.50
50.00
VersaCOMM
nalog Devices, Inc. introduces VersaCOMM family Versatile Communications products providing link between data converters DSP. VersaCOMM digital converters perform digital mixing, filtering, tuning, reconfigurable field multistandard signals cellular standards) processed either single carrier multicarrier digital receive transmit architectures. These digital converters designed compatibility with Analog Devices' family high-speed sampling ADCs TxDACs. VersaCOMM products combine best product capabilities
found ASICs, FPGAs, DSPs provide systems engineer with competitive field reconfigurable specialized products offering shorter time market lower cost compared with alternative product options. Applications include macro, micro, pico cellular basestation designs processing standards such IS-136, GSM, EDGE, IS-95, CDMA2000, UMTS. Other applications include cellular E911 location services, wireless local loop, smart antennas, phased array antennas, communications test equipment, ultrasound applications.
LINK BETWEEN DATA CONVERTERS DSPs
BENEFITS High-performance signal processing cores Reconfigurable hardware power cost Supports multicarrier multimode standards Optimized interface high-speed data converters DSPs
VersaCOMM DIGITAL CONVERTERS
Combine Best ASIC, FPGA
Lowest cost lowest power Shortest development time Optimized signal processing blocks Good production Reconfigurable Reduced area
ASIC
Price/performance unit Specialized function Good production flexibility High design fabrication costs
VersaCOMM
FPGA
Hardware flexibility Good prototyping Limited clock speed High cost production volumes High power
Software programmable Requires high MIPS/Task Good prototyping Limited concurrency
VersaCOMM Digital Converters
VersaCOMM family presently includes eight products: three digital receive signal processors (RSPs), digital transmit signal processors (TSPs), three quadrature digital upconversion/ modulators (QDUCs). reconfigurable numeric preprocessor that performs digital tuning, quadrature mixing, channel select filtering, data decimation. single multiple carrier applications, replaces analog selectivity tuning functions with digital equivalents. AD6620 million samples second (MSPS) single/dual-channel suitable IS-136, GSM, EDGE, IS-95 cellular standards single multiple carrier radio architectures. AD6624 MSPS single-/dual-/quad-channel suitable IS-136, GSM, EDGE, IS-95 cellular standards. Additionally, AD6624 provides noninteger resampling, supporting multiple standards from single sample rate. AD6634 MSPS single-/dual-/quad-channel with capabilities AD6624 plus extensions better
support cellular standards. These extensions include extra filtering, digital AGC, increased bandwidth output ports process WCMDA carriers. reconfigurable numeric post-processor that performs data interpolation, pulse shaping filtering, quadrature modulation, frequency tuning. Like RSP, defines variable channel characteristics, including data rate, channel bandwidth, channel shape, allowing single, generic transmitter carry multiple channels modulation standards simultaneously. AD6622 MSPS single-/dual-/quad-channel supporting IS-136, GSM, EDGE, IS-95 cellular standards. AD6623 MSPS single-/dual-/quad-channel with capabilities AD6622 extensions multimode operation. Extensions GSM/EDGE include GMSK 8-PSK direct modulation, modulation mode switching, time-slot scaling ramping. Extensions IS-95 include all-pass phase predistortion. addition, AD6623 provides noninteger resampling support multiple standards from single sample rate.
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QDUCs integrate high-speed direct-digital synthesizer, highperformance, high-speed 12-bit 14-bit DAC, digital filters, other functions onto single chip, form complete quadrature digital upconverter device. AD9853 quadrature phase shift keying 16-quadrature amplitude modulation (QAM) digital modulator with 10-bit DAC. AD9856 MSPS quadrature digital upconverter with 12-bit DAC, primarily intended function universal upstream downstream modulator hybrid fiber coax (HFC) cable network applications. AD9857 MSPS quadrature digital upconverter with 14-bit DAC, intended function universal modulator agile upconverter, single-tone direct-digital synthesizer (DDS), interpolating communications applications.
VersaCOMM PRODUCT FAMILY
Versatile Communications Products
Receive Signal Processing (RSP)
AD6620 Single-/Dual-Channel MSPS AD6624 Single-/Dual-/Quad-Channel MSPS AD6634 Dual-Channel WCDMA MSPS
Transmit Signal Processing (TSP)
AD6622 Single-/Dual-/Quad-Channel MSPS AD6623 Single-/Dual-/Quad-Channel MSPS
Quadrature Digital Upconversion/Modulation (QDUC)
AD9853 5-65 QPSK/16-QAM Digital Modulator w/10-Bit AD9856 MSPS Quadrature Digital Upconverter w/12-Bit AD9857 MSPS Quadrature Digital Upconverter w/14-Bit
High-Performance Capabilities Digital Up/Down Conversion
High-Speed Frequency Translation Decimating Filters Support Noninteger Data Rate Resampling Synchronized Operations (Hop, Ramp, Mode) Programmable Filter Response JTAG, BIST, Generation Phase Equalization Digital Modulation (GMSK, QPSK, 8PSK) Interpolating Filters On-Chip QDUC
Many specialized signal processing blocks built into digital converters. Numerically controlled oscillators (NCO) perform "digital mixing" quadrature modulation process frequency carriers generate in-phase quadrature digitally sampled words. NCOs programmable provide very precise frequency resolution synchronized frequency hopping phase control. words processed several digital filtering stages found RSPs TSPs such resampling cascaded integrated comb filters (rCIC2, CIC5) coefficient filter (RCF). These filters decimate interpolate data streams, removing signal interferers, aliased, images signal components. decimation interpolation rates user programmable. digital data resamplers RSPs TSPs permit fractional resampling such that common clock used while generating multiple output data rates. coefficient filters also have programmable coefficients allow user specify number filter taps necessary particular application. Microport serial control ports used read write data from part. QDUC products have digital quadrature modulators that drive integrated digital-toanalog converter (DAC) produce sample modulated waveform.
Introducing Othello Single Chip Direct-Conversion Radio
onsumers operators demand cellular phones shrink both size cost every year. Major cost size reduction needed radio section phone keep pace with integration digital baseband section. addition, manufacturers want radio solution that operates three current bands (900, 1800, 1900 MHz).
Othello single chip direct-conversion radio. offers benefits original Othello direct-conversion chipset, with more features-all single chip.
Othello radio solution consisted basic Othello (AD6523 transceiver, AD6524 multiband synthesizer), controller (AD831x), power-management ICs.
FRONT-END BPF/SW MODULE
1900
DEMODULATOR
relentless quest cost area reduction, Othello Direct-conversion radio ideal solution complex radio sysradio been developed. Using advanced BiCMOS process, tems-if meet specifications. eliminating filters, basic architecture functions original Othello multiple LOs, other components associated with superradio integrated, plus several other function blocks that were heterodyne radio architecture, cost size dramatically off-chip original version (see table). resulting reference reduced. However, direct-conversion radios capable meeting design smaller demanding specifications bill materials shrunk system have nearly 40%. addition, been difficult reliably OTHELLO BLOCK DIAGRAM Othello radio includes manufacture volume. tri-band operation comIn late 1999, Analog Devices BASEBAND CHIPSET patibility with EDGE succeeded meeting (Enhanced Data Rates specifications with Evolution) standard. direct-conversion radio
1800/1900
CTRL
MAIN
LOOP FILTER
VIRTUAL-IF MODULATOR
LDO2
CONVERTERS
GAIN CONTROL
dubbed Othello chipset. This chipset, adopted several leading handset manufacturers, offered reduction component count board area compared best-in-class dual-band superhet designs. technical problems that previously prevented direct-conversion radios from meeting stringent specifications included leakage, offsets, self-detection, other more subtle effects caused TDMA nature system. These were overcome through combination system engineering, innovative architecture LO-generation transmit signal paths, circuit techniques borrowed from many years precision analog design. original
1800 LDO3
TX/RX GENERATION
FRAC-N
LOOP FILTER
Othello radio, combined with Analog Devices SoftFonefamily baseband processors, also offers easy implement GPRS communications engine small space. total board area reference design based this combination mere (about 1.25 inches). Manufacturers PDA-type devices will find combination SoftFone Othello easy integrate into their products provide wide-area connectivity.
TX/DA CONVERTERS
SERIAL PORT
13/26
Complete technical details AD6534 Othello single chip transceiver provided bona fide manufacturers terminal equipment under nondisclosure agreement. Please contact your local sales office additional information.
Comparison Original Othello Othello Integration
Original Othello Othello
DCS/PCS Control GPRS Support EDGE Receive Compatible EDGE Transmit Compatible Voltage Regulators On-Chip
External External (AD831x) Yes, Class
On-Chip On-Chip Yes, Class (with External Modulator)
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World's Lowest-Phase Noise Synthesizer Just Faster
With Old.
bandwidth becomes more more crowded, operating frequencies next-generation commercial products heading 6GHz FILTER DOUBLER frequency band. problems system SYNTH designer faces these higher frequencies local oscillator (LO) 85mA generation. Until recently, VCOs were commercially available competitive prices. release higher frequency VCO's mirrored inexpensive, commercially available frequency synthesizer capable working GHz. This resulted need 6GHz FILTER power-hungry expensive prescalers, frequency doublers, SYNTH amplifiers. now, ADF4106 frequency synthesizer from PRESCALER capable taking fed-back output from operatIDD 110mA frequencies above GHz, eliminating need external prescalers, frequency doublers, amplifiers. ADF4106, with 0.35 BiCMOS technology, handle these higher frequencies power solution. Power consumption down between over existing solutions. Employing external prescalers involves loss channel resolution output. ADF4106 solves this problem with programmable dual modulus prescaler. bandwidth ADF4106 allows classical architecture adopted, while also saving valuable real estate, since fewer components required. Industry-leading phase noise performance been carried over from ADF4113 ADF4106. This means that system designers will have trade speed noise performance. ADF4106 offers gigantic dBc/Hz phase noise improvement over competitor solution through ability work higher frequency coupled with being based world's lowest phase noise synthesizer, ADF4113.
With ADF4106
PHASE NOISE COMPARISON: ADF4106 VERSUS INDUSTRY
6GHz FILTER ADF4106
ADF4106 COMPETITION
6GHz
1MHz
25mA
FREQUENCY
72dBc/Hz
bandwidth lower power lower noise standard design lower component count
more programming flexibility lower cost smaller area increased channel resolution
2kHz 1kHz 6GHz 1kHz 2kHz
82.2dBc/Hz
Challenges Cellular Systems
some areas world, growth digital (2G) cellular systems created need more capacity voice traffic. other parts world, mobile users want access same network speeds they their desktops. growing generation Internet users wants mobile portable access resources offer. today's options wireless connectivity slow useful multimedia-rich content.
International standards bodies have agreed family ThirdGeneration (3G) cellular standards, governments around world have used auctions other means license spectrum band operators. systems defined providing data rates kb/s full duplex mobile users, kb/s stationary users sparsely populated areas pedestrian-speed mobile users, Mb/s stationary urban users urban picocell environment. These data rates accomplished using wider channels than those used today's systems, channel sharing accomplished using direct-sequence spread-spectrum techniques. From perspective, there some significant challenges designing terminals. Perhaps most important choice architecture. While either superhet direct-conversion architecture meet specifications, important consider system-level requirements order make best choice. many parts world where will deployed coming years, handsets will require fallback mode ensure coverage areas where infrastructure installed. handset's radio implemented superhet design, will require filters channel W-CDMA signal used 3GPP standard) another fallback (200 system). While techniques switching between filters well known, board area required include both filters puts superhet significant cost size disadvantage compared handsets.
This points direct-conversion system, where channel filtering performed baseband, using analog filters, digital filters, both. Since filter components integrated silicon, area penalty extra physical size multiple filters, well switching matching components, eliminated. paper presented International Microwave Symposium June 20001 engineers from Analog Devices Mitsubishi Electric Corporation described direct-conversion receiver W-CDMA. This included wide-dynamic-range digitally programmable gain control precision baseband analog filters meeting W-CDMA system specs with trimming adjustment. included channels (one main channel diversity channel), demonstrated that direct-conversion radio could meet W-CDMA system receiver specifications. transmit signal chain W-CDMA radio additional requirements. CDMA cellular system that uses directsequence spreading handle multiple users, important that signals from mobile users reach base station with equal amplitude. Feedback provided from base station each mobile station control power. such systems, there need temperature-stable, accurate measurement mobile handset's output power, enable closed-loop power system function adequately. Analog Devices' family TruPwr detectors fits this need perfectly, with temperaturestable linear-in-dB response complex waveforms used systems.
TERMINAL BLOCK DIAGRAM
MULTIMODE WIRELESS COMMUNICATIONS ENGINE
CTRL
Goldfarb, "Analog Baseband Direct-Conversion W-CDMA Receivers," 2000 IEEE Radio Frequency Integrated Circuits Symposium Digest Papers, June 2000.
MULTIMEDIA APPLICATIONS ENGINE APPLICATION PROCESSOR MULTIMEDIA INTERFACES
AUDIO VIDEO VOICE
RF/ANALOG BASEBAND
DIGITAL BASEBAND
DATA
MULTIMODE, MULTIBANDWIDTH DIRECT-CONVERSION RADIO PRECISION POWER MEASUREMENT CONTROL MULTIMODE MIXED-SIGNAL INTERFACE
PROCESSOR(S) VOICE NON-VOICE DATA TYPES MIXED-SIGNAL PERIPHERALS HIGH-QUALITY AUDIO/VIDEO
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Unique Single Side-Band Upconversion Architecture
igh-performance, wide-dynamic-range transmitters need maintain excellent noise performance while simplifying filtering scheme wideband broadband signals. AD9777 with complex digital mixer ADI's high-performance direct Analog Quadrature Modulator provides building blocks realize upconverter architecture while maintaining superb performance. AD977x family high-performance signal processing TxDAC provides transmitter designers ability realize single side-band/ image rejection transmitter architecture. AD9777 16-bit entry family, AD9775 14-bit, AD9773 12-bit version. execute image rejection, internal complex modulator engaged external quadrature modulator, like ADI's AD8345/AD8346 Direct modulators, used.
Image Rejection Works
idea behind image rejection side-band suppression cancel energy created sampling mixing process. signal starts baseband component signal with finite bandwidth. This baseband signal would mixed AD977x TxDAC multiple sampling clock, placing carrier runt fS/N. Without doing complex mix, output spectrum would look like that shown Figure engaging complex mixer AD977x DAC, orthogonal opposite side-band produced selected channel (real imaginary).
SELECTABLE INTERPOLATION FILTERS
COMPLEX MODULATOR
HIGHFIDELITY DACs
DATA DEMUX/ LATCH
GAIN/OFFSET CONTROL
CLOCK MULTIPLIER
When complex signal then mixed analog quadrature modulator, lower side-band cancelled main band increased power leakage then becomes problem, filtered using single filter stage. With side-band suppression cascaded filtering need done provide adequate attenuation meet spectral mask requirements. AD8345 additional which will further reduce side-band image.
FIGURE
FDAC/N
FIGURE
FDAC/N
FIGURE
FDAC/N
FDAC/N
FDAC/N
FDAC/N
FDAC/N
FDAC/N
Worldwide Headquarters
Technology P.O. 9106 Norwood, 02062-9106 U.S.A. Tel: 4700, 5643, U.S.A. only) Fax: 8703 www.analog.com
Lowest-Power Available 10-lead
SOIC
Europe Headquarters
Westpark D-81373 Germany Tel: 76903-0 Fax: 76903-157
family Direct Digital Synthesis products reduces power consumption levels that would have been unimaginable even couple years ago. AD9833 AD9834 consume power while maintaining excellent performance associated with products from Analog Devices. power-down function available both products that reduces power consumption less than These products also specified power supplies from single single AD9833 AD9834 combine numerical controlled oscillator, sine lookup table, frequency registers, phase registers, 10-bit converter provide complete functionality single chip. output AD9833 AD9834 high-performance signal that achieve signal-tonoise ratio give spurious free dynamic range window. This sort performance coupled with very fine frequency resolution makes these products ideal many applications. With 28-bit phase accumulator, frequency resolution controlled part million, giving resolution clock speed. on-chip frequency registers on-chip phase registers enable preset frequency phase words stored later use. AD9834 stored words these registers enabled single external pin. on-board comparator allows square wave forms when device used clock generation. interface both parts simple serial 3-wire interface with data being loaded 16-bit word writes.
Japan Headquarters
Pier Takeshiba South Tower Building 1-16-1 Kaigan, Minato-ku Tokyo 105-6891, Japan Tel: 5402 8200 Fax: 5402 1063
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4501 West Tower Times Square Causeway Bay, Hong Kong, Tel: 9336 Fax: 4755
ANALOG DEVICES SOLUTIONS BULLETINS GLANCE
ADCs DACs Amplifiers Communications Power Management High-Speed Linear
Clock Rate SFDR Power Cons. Package
AD9833 10-Bit Min. Typ. SOIC
AD9834 10-Bit Min. Typ. 20-TSSOP
*USD 1,000s (unless otherwise noted), recommended resale, U.S.A. trademarks service marks property Analog Devices, Inc., unless otherwise noted. SB02737-40-10/01
Printed U.S.A.
Technology P.O. 9106 Norwood, 02062-9106 U.S.A.

THIS ISSUE First Single-Chip Gain Phase Measurement RF/IF Mo

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