SST29EE512A SST29LE512A SST29VE512A FEATURES: Single Voltage Read

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SST29EE512A SST29LE512A SST29VE512A FEATURES: Single Voltage Read

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Kilobit (64K Page Mode EEPROM
SST29EE512A SST29LE512A SST29VE512A
FEATURES: Single Voltage Read Write Operations 5.0V-only SST29EE512A 3.0-3.6V SST29LE512A 2.7-3.6V SST29VE512A Superior Reliability Endurance: 100,000 Cycles (typical) Greater than years Data Retention Power Consumption Active Current: (typical) (typical) 3.0/2.7V Standby Current: (typical) Fast Page Write Operation Bytes Page, Pages Page Write Cycle: (typical) Complete Memory Rewrite: (typical) Effective Byte Write Cycle Time: (typical) Fast Read Access Time 5.0V-only operation: 3.0-3.6V operation: 2.7-3.6V operation: Latched Address Data Automatic Write Timing Internal Generation Write Detection Toggle Data# Polling Hardware Software Data Protection Compatibility JEDEC Standard Flash EEPROM Pinouts command sets Packages Available PDIP 32-Pin PLCC 32-Pin TSOP (8mm 20mm) SST29EE512A/29LE512A/29VE512A suited applications that require convenient economical updating program, configuration, data memory. system applications, SST29EE512A/29LE512A/ 29VE512A significantly improve performance reliability, while lowering power consumption. SST29EE512A/29LE512A/29VE512A improve flexibility while lowering cost program, data, configuration storage applications. meet high density, surface mount requirements, SST29EE512A/29LE512A/29VE512A offered 32pin TSOP 32-lead PLCC packages. 600-mil, 32pin PDIP package also available. Figures pinouts. Device Operation page mode EEPROM offers in-circuit electrical write capability. SST29EE512A/29LE512A/ 29VE512A require separate Erase Program operations. internally timed write cycle executes both erase program transparently user. SST29EE512A/29LE512A/29VE512A have industry standard Software Data Protection. SST29EE512A/29LE512A/29VE512A compatible with industry standard EEPROM pinouts functionality.
PRODUCT DESCRIPTION SST29EE512A/29LE512A/29VE512A CMOS, Page Write EEPROMs manufactured with SST's proprietary, high performance CMOS SuperFlash technology. split-gate cell design thick oxide tunneling injector attain better reliability manufacturability compared with alternate approaches. SST29EE512A/29LE512A/29VE512A write with single power supply. Internal Erase/Program transparent user. SST29EE512A/29LE512A/ 29VE512A conform JEDEC standard pinouts bytewide memories. Featuring high performance page write, SST29EE512A/29LE512A/29VE512A provide typical byte-write time µsec. entire memory, i.e., KBytes, written page-by-page little seconds, when using interface features such Toggle Data# Polling indicate completion write cycle. protect against inadvertent write, SST29EE512A/29LE512A/29VE512A have on-chip hardware software data protection schemes. Designed, manufactured, tested wide spectrum applications, SST29EE512A/29LE512A/29VE512A offered with guaranteed page write endurance cycles. Data retention rated greater than years.
1999 Silicon Storage Technology, Inc. logo SuperFlash registered trademarks Silicon Storage Technology, Inc. These specifications subject change without notice. 302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Read Read operations SST29EE512A/ 29LE512A/29VE512A controlled OE#, both have system obtain data from outputs. used device selection. When high, chip deselected only standby power consumed. output control used gate data from output pins. data high impedance state when either high. Refer read cycle timing diagram further details (Figure Write Page Write SST29EE512A/29LE512A/ 29VE512A uses JEDEC Standard Software Data Protection (SDP) three-byte command sequence. Write operation consists three steps. Step three-byte load sequence Software Data Protection. Step byte-load cycle page buffer SST29EE512A/29LE512A/29VE512A. Steps same timing both operations. Step internally controlled write cycle writing data loaded page buffer into memory array nonvolatile storage. During both three-byte load sequence byte-load cycle, addresses latched falling edge either WE#, whichever occurs last. data latched rising edge either WE#, whichever occurs first. internal write cycle initiated TBLCO timer after rising edge CE#, whichever occurs first. write cycle, once initiated, will continue completion, typically within Figures controlled page write cycle timing diagrams Figures flowcharts. Write operation three functional cycles: Software Data Protection load sequence, page load cycle, internal write cycle. Software Data Protection consists specific three-byte load sequence that allows writing selected page will leave SST29EE512A/29LE512A/29VE512A protected Page Write. page load cycle consists loading bytes data into page buffer. internal write cycle consists TBLCO time-out write timer operation. During Write operation, only valid reads Data# Polling Toggle Bit. Page Write operation allows loading bytes data into page buffer SST29EE512A/ 29LE512A/29VE512A before initiation internal write cycle. During internal write cycle, data page buffer written simultaneously into memory array. Hence, page write feature SST29EE512A/ 29LE512A/29VE512A allows entire memory written little seconds. During internal write cycle, host free perform additional tasks, such fetch data from other locations system write next page. each Page Write operation, bytes that loaded into page buffer must have same page address, i.e. through A16. byte loaded with user data will written Figures page write cycle timing diagrams. after completion three-byte load sequence, host loads byte into page buffer within byte-load cycle time (TBLC) SST29EE512A/29LE512A/29VE512A will stay page load cycle. Additional bytes then loaded consecutively. page load cycle will terminated additional byte loaded into page buffer within (TBLCO) from last byte-load cycle, i.e., subsequent high-to-low transition after last rising edge CE#. Data page buffer changed subsequent byte-load cycle. page load period continue indefinitely, long host continues load device within byte-load cycle time page loaded determined page address last byte loaded. Software Chip Erase SST29EE512A/29LE512A/29VE512A provide Chip Erase operation, which allows user simultaneously clear entire memory array state. This useful when entire device must quickly erased. Software Chip Erase operation initiated using specific six-byte load sequence. After load sequence, device enters into internally timed cycle similar write cycle. During Erase operation, only valid read Toggle Bit. Table load sequence, Figure timing diagram, Figure flowchart.
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Write Operation Status Detection SST29EE512A/29LE512A/29VE512A provide software means detect completion write cycle, order optimize system write cycle time. software detection includes status bits: Data# Polling (DQ7) Toggle (DQ6). write detection mode enabled after rising whichever occurs first, which initiates internal write cycle. actual completion nonvolatile write asynchronous with system; therefore, either Data# Polling Toggle read simultaneous with completion write cycle. this occurs, system possibly erroneous result, i.e., valid data appear conflict with either DQ6. order prevent spurious rejection, erroneous result occurs, software routine should include loop read accessed location additional times. both reads valid, then device completed write cycle, otherwise rejection valid. Data# Polling (DQ7) When SST29EE512A/29LE512A/29VE512A internal write cycle, attempt read last byte loaded during byte-load cycle will receive complement true data. Once write cycle completed, will show true data. device then ready next operation. Figure Data# Polling timing diagram Figure flowchart. Toggle (DQ6) During internal write cycle, consecutive attempts read will produce alternating 1's, i.e., toggling between When write cycle completed, toggling will stop. device then ready next operation. Figure Toggle timing diagram Figure flowchart. initial read Toggle will typically "1". Data Protection SST29EE512A/29LE512A/29VE512A provide both hardware software features protect nonvolatile data from inadvertent writes. Hardware Data Protection Noise/Glitch Protection: pulse less than will initiate write cycle. Power Up/Down Detection: write operation inhibited when less than 2.5V. Write Inhibit Mode: Forcing low, high, high will inhibit write operation. This prevents inadvertent writes during power-up power-down. Software Data Protection (SDP) SST29EE512A/29LE512A/29VE512A provide JEDEC approved software data protection scheme data alteration operations, i.e., Write Chip Erase. With this scheme, Write operation requires inclusion series three byte-load operations precede data loading operation. three byte-load sequence used initiate write cycle, providing optimal protection from inadvertent write operations, e.g., during system power-up power-down.
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Product Identification product identification mode identifies device SST29EE512A/29LE512A/29VE512A manufacturer SST. This mode accessed hardware software operations. hardware operation typically used programmer identify correct algorithm SST29EE512A/29LE512A/29VE512A. Users wish software product identification operation identify part (i.e., using device code) when using multiple manufacturers same socket. details, Table hardware operation Table software operation, Figure software entry read timing diagram Figure entry command sequence flowchart. manufacturer device codes same both operations. TABLE PRODUCT IDENTIFICATION TABLE Byte Manufacturer's Code 0000 SST29EE512A Device Code 0001 SST29LE512A Device Code 0001 SST29VE512A Device Code 0001 Product Identification Mode Exit order return standard read mode, Software Product Identification mode must exited. Exiting accomplished issuing Software Exit (reset) operation, which returns device Read operation. Reset operation also used reset device read mode after inadvertent transient condition that apparently causes device behave abnormally, e.g., read correctly. Table software command codes, Figure timing waveform Figure flowchart.
Data
T1.1
FUNCTIONAL BLOCK DIAGRAM 29EE512A/29LE512A/29VE512A
X-Decoder
524,288 EEPROM Cell Array
Address Buffer Latches Y-Decoder Page Latches
Control Logic
Buffers Data Latches
B1.0
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Standard Pinout View
F01.0
FIGURE ASSIGNMENTS 32-PIN TSOP PACKAGES
32-Pin PDIP View
F02.0
32-Lead PLCC View
FIGURE ASSIGNMENTS 32-PIN PLASTIC DIPS 32-LEAD PLCCS TABLE DESCRIPTION Symbol Name A15-A7 Address Inputs A6-A0 DQ7-DQ0 Column Address Inputs Data Input/output
Functions provide memory addresses. addresses define page write cycle. Column Addresses toggled load page data. output data during read cycles receive input data during write cycles. Data internally latched during write cycle. outputs tri-state when high. activate device when low. gate data output buffers. control write operations provide 5-volt supply 10%) SST29EE512A, 3-volt supply (3.0-3.6V) SST29LE512A, 2.7-volt supply (2.7-3.6V) SST29VE512A Unconnected pins.
T2.0
Chip Enable Output Enable Write Enable Power Supply
Ground Connection
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
TABLE OPERATION MODES SELECTION Mode Read Page Write Standby Write Inhibit Write Inhibit Software Chip Erase Product Identification Hardware Mode Software Mode Enable Mode
DOUT High High DOUT High DOUT Manufacturer Code (BF) Device Code (see notes)
Address AIN, Table AIN, Table VIL, VIL, Table Table
T3.0
TABLE SOFTWARE COMMAND CODES
Command Sequence Page Write Software Chip Erase Software Entry Software Exit Write Cycle Addr(1) Data 5555H 5555H 5555H 5555H Write Cycle Addr(1) Data 2AAAH 2AAAH 2AAAH 2AAAH 2AAAH Write Cycle Addr(1) Data 5555H 5555H 5555H 5555H 5555H 5555H 2AAAH 5555H Write Cycle Addr(1) Data Addr(2) Data 5555H Write Cycle Addr(1) Data 2AAAH Write Cycle Addr(1) Data 5555H
Alternate Software 5555H Entry(3)
Notes:
T4.0
Address format A14-A0 (Hex), Address "Don't Care". Page Write consists loading bytes A0). Alternate six-byte Software Product Command Code software Chip Erase function supported industrial temperature part. Please contact require this function industrial temperature part. Notes Software Product Command Code: With Manufacturer Code BFH, read with SST29EE512A Device Code 20H, read with SST29LE512A/29VE512A Device Code 21H, read with device does remain Software Product Mode powered down. This product supports both JEDEC standard three-byte command code sequence SST's original six-byte command code sequence. designs, recommends that three-byte command code sequence used.
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Absolute Maximum Stress Ratings (Applied conditions greater than those listed under "Absolute Maximum Stress Ratings" cause permanent damage device. This stress rating only functional operation device these conditions conditions greater than those defined operational sections this data sheet implied. Exposure absolute maximum stress rating conditions affect device reliability.) Temperature Under Bias -55°C +125°C Storage Temperature -65°C +150°C Voltage Ground Potential -0.5V VCC+ 0.5V Transient Voltage (<20 Ground Potential -1.0V VCC+ 1.0V Voltage Ground Potential -0.5V 14.0V Package Power Dissipation Capability 25°C) 1.0W Through Hole Lead Soldering Temperature Seconds) 300°C Surface Mount Lead Soldering Temperature Seconds) 240°C Output Short Circuit Current(1)
Note: Outputs shorted more than second. more than output shorted time.
SST29EE512A OPERATING RANGE Range Ambient Temp Commercial +70°C Industrial -40°C +85°C SST29LE512A OPERATING RANGE Range Ambient Temp Commercial +70°C Industrial -40°C +85°C SST29VE512A OPERATING RANGE Range Ambient Temp Commercial +70°C Industrial -40°C +85°C
CONDITIONS TEST 5V±10% 5V±10% Input Rise/Fall Time Output Load Gate Figures
3.0V 3.6V 3.0V 3.6V
2.7V 3.6V 2.7V 3.6V
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
TABLE SST29EE512A OPERATING CHARACTERISTICS Limits Symbol Parameter Units Test Conditions Power Supply Current CE#=OE#=VIL,WE#=VIH I/Os open, Read Address input VIL/VIH, f=1/TRC Min., VCC=VCC Write CE#=WE#=VIL, OE#=VIH, =VCC Max. ISB1 Standby Current CE#=OE#=WE#=VIH, =VCC Max. (TTL input) ISB2 Standby Current CE#=OE#=WE#=VCC -0.3V. (CMOS input) Max. Input Leakage Current =GND VCC, Max. Output Leakage Current VOUT =GND VCC, Max. Input Voltage Min. Input High Voltage Max. Output Voltage Min. Output High Voltage -400µA, Min. Supervoltage 11.6 12.4 =VIL, Supervoltage Current VIL, VIH, Max.
T5.1
TABLE SST29LE512A/29VE512A OPERATING CHARACTERISTICS 3.0-3.6V SST29LE512A, 2.7-3.6V SST29VE512A Limits Symbol Parameter Units Test Conditions Power Supply Current CE#=OE#=VIL,WE#=VIH I/Os open, Read Address input VIL/VIH, f=1/TRC Min., VCC=VCC Write CE#=WE#=VIL, OE#=VIH, =VCC Max. ISB1 Standby Current CE#=OE#=WE#=VIH, =VCC Max. (TTL input) ISB2 Standby Current CE#=OE#=WE#=VCC -0.3V. (CMOS input) Max. Input Leakage Current =GND VCC, Max. Output Leakage Current VOUT =GND VCC, Max. Input Voltage Min. Input High Voltage Max. Output Voltage Min. Output High Voltage -100 Min. Supervoltage 11.6 12.4 =VIL, Supervoltage Current VIL, VIH, Max.
T6.1
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
TABLE POWER-UP TIMINGS Symbol Parameter TPU-READ Power-up Read Operation TPU-WRITE Power-up Write Operation
Maximum
Units
T7.0
T8.0
TABLE CAPACITANCE MHz, other pins open) Parameter Description Test Condition CI/O Capacitance VI/O Input Capacitance
Maximum
Note: (1)This parameter measured only initial qualification after design process change that could affect this parameter.
TABLE RELIABILITY CHARACTERISTICS Symbol Parameter NEND TDR(1) VZAP_HBM(1) VZAP_MM(1) ILTH(1)
Note:
(1)This
Minimum Specification 10,000 2000
Units Cycles Years Volts Volts
Test Method JEDEC Standard A117 JEDEC Standard A103 JEDEC Standard A114 JEDEC Standard A115 JEDEC Standard
T9.2
Endurance Data Retention Susceptibility Human Body Model Susceptibility Machine Model Latch
parameter measured only initial qualification after design process change that could affect this parameter.
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
CHARACTERISTICS TABLE SST29EE512A READ CYCLE TIMING PARAMETERS
SST29EE512A-70 SST29EE512A-90
Symbol TCLZ(1) TOLZ(1) TCHZ(1) TOHZ(1) TOH(1)
Parameter Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access Time Active Output Active Output High High-Z Output High High-Z Output Output Hold from Address Change
Units
T10.0
TABLE SST29LE512A READ CYCLE TIMING PARAMETERS
SST29LE512A-150 SST29LE512A-200
Symbol TCLZ(1) TOLZ(1) TCHZ(1) TOHZ(1) TOH(1)
Parameter Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access Time Active Output Active Output High High-Z Output High High-Z Output Output Hold from Address Change
Units
T11.0
TABLE SST29VE512A READ CYCLE TIMING PARAMETERS
SST29VE512A-200 SST29VE512A-250
Symbol TCLZ(1) TOLZ(1) TCHZ(1) TOHZ(1) TOH(1)
Parameter Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access Time Active Output Active Output High High-Z Output High High-Z Output Output Hold from Address Change
Units
T12.0
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
TABLE PAGE WRITE CYCLE TIMING PARAMETERS Symbol TOES TOEH TBLC(1) TBLCO(1) TIDA TSCE Parameter Write Cycle (Erase Program) Address Setup Time Address Hold Time Setup Time Hold Time High Setup Time High Hold Time Pulse Width Pulse Width Data Setup Time Data Hold Time Byte Load Cycle Time Byte Load Cycle Time Software Access Exit Time Software Chip Erase SST29EE512A 0.05 SST29LE/VE512A 0.05 Units
T13.1
Note: (1)This parameter measured only initial qualification after design process change that could affect this parameter.
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
ADDRESS A15-0 HIGH-Z TCLZ DATA VALID TOLZ
TOHZ
TCHZ DATA VALID
F03.0
FIGURE READ CYCLE TIMING DIAGRAM
Page Write ADDRESS A15-0 5555 2AAA 5555 TOES
TOEH
TBLC
TBLCO
BYTE DATA VALID BYTE BYTE
F04.0
FIGURE CONTROLLED PAGE WRITE CYCLE TIMING DIAGRAM
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Page Write ADDRESS A15-0 5555 2AAA 5555
TBLC TBLCO
TOES
TOEH
BYTE DATA VALID BYTE BYTE
F05.0
FIGURE CONTROLLED PAGE WRITE CYCLE TIMING DIAGRAM
ADDRESS A15-0 TOEH TOES
TBLCO
F06.0
FIGURE DATA# POLLING TIMING DIAGRAM
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
ADDRESS A15-0 TOEH TOES
TBLCO
READ CYCLES WITH SAME OUTPUTS
F07.0
FIGURE TOGGLE TIMING DIAGRAM
Six-Byte Code Software Chip Erase ADDRESS A14-0 5555 2AAA 5555 5555 2AAA 5555
TSCE
TBLC
F09.1
TBLCO
FIGURE SOFTWARE CHIP ERASE TIMING DIAGRAM
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Three-Byte Sequence Software Entry ADDRESS A14-0 5555 2AAA 5555 0000 TIDA DEVICE CODE 0001
TBLC DEVICE CODE SST29EE512A SST29LE512A/29VE512A
F10.1
Three-Byte Sequence Software Exit Reset
FIGURE SOFTWARE ENTRY READ
ADDRESS A14-0
5555
2AAA
5555
TIDA
TBLC
F11.0
FIGURE SOFTWARE EXIT RESET
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
VIHT
INPUT REFERENCE POINTS
OUTPUT
VILT
F12.1
test inputs driven VIHT (2.4 logic VILT (0.4 logic "0". Measurement reference points inputs outputs (2.0 (0.8 Inputs rise fall times (10% 90%)
Note: VHT-VHIGH Test VLT-VLOW Test VIHT-VINPUT HIGH Test VILT-VINPUT Test
FIGURE INPUT/OUTPUT REFERENCE WAVEFORMS
TEST LOAD EXAMPLE TESTER HIGH
F13.0
FIGURE TEST LOAD EXAMPLE
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Start
Figure
Page Write Command
Page Address
Byte Address
Load Byte Data
Increment Byte Address
F14.0
Byte Address 128? Wait TBLCO
Wait Write (TWC, Data# Polling Toggle operation) Write Completed
FIGURE WRITE ALGORITHM
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Internal Timer
Page Write Initiated
Toggle
Page Write Initiated
Data# Polling
Page Write Initiated
Wait
Read byte from page
Read (Data last byte loaded)
Write Completed
Read same byte
true data?
Write Completed
Does match?
Write Completed
F15.0
FIGURE WAIT OPTIONS
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Command Sequence Write data: Address: 5555
Write data: Address: 2AAA
Write data: Address: 5555
Load Bytes page data
Page Load Operation
Wait TBLCO
Wait
Device Written
F16.1
FIGURE PAGE WRITE FLOWCHARTS
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Software Product Entry Command Sequence Write data: Address: 5555
Software Product Exit Reset Command Sequence Write data: Address: 5555
Write data: Address: 2AAA
Write data: Address: 2AAA
Write data: Address: 5555
Write data: Address: 5555
Pause
Pause
Read Software
Return normal operation
F17.0
FIGURE SOFTWARE PRODUCT COMMAND FLOWCHARTS
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Software Chip Erase Command Sequence Write data: Address: 5555
Write data: Address: 2AAA
Write data: Address: 5555
Write data: Address: 5555
Write data: Address: 2AAA
Write data: Address: 5555
Wait TSCE
Chip Erase
F18.0
FIGURE SOFTWARE CHIP ERASE COMMAND CODES
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
PRODUCT ORDERING INFORMATION
Device
Speed
Suffix1
Suffix2 Package Modifier leads Numeric modifier Package Type PDIP PLCC TSOP (die 20mm Unencapsulated Operating Temperature Commercial 70°C Industrial -40° 85°C Minimum Endurance 10,000 cycles Read Access Speed 250ns 200ns 150ns 120ns Version Code Voltage -only 3.6V 3.6V
SST29XE512A
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
SST29EE512A Valid combinations SST29EE512A- 70-4C- SST29EE512A- 70-4C- SST29EE512A- 90-4C- SST29EE512A- 90-4C- SST29EE512A- 70-4I-EH SST29EE512A- 90-4I-EH SST29EE512A- 90-4C-U2 SST29EE512A- 70-4I-NH SST29EE512A- 90-4I-NH
SST29EE512A- 70-4C- SST29EE512A- 90-4C-
SST29LE512A Valid combinations SST29LE512A-150-4C- SST29LE512A-150-4C- SST29LE512A-200-4C- SST29LE512A-200-4C- SST29LE512A-150-4I-EH SST29LE512A-200-4C-U2 SST29LE512A-150-4I-NH
SST29VE512A Valid combinations SST29VE512A-200-4C- SST29VE512A-200-4C- SST29VE512A-250-4C- SST29VE512A-250-4C- SST29VE512A-200-4I-EH SST29VE512A-250-4C-U2 SST29VE512A-200-4I-NH
Example:Valid combinations those products mass production will mass production. Consult your sales representative confirm availability valid combinations determine availability combinations. Note: software chip erase function supported industrial temperature part. Please contact SST, require this function industrial temperature part.
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
PACKAGING DIAGRAMS
index
.600 .625 .530 .550
.065 .075
1.645 1.655
PLCS.
Base Plane Seating Plane
.015 .050 .120 .150
.170 .200
.008 .012 .600
.070 .080
.045 .065
.016 .022
.100
Note:
Complies with JEDEC publication MO-015 dimensions, although some dimensions more stringent. linear dimensions inches (min/max). Dimensions include mold flash. Maximum allowable mold flash .010 inches.
32.pdipPH-ILL.1
32-LEAD PLASTIC DUAL-IN-LINE PACKAGE (PDIP) PACKAGE CODE:
VIEW
SIDE VIEW
BOTTOM VIEW
Optional Identifier
.485 .495 .447 .453 .042 .048
.106 .112 .020 MAX. .023 .029 .030 .040
.042 .048 .585 .595 .547 .553 .026 .032
.013 .021 .400
.490 .530
.050 BSC. .015 Min. .050 BSC. .125 .140 .075 .095 .026 .032
Note:
Complies with JEDEC publication MS-016 dimensions, although some dimensions more stringent. linear dimensions inches (min/max). Dimensions include mold flash. Maximum allowable mold flash .008 inches.
32.PLCC.NH-ILL.1
32-LEAD PLASTIC LEAD CHIP CARRIER (PLCC) PACKAGE CODE:
1999 Silicon Storage Technology, Inc. 302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
IDENTIFIER
1.05 0.95
8.10 7.90
.270 .170
0.15 0.05
18.50 18.30
0.70 0.50
20.20 19.80
32.TSOP-EH-ILL.2
Note:
Complies with JEDEC publication MO-142 dimensions, although some dimensions more stringent. linear dimensions metric (min/max). Coplanarity: (±.05)
32-LEAD THIN SMALL OUTLINE PACKAGE (TSOP) PACKAGE CODE:
1999 Silicon Storage Technology, Inc.
302-01 2/99
Kilobit Page Mode EEPROM SST29EE512A SST29LE512A SST29VE512A
Area Offices
Customer Service Northwest USA, Rocky Mtns. West Canada Central Southwest East East Canada North America Distribution Asia Pacific East Asia Europe Northern Europe (408) 523-7754 (408) 523-7661 (727) 771-8819 (978) 356-3845 (941) 505-8893 (408) 523-7762 (81) 45-471-1851 (44) 1932-230555 (45) 3833-5000
International Sales Representatives Distributors
Australia Belgium Memec Benelux China/Hong Kong Actron Technology Co., Ltd. (HQ) Hong Kong Actron Technology Co., Ltd. Shanghai Actron Technology Co., Ltd. Shenzhen Actron Technology Co., Ltd. Chengdu Actron Technology Co., Ltd. Beijing Actron Technology Co., Ltd. Wuhan Actron Technology Co., Ltd. Xian
MetaTech Limited (HQ) Hong Kong MetaTech Limited Beijing MetaTech Limited Shanghai MetaTech Limited Chengdu MetaTech Limited Fuzhou MetaTech Limited Shenzhen Serial System Ltd. Hong Kong Serial System Ltd. Chengdu Serial System Ltd. Shanghai Serial System Ltd. Shenzhen (61) 3-762 7644 (32) 1540-0080 (852) 2727-3978 (86) 21-6482-8021 (86) 755-376-2763 (86) 28-553-2896 (86) 10-6261-0042 (86) 27-8788-7226 (86) 29-831-4585 (852) 2421-2379 (86) 10-6858-2188 (86) 21-6485-7530 (86) 28-5577-415 (86) 591-378-1033 (86) 755-321-9726 (852) 2950-0820 (86) 28-524-0208 (86) 21-6473-2080 (86) 755-212-9076 (45) 7010-4888 (33) 0414 (33) 7900
North American Sales Representatives
Alabama M-Squared, Inc. Huntsville Arizona QuadRep, Inc. California Costar Northern Falcon Sales Technology Marcos Westar Company, Inc. Calabasas Westar Company, Inc. Irvine Colorado Lange Sales, Inc. Florida M-Squared, Inc. Clearwater M-Squared, Inc. Coral Springs M-Squared, Inc. Longwood Georgia M-Squared, Inc. Atlanta Illinois Oasis Sales Corporation Northern Rush West Associates Southern Indiana Applied Data Management Iowa Rush West Associates Kansas Rush West Associates Maryland Nexus Technology Sales Massachusetts Sales Michigan Applied Data Management Minnesota Cahill, Schmitz Cahill Missouri Rush West Associates North Carolina M-Squared, Inc. Charlotte M-Squared, Inc. Raleigh Jersey Nexus Technology Sales Mexico QuadRep, Inc. York Nexus Technology Sales Reagan/Compar Endwell Reagan/Compar Rochester Ohio Applied Data Management Cincinnati Applied Data Management Cleveland Oregon Thorson Pacific, Inc. Pennsylvania Nexus Technology Sales Texas Technical Marketing, Inc. Carrollton Technical Marketing, Inc. Houston Technical Marketing, Inc. Austin Utah Lange Sales, Inc. Washington Thorson Pacific, Inc. Wisconsin Oasis Sales Corporation Canada Electronics Sales Professionals Ottawa Electronics Sales Professionals Toronto Electronics Sales Professionals Montreal
Thorson Pacific, Inc. B.C. (205) 830-0498 (602) 839-2102 (408) 946-9339 (760) 591-0504 (818) 880-0594 (949) 453-7900 (303) 795-3600 (727) 669-2408 (954) 753-5314 (407) 682-6662 (770) 447-6124 (847) 640-1850 (314) 965-3322 (317) 257-8949 (319) 398-9679 (913) 764-2700 (301) 663-4159 (978) 851-5400 (734) 741-9292 (612) 699-0200 (314) 965-3322 (704) 522-1150 (919) 848-4300 (201) 947-0151 (505) 332-2417 (516) 843-0100 (607) 754-2171 (716) 218-4370 (513) 579-8108 (440) 946-6812 (503) 293-9001 (215) 675-9600 (972) 387-3601 (713) 783-4497 (512) 343-6976 (801) 487-0843 (425) 603-9393 (414) 782-6660 (613) 828-6881 (905) 856-8448 (514) 388-6596 (604) 294-3999
Denmark C-88 France
Bron Sevres
Germany Endrich Bauelemente Vertriebs GMBH Bramstedt
Endrich Bauelemente Vertriebs GMBH Nagold
(49) 4192-897910 (49) 7452-60070 (91) 80-526-1102 (91) 40-231130 (91) 11-220-5624 (353) 316116 (972) 3-6498404 (39) 2-424-1471 (81) 3-3350-5418 (81) 93-511-6471 (81) 6-6263-5080 (81) 3-5300-5515 (81) 6-6399-3443 (81) 3-5396-6218 (81) 3-3795-6461 (82) 2-832-8881 (60)4-658-4276 (60) 4-657-0204 (60) 3-737-1243 (31) 40-265-9399 (65) 748-4844 (65) 280-0200 (27) 845-5011 (34) 371-7768 (41) 27-721-7440/43 (886) 2-2555-0880 (886) 2-2698-0098 (886) 2-2651-0011 (44) 1296-397396
Revised 4-7-99
India Team Technology Bangalore Team Technology Hyderabad Team Technology Delhi Ireland Curragh Technology Israel Spectec Electronics Italy Carlo Gavazzi Cefra Japan Asahi Electronics Co., Ltd. Tokyo Asahi Electronics Co., Ltd. Kitakyushu
Microtek, Inc. Osaka Microtek, Inc. Tokyo Ryoden Trading Co., Ltd. Osaka Ryoden Trading Co., Ltd. Tokyo Silicon Technology Co., Ltd.
Korea Bigshine Korea Co., Ltd. Malaysia MetaTech
Serial System Serial System Kuala Lumpur
Netherlands Memec Benelux Singapore MetaTech Ltd.
Serial System Ltd. (HQ)
South Africa Distributors Spain Tekelec Espana S.A. Switzerland Leading Technologies Taiwan, R.O.C. GCH-Sun Systems Co., Ltd. (GSS) Limited Tonsam Corporation United Kingdom Ambar Components, Ltd.
Silicon Storage Technology, Inc. 1171 Sonora Court Sunnyvale, 94086 Telephone 408-735-9110 408-735-9036 www.SuperFlash.com www.ssti.com Literature FaxBack 888-221-1178, International 732-544-2873
1999 Silicon Storage Technology, Inc.
302-01 2/99

SST29EE512A SST29LE512A SST29VE512A FEATURES: Single Voltage Read

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