T7024 single supply front-end especially designed applications frequen

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T7024 single supply front-end especially designed applications frequen

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BluetoothFront-end T7024 Design Guide
T7024 single supply front-end especially designed applications frequency band. front consists Power Amplifier (PA), Low-Noise Amplifier (LNA) switch driver diode antenna switch. T7024 compliant with TDMA systems such BluetoothTM, WDCT. Since operated same time, T7024 also open other modulation systems when antenna switch needed. block diagram T7024 shown Figure Figure Block Diagram
LNA_OUT RX_ON V1_PA V2_PA V2_PA RAMP PA_IN
Bluetooth Front-end T7024 Design Guide
TX/RX/ standby contro
V3_PA_OUT
SiGe T7024
SWITCH_OUT
R_SWITCH
LNA_IN
V3_PA_OUT
designed three-stage amplifier with analog input control (RAMP) simplified control output power. This control also used switch power-down mode. delivers (200 output power with high Power Added Efficiency (PAE) typically 35%. However, power added efficiencies about reached with QFN20 package. two-stage amplifier frequency range with typical noise figure digital controls. control toggles between diode switch, other control switches antenna switch from current-saving standby mode active mode. diode switch activates external antenna switch. current consumption antenna switch controlled external resistor.
Rev. 4549D-BLURF-06/04
V3_PA_OUT
VS_LNA
Reference Design PSSO20 Package
typical application board that supports circuitry T7024 PSSO20 package shown Figure Figure page Figure page reference design consists four-layer printed circuit board. upper layer contains lines most connections. internal layers used ground connections. Some connections made backside application board. lines inputs well outputs lines width distance ground layer. Gerber file with information printed circuit available request. application board consists layers: layer: RF-signals, Spacing: Second layer: GND, Spacing: Third layer: (optional) Spacing: Bottom layer: connections (optional), Figure T7024 Application Board Photo (PSSO20 Package)
Design Guide T7024
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Design Guide T7024
Figure T7024 Application Board Layout (PSSO20 Package)
LNA_OUT PA_IN
LNA_SUPPLY
100pF 3.9nH 100pF 3.9pF
5.6nH
15pF 3.3pF 56pF
PA_SUPPLY
15nH
10pF
56pF DIL-Switch 1.8pF 0.8pF 1.5pF
2k7R 390R
LNA_IN
PA_OUT
Figure T7024 Application Board Schematic (PSSO20 Package)
5.6nH 3.9nH
10p*
V1_PA V2_PA
100p* 3.9p
15p*
100p
ramp
56p*
T7024
56p* 1.8p
harm. termination
15nH 10p*
selected with DIL-switch diode replaced application-board
Switch
V3_PA VS_LNA
Only necessary unstabilized supply, depending application
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Reference Design QFN20 Package
typical application module support circuitry T7024 QFN20 package shown Figure page Figure page Figure page reference design consists four-layer printed circuit board where upper layer contains lines most connections. internal layers used ground connections. Some connections made backside application board. lines input output lines with width spacing ground layer. Gerber file with information printed circuit available request. application board consists layers: layer: RF-signals, Spacing: Second layer: GND, Spacing: Third layer: (optional), Spacing: Bottom layer: connections (optional), Figure T7024 Application Board Photo (QFN20 Package)
Design Guide T7024
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Design Guide T7024
Figure T7024 Application Board Layout (QFN20 Package)
LNA_OUT PA_IN
2.2pF
100pF 100pF
15pF 3.3pFHQ 56pF
2.2pF 10pF
0.8pF
1.8pF
390R LNA_IN PA_OUT
Figure T7024 Application Board Schematic (QFN20 Package)
V1_PA
2.2p
V2_PA
RX_ON
100p
100p
T7024
ramp
harm. termination
selected with DIL-switch
1.8p 18nH
diode replaced applicationboard
Switch VS_LNA
V3_PA
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Power Amplifier
power amplifier T7024 designed three-stage amplifier. input stage amplifier AC-coupled PA_IN. Therefore, blocking capacitor necessary input port. external matching circuit should however designed optimum performance power amplifier. power amplifier nominal input power dBm. therefore recommended that input circuit should designed this value. This been done matching circuits application boards. difference between input matching circuits T7024 PSSO20 package T7024 QFN20 package result from fact that performance changes with different packages. power amplifier T7024 turned with ramp input signal. very important that slug backside good connection ground. supply voltage collector first amplifier stage connected V1_PA. Since collector internally matched simplify handling, additional matching recommended. supply line matching very sensitive terms output power PAE. supply voltage collector second stage using transmission line. both reference designs, capacitor with high value should placed close pins. blocking this stage with capacitor done after length approximately using transmission line. matching second stage sensitive. blocking capacitors should placed with some distance matching capacitor otherwise output power will drop. Since matching capacitor (and resonant frequency) great influence output power, useful consider using slightly different values (3.0 pF), since exact capacitance parasitic influence vary depending manufacturer size. Finally, third stage uses three output connectors open collector. reference design PSSO20 package, recommended that short stub with length should used harmonic termination. This harmonic termination necessary achieve output power, however, shorting second harmonic reduces losses output transistor therefore increases power added efficiency (PAE). other output connectors (pin connected each other. output matching, capacitor ground blocking capacitor should used. Make sure that capacitor ground placed very close output pins. feeding inductor should also placed near output. output matching, capacitor ground blocking capacitor should used. Make sure that capacitor ground blocking capacitor placed very close output connector. Finally, feeding inductor should also placed near output Since capacitors play major role good match both reference designs, recommended that capacitors with high factor used. harmonic terminations, reference design QFN20 package uses actually short stubs with length.
Design Guide T7024
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Design Guide T7024
design output matching circuit, S-parameter test network analyzer used. measurement output matching with network analyzer results wrong values since measurement done without input output stage. Moreover, output stage sensitive input power bias, which also changes with input power. output matching only designed using load pull setup, with which possible measure output power versus load impedance. load pull setup available, described matching with capacitors used match impedance approximately load output pins) PSSO20 package. load impedance output QFN20 package approximately GHz. measured load pull data summarized Figure page Figure page output matching power amplifier includes loads which used harmonic termination. Figure page these lines called harmonic termination. harmonic termination consists open pin, which internally connected output. using this harmonic terminations, power added efficiency will increased. This effect, which influences PA's output impedance, included reported reference designs. Please note, that important only design optimum input output matching, also design right termination supplies achieve optimum stability against parasitic oscillations, output power power added efficiency from application board, three stages amplifier separated, allowing access each collector stage. Blocking capacitors needed each stage. final design they combined reduce space costs. PA's output power current consumption regulated ramp pin, which also used switch standby mode with quiescent current typically below ramp voltage between 1.75 usual operating mode power amplifier. higher ramping voltage results higher output power operating point output power reached approximately 1.75 ramp signal. ramp control circuit T7024 designed operate with control voltage input signal ramp input. However, also possible current input signal. This advantages regarding temperature behavior relation output power dependence ramp current shown Figure temperature compensation power amplifier should done externally, e.g., with processor with temperature sensor output which drives ramp However, this circuitry available, possible solution simple temperature compensation, which sufficient most needs. This temperature compensation uses possibility drive ramp input with voltage current simultaneously. Since temperature behavior power amplifier different these modes, possible select optimum impedance drive power amplifier with specific ramp voltage ramp current according desired output power. schematic this simple temperature compensation shown Figure page temperature compensation optimized different power levels range from output. resistors reference voltages adjusted according different output power levels.
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Figure Typical Ramp Curve T7024 QFN20 Package (Temperature 20°C)
Output Power (dBm) Ramp Current (µA) Current (mA)
Figure Schematic Simple Temperature Compensation
Power levels output): 1.55 1.75
3.7k 2.8k
(Vramp)
Design Guide T7024
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Design Guide T7024
Low-noise Amplifier
Low-Noise Amplifier (LNA) T7024 two-stage amplifier with internal matching 2.45 GHz. includes supply, input, output, control signals ground connections. achieve good noise figure values, recommended that blocking capacitors supply used. input DC-coupled internal circuitry. blocking capacitor therefore necessary input. This blocking capacitor should also used matching input port. capacitor used reference designs matching noise matching. output internal blocking capacitor, therefore, external blocking necessary. Since output only minor influence noise figure, sufficient design output network with good match switch driver controlled RX_ON control pin. high signal switches from standby mode with quiescent current active mode. RX_ON signal toggles between (RX_ON high) switch driver (RX_ON low), since switch driver used simultaneously, further design considerations next paragraph. gain integrated controlled analogue signal RX_ON pin. This feature used together with automatic gain control (AGC) loop transceiver optimum signal power level receive input transceiver. Figure shows correspondence between RX_ON control voltage gain. Please note, that below approximately RX_ON LNA/antenna control circuitry switches transmit mode. Usually, this behavior should omitted, since sharp step with additional gain loss about (depending antenna switch performance) occurs. However, transceiver handle this sharp gain step, possible this switching additional benefit under high power reception.
Figure Gain T7024 versus RX_ON Voltage
Gain (dB)
Gain (dB)
RX_ON
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Switch Driver
switch driver T7024 front used realize antenna switch. switched current source used this purpose. supply also used switch driver. switch driver turned with control signals high RX_ON low. typical application switch driver shown Figure
Figure Antenna Switch with T7024
T7024
SWITCH
match
match
supply
antenna
operation antenna switch follows. switch driver receive mode (RX_ON high), switch-out port draws current. this case, diodes seen high impedance input connected directly antenna. transmit mode, RX_ON signal toggled low. switch-out port draws current ground diodes switched impedance. output connected directly antenna, quarter wavelength transmission line between diodes transforms short capacitor switch-out connector open diode output line. Therefore, input separated from output high output power cannot delivered input. switch-out current adjusted between approximately using reference resistor R_SWITCH pin. However, antenna switch realized application board, thus enabling good access input output. Instead diodes, application board equipped with LEDs visualization purposes.
Application Board Connectors
application uses four female connectors signals: out, out. connections realized connectors, with lines ramp, ground supply voltages three-amplifier stages: V1_PA, V2_PA, V3_PA, connector with lines supply voltage, ground, switch current, (power RX_ON. connectors shown Figure page
Design Guide T7024
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Design Guide T7024
Figure Connectors Application Board
Connector (top view, cable leaves direction, upper left corner application board) VS_LNA (red) (blue) RX_ON (yellow) connected Switch (green) Ground (black) V1_PA (yellow) V2_PA (green) RAMP (Coax) board) Ground (black) Ground (black) Ground (black) V3_PA (red) V3_PA(red) board) Connector (top view, cable leaves right direction, right side application board)
S-parameter Data Reference Designs
following S-parameter diagrams measured with described reference designs. However, reference plane calibration shifted input output pin. test power dBm, test power input dBm.
Figure Measured S-parameter Data Input, QFN20 Package
T7024 QFN20:
Markers 18.056 -14.909 2.40000 18.257 -13.646 2.45000 18.800 -12.161 2.50000
Start: Stop:
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Figure Measured S-parameter Data Output, QFN20 Package
T7024 QFN20:
Markers 29.999 7.2109 2.40000 37.463 16.459 2.45000 47.840 23.676 2.50000
Start: Stop:
Figure Measured S-parameter Data Input, QFN20 Package
T7024 QFN20:
Markers 57.678 33.381 2.40000 59.650 36.945 2.45000 61980 40.143 2.50000
Start: Stop:
Design Guide T7024
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Design Guide T7024
Figure Measured S-parameter Data Input, PSSO20 Package
T7024 PSSO20:
Markers 63.189 -1.1504 2.40000 61.566 -12.740 2.45000 41.990 -17.947 2.50000
Start: Stop:
Figure Measured S-parameter Data Output, PSSO20 Package
T7024 PSSO20:
Markers 14.313 39.973 2.40000 20.834 55.268 2.45000 40.277 72.930 2.50000
Start: Stop:
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Figure Measured S-parameter Data Input, PSSO20 Package
T7024 PSSO20:
Markers 29.337 -11.646 2.40000 28.811 -11.017 2.45000 28.032 -10.463 2.50000
Start: Stop:
Load Pull Data Reference Designs
Load pull measurements power amplifiers were done using load pull system. measurements were calibrated output pins power amplifier order output impedance measurement results summarized Table Figure page Figure page output power amplifier uses three pins. However, used harmonic termination. Therefore, during load pull measurement, load output pins been changed. depicted results impedances seen output transistor optimum power power added efficiency.
Table Load Impedances Different Packages Frequencies
Frequency 2.45 2.48 Load Impedance PSSO20 Package 15.0 j16.8 12.7 j12.8 12.0 j11.7 11.9 j10.3 Load Impedance QFN20 Package 22.0 j28.6 19.5 j28.8 16.2 j21.4 14.8 j24.7
Design Guide T7024
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Design Guide T7024
Figure Measured Load Impedance Output, PSSO20 Package (Reference:
Figure Measured Load Impedance Output, QFN20 Package (Reference:
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Frequently Asked Questions
What advantage SiGe Hetero Junction Transistor Technology? There several advantages: silicon material itself times higher thermal conductivity compared GaAs material which leads much better thermal dissipation heat that generated transistor cells. both bipolar GaAs transistors increased beta observed with increased device temperature. This leads higher current finally destruction transistor. SiGe devices, there decreasing beta with temperature therefore built-in self-stabilization transistor cell itself. negligible quiescent current, there need high side switch transistor normally required GaAs's even large transistor structures. necessary circuitry proper operation power cells (band gap, biasing, ramp voltage generation, temperature compensation normally integrated into main chip. Vcbo (max) Vceo (max) What typical gain partitioning three stage power amplifier T7024? stage: stage: stage: decreasing gain stage size stage losses interstage matching. there chronological order obeyed when connecting power supply? Yes, first, make sure that terminals (i.e. input output) terminated with Ohms. After that, terminals grounds need connected supply switched Then input signal within frequency range power range specified data sheet applied input. After that, Vramp applied used adjust output power desired level. possible make short circuit input output terminal during operation? this strictly forbidden. possible apply certain mismatch output terminal exact values conditions please refer data sheet. possible make short circuit terminals during operation shortly after operation? don't recommend apply short circuit terminals because depending application circuit there might arise strong voltage peaks inductors other inductive components like feeding lines supply chain. These voltages reach times standard voltage levels measured only with very fast oscilloscope. What purpose interstage matching? input output impedance single power amplifier stage matched impedance preceding following stages respectively. This done avoid spurious unwanted oscillations reduce gain loss mismatch.
What maximum allowed voltage Vcbo Vceo?
Design Guide T7024
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Design Guide T7024
What purpose input output matching? Output matching output device matched Ohms order maximum output power efficiency. normally consists transmission line inductor shunt capacitor ground. Input matching This necessary keep interaction between preceding stage (i.e. transceiver circuit) possible. Therefore condition stable operation. Input matching LNA: This matching necessary keep losses noise figure low. therefore some influence sensitivity receive path (minimum detectable input power). Output matching LNA: This matching leads loss connection transceiver. also influences minimum detectable input power. since turned with ramp voltage, necessary provide signal. signal influence necessary blocking capacitor part input matching? Yes, necessary blocking capacitor matching component input, since input directly connected base first amplifier stage order keep noise figure minimum.
necessary provide signal, driven?
Glossary
Table Used Abbreviations
Abbreviation DECT GaAs SIGE TDMA WDCT Description Automatic Gain Control Bill Material Continuous Wave Direct Current Digital Enhanced Cordless Telecommunications Device Under Test Gallium Arsenic Integrated Circuit Industrial, Scientific,. Measurement Power Amplifier Power Added Efficiency Printed Circuit Board Radio Frequency Silicon Germanium Time Division Multiple Access Voltage Controlled Oscillator Worldwide Digital Cordless Telecommunications
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T7024 single supply front-end especially designed applications frequen

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