Gemini AL962 Port 10/100M Switch Controller Overview Ge
|
|
|
Top Searches for this datasheet
Partnership Forever
Gemini
AL962 Port 10/100M Switch Controller
Overview
Gemini, single chip, two-port 10/100Mbps switching controller which provides cost simple solution with high integration design. Gemini, programmable ports ports designed 10BASE/100BASE 10BASE applications. Gemini integrates controller switch engine technologies with four forwarding mechanisms like through, fragment free through, store forward, adjust through modes. Besides, Gemini also supports 80188 interface user design Spanning Tree Algorithm, STA, switch system. With Gemini, user lots flexible applications. stand-alone 10/100M two-port switch connect 10BASE 100BASE devices. Each 10/100M switching port also breaks distance limitation 10BASE class 100BASE repeaters increases throughput. 10/100M switch also provides reversed standard interface which allows direct link 10/100M Ethernet devices.
Features
Non-blocking two-port 10/100M switching controller with controller switching engine included cost simple solution 100BASE-TX, 100BASE-FX, 100BASE-T4 10BASE applications. Configurable 10/100BASE 10BASE Interfaces. Full/half duplex mode ports. Four forwarding schemes: adaptive cut-through, cut-through, fragment-free cut-through, store-and- forward. Full line speed capability 14880 packet/sec 148800 packet/sec 100M. Flow control support, either PAUSE operation full-duplex (IEEE802.3x) packet half-duplex (backpressure) mode. Bridging functions such Local address filtering Two-layer hashing scheme better address coverage Configurable kinds hashing methods Short routing decision time Aging function included with configurable aging time External address table (for 16), (for upper) entries Supports Spanning Tree Algorithm (IEEE802.1d) Buffer management included SRAM support external buffer memory from 32kB 128kB Network management features Counters management purpose Both serial management interface (SMIO,SMC) accessing counters configuration registers Smart direct display forwarding, filtering, utilization, collision Rate. power 5.0V CMOS technology 208-pin PQFP package
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification Block Diagram
AL962
EEPROM Access Control Memory Management Aging Timer Control
Operation Settings
Switching Control
FIFO FIFO Learning/ Routing Scheme
Display Control
Interface Access Control
(Reversed) Flow Interface Control Interface
System Clock
Example System Diagram
SRAM 64kx16
SRAM 64kx16
208-pin two-port 10/100M switch controller
80188
SRAM 64kx16
SRAM 64kx16
EEPROM
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification Diagram
RAMA11 RAMA12 RAMA13 RAMA14 RAMA15 LEDU17# LEDU16# LEDU15# LEDU14# LEDU13# LEDU12# LEDU11# LEDU10# LEDU00# LEDU01# LEDU02# LEDU03# LEDU04# LEDU05# LEDU06# LEDU07# CPUAD0 CPUAD1 CPUAD2 CPUAD3 CPUAD4 CPUAD5 CPUAD6 CPUAD7 M/IO# CPURD# CPUWR# Reserved INT# Reserved
RAMA10 CE0# CE1# RAMD31 RAMD30 RAMD29 RAMD28 RAMD27 RAMD26 RAMD25 RAMD24 RAMD23 RAMD22 RAMD21 RAMD20 RAMD19 RAMD18 RAMD17 RAMD16 RAMD15 RAMD14 RAMD13 RAMD12 RAMD11 RAMD10 RAMD9 RAMD8 RAMD7 RAMD6 RAMD5 RAMD4 RAMD3 RAMD2 RAMD1 RAMD0 GW#/WE# RAMA9 RAMA8 RAMA7 RAMA6 RAMA5
AL962
Gemini
EECS SMIO Clock Reset# RMII-SEL0 LED_Test1 LED_Test0 LongerPkt# LED0M0 LED0M1 LED1M0 LED1M1 RMII-SEL1 EEP-EN# Force-FD0# Force-FD1# Force-FC0# Force-FC1# OPMode00 OPMode01 OPMode10 OPMode11 SNI0-SEL# SNI1-SEL# RAMSZ0 RAMSZ1 FCActive0# FCActive1# Speed0 Speed1 MDIO
ADMtek Incorporated 98/07/22
RAMA4 RAMA3 RAMA2 RAMA1 RAMA0 TX0-EN TX0-CLK TX0-D3 TX0-D2 TX0-D1 TX0-D0 RX0-D3 RX0-D2 RX0-D1 RX0-D0 RX0-ER RX0-CLK RX0-DV CRS0 COL0 TX1-EN TX1-CLK TX1-D3 TX1-D2 TX1-D1 TX1-D0 RX1-D3 RX1-D2 RX1-D1 RX1-D0 RX1-ER RX1-CLK RX1-DV CRS1 COL1
Active
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification General Description
AL962 high performance, cost, feature enhancement, quality assurance 2-port Fast Ethernet Controller which dedicated 2-port switch dual speed solutions. This product operates 33MHz fully complies with IEEE series specifications included Physical layers. switch operations include forwarding scheme, packet filtering, Spanning Tree, buffer management, display, etc. Packets from MII, SNI, Reversed interface should storage. Then, destination address learning, filtering, retransmission other side followed based real application. Spanning Tree Algorithm strengthen reliability network system low-power required. System designers have more flexibility apply their needs.
Interface
interface provides low-cost 80188 processor. Clock rate operate 40MHz 33MHz recommended. This processor required only Spanning Tree Algorithm implemented.
Serial Management Interface
This feature interactive among serial CPU, AL962 PHYs which gets consistent operation speed, flow control, others. detail description will explained later.
Buffer Interface
AL962 offers 32-bit address SRAM-15 data access. System designer choose different buffer size their request. SRAM buffer two-port switch includes address look-up table, output queue, buffer Spanning Tree. size look-up table depends SRAM buffer memory, example, address entries learning table 128K SRAM entries other sizes. Self-learning address recognition scheme selected either configurable hashing algorithms. buffer management, each packet occupies 1.5K, 1536 bytes, memory each port dynamically obtained buffer depending line speed port without configuration need. Gemini also supports various length packet further application requirement like tagging VLAN. Spanning Tree buffer also optional regards existence feature. block buffer register.
EEPROM Interface
EEPROM also option configuration settings 2-port switch. includes aging time, hashing algorithm selection, SRAM size control, forwarding scheme setting, forced line-speed, etc. EEPROM used, EEP-EN# should enable Gemini also supports 93C46 EEPROM interface.
MII, Reverse MII, Interface
AL962 supports three standard interface each port, which 10Mbps, Reversed directly 10/100Mbps extension, 10/100Mbps. interfaces shared same assignment. Feature setting chosen either configuration pins registers.
Display
There four ratings, switching port utilization, forwarding, filtering, collision rate. also configurable mode corresponding configuration pins register settings. feature very convenient implement system designers more add-on value customers.
Operation Modes
Both interfaces PHYs transceivers operate 10/100Mbps full half duplex mode. keep consisted system operation speed, these parts, Switching Controller, will automatically adjusted through MDC/MDIO pins. modes allowed full wire speed operations without interference. Forced full-duplex modes provided remote devices without auto-negotiation function.
Flow Control Backpressure
AL962 provides IEEE 802.3x flow control full-duplex mode backpressure half-duplex. This feature heightens traffic control ability ensures transmission warranty packets. Flow control enable disable regards register setting.
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
Forwarding Scheme
Four forwarding schemes, store-and-forward, fragment-free, cut-through, adaptive cut-through, provides Gemini switch. Designers choose mode based their system requirement application. Scheme change permitted while system operation running.
Address Recognition
Self-learning bridge function based source address field packets. 2-layer look-up table different hashing algorithms strengthen bridge ability within high performance assurance. Programmable aging time fast aging control supported.
Network Management
Various statistics counters support simple management requirement. Based these counters, system administrator easily understand status switch operations pertinent configuration setting promote system performance.
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification Descriptions Name
CPUAD(0:7)
Type
Descriptions
Interface
178,177 Address Data Interface 80188 176,175 173,172 169,168 Address Latch Enable 80188 Memory Access indication. High Memory Accessing Accessing. Gemini registers accessed from mapping. There internal weak pull high this input pin. Read Command. There internal weak pull high this input pin. Write Command. There internal weak pull high this input pin.
M/IO(S2#)
CPURD# CPUWR# INT#
Interrupt Acknowledge out. Active low. This signal will active when Port (Spanning tree port) received 4-byte data into FIFO.
Serial Management Interface
Management Data Clock. Provides reference clock SMIO signal. Through this interface access configuration statistic counter registers. access method same Management Interface (MDC, MDIO) interface.
SMIO
Management Data Input/output. This provides channels Gemini Management controller transfer control information values statistic counters. port address this SMIO defined 00001b. detail spec Serial Management Interface described anage unct descr
SRAM Interface
CE0~1# RAMA0~15 57,56 55,54 53,52 51,50 49,48 3,208 Chip Enable SRAM chip Global Write SRAM Address output Output Enable
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
RAMD0~31 41,40 39,38 37,36 35,34 33,32 31,30 29,28 27,26 23,22 21,20 19,18 17,16 15,14 13,12 11,10 SRAM Data Input Output
EEPROM Interface
EECS EDO: Data Output serial EEPROM, Inputs configuration information Gemini. EDI: Data Input serial EEPROM, Gemini outputs data EEPROM ECK: Clock input serial EEPROM, Gemini outputs clock signal EEPROM Chip Select serial EEPROM EECK/s:50ns, h:0ns
Ports
TX0-CLK TX1-CLK Transmit Clock. TX-CLK continuous clock that provides reference clock transfer TX-EN, TXD0~3, TX-ER from connecting device. This clock comprised Gemini transmit clock generator.
TX0-EN TX1-EN
Transmit Enable. TX-EN shows that Gemini presenting recovered decoded data TXD0~3. TX-EN synchronous with rising edge TX-CLK encompass receiving frame asserting signal, starting later than start frame delimiter excluding frame delimiter. Transmit Data. These bundle signals output from Gemini connecting device. These signals transited synchronous with rising edge TX-CLK. When TX-EN asserts, then each period TX-CLK Gemini drives recovered encoded data into TXD0~3 transmission. While TX-EN de-asserted then TXD0~3 will have effect upon connecting device. Receive Clock. RX-CLK continuous clock that provides reference clock transfer RX-DV, RXD0~3, RX-err from connecting device. Receive Data Valid. RX-DV shows that receiving data presenting RXD0~3 from connecting device. RX-DV synchronous with rising edge RX-CLK encompasses receiving frame asserting signal, starting later than start frame delimiter excluding frame delimiter.
TX0D0~3 TX1D0~3 RX0-CLK RX1-CLK RX0-DV RX1-DV
67,66 65,64 88,87 86,85
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
RX0D0~3 RX1D0~3 RX0-ER RX1-ER CRS0 CRS1 COL0 COL1 MDIO 73,72 71,70 96,95 94,93 74,97
Receive Data. These bundle signals input from connecting device. These signals transited synchronous with rising edge RX-CLK. These pins will high impedance ignores input when RX-EN negated. Receive Coding Error. RX-ER signal transited synchronous with rising edge RXCLK. These pins will high impedance ignores input when RX-EN negated. Carrier Sense. active when either transmit receive medium carrier been sensed will negated when both transmit receive media idle. active high input from connecting device. Collision Detection. active when carrier collision medium. This active signal will remained till collision condition. active high input from connecting device.
79,103
80,104
Management Data Clock. Provides reference clock MDIO signal. Management Data Input/output. This provides channels Gemini Transceivers transfer control information status.
Reverse Port Port (Set when RMII-SEL# tied low, Shared with Port Port
TX0-CLK TX1-CLK Transmit Clock. TX-CLK continuous clock that provides reference clock transfer TX-en, TXD0~3, TX-ER from connecting device. This clock comprised Gemini transmit clock generator. reverse mode, this also defined input pin. Transmit Enable. TX-EN shows that Gemini presenting recovered decoded data TXD0~3. TX-EN synchronous with rising edge TX-CLK encompasses receiving frame asserting signal, starting later than start frame delimiter excluding frame delimiter. reverse mode, this reversed input pin. Transmit Data. These bundle signals output from Gemini connecting device. These signals transited synchronous with rising edge TX-CLK. When TX-EN asserts, then each period TX-CLK Gemini drives recovered encoded data into TXD0~3 transmission. While TX-EN de-asserted then TXD0~3 will have effect upon connecting device. reverse mode, this reversed input pin. High impedance when TX-EN input negated.
TX0-EN TX1-EN
TX0D0~3 TX1D0~3
67,66 65,64 88,87 86,85
RX0-CLK RX1-CLK RX0-DV RX1-DV
Receive Clock. RX-CLK continuous clock that provides reference clock transfer RX-DV, RXD0~3, RX-err from connecting device. reverse mode, this reversed output pin. Receive Data Valid. RX-DV shows that receiving data presenting RXD0~3 from connecting device. RX-DV synchronous with rising edge RX-CLK encompasses receiving frame asserting signal, starting later than start frame delimiter excluding frame delimiter. reverse mode, this reversed output pin.
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
RX0D0~3 RX1D0~3 TX0-ER TX1-ER CRS0 CRS1 73,72 71,70 96,95 94,93
Receive Data. These bundle signals input from connecting device. These signals transited synchronous with rising edge RX-CLK. reverse mode, this reversed output pin. Transmit Coding Error. TX-ER signal transited synchronous with rising edge TXCLK.
Carrier Sense. active when either transmit receive medium carrier been sensed will negated when both transmit receive media idle. active high input from connecting device. reverse mode, this reversed output pin. Collision Detection. active when carrier collision medium. This active signal will remained till collision condition. active high input from connecting device. reverse mode, this reversed output pin.
COL0 COL1
10BASE Interfaces-Share with Interface (When mode selected)
TX0-CLK TX1-CLK TX0D0 TX1D0 TX0-EN TX1-EN RX0-CLK RX1-CLK RX0D0 RX1D0 CRS0 CRS1 COL0 COL1 Transmit Clock 10BASE port Transmit Data 10BASE port Transmit Enable 10BASE port Receive Clock 10BASE port Receive Data 10BASE port Carrier Sense 10BASE port Collision detection 10BASE port
Display
Utilization Rate0(0:7)# 190,189 driver utilization rate switching port driver will update 186,185 Utilization rate every 30ms. 184,183 182,179 Idle 191,192 193,197 198,199 200,201 >80% active directly drive with 330ohm serial resister Industrial Road, SBIP, HsinChu Version 0.70 (03)578-8879 (03)578-8871
Utilization Rate1(0:7)#
ADMtek Incorporated 98/07/22
ADMtek Incorporated Confidential
Gemini Specification
Forwarding Rate0(0:7)#
Forwarding Rate1(0:7)#
190,189 driver forwarding rate Switch port. driver will update 186,185 Forwarding rate every 30ms. 184,183 FW0# FW1# FW2# FW3# FW4# FW5# FW6# FW7# 182,179 Idle 191,192 193,197 198,199 200,201 >80% active directly drive with 330ohm serial resister 190,189 driver filtering rate Switch port. driver will update Filtering 186,185 rate every 30ms. 184,183 FL0# FL1# FL2# FL3# FL4# FL5# FL6# FL7# 182,179 Idle 191,192 193,197 198,199 200,201 >64% active directly drive with 330ohm serial resister 190,189 driver collision rate repeater set. driver will update Collision 186,185 rate every 30ms. 184,183 Idle 191,192 193,197 198,199
Filtering Rate0 (0:7)#
Filtering Rate1 (0:7)#
Collision Rate0(0:6)#
Collision Rate1(0:6)#
active directly drive with 330ohm serial resister FCActive0~1# LED_Test0 LED_Test1 Flow control active, active when there flow control packet generated. buffer full, either packet 802.3x frame generated. Both active high normal display. (floating requirement)
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
Configuration
LongerPkt#
Longer packet definition selection. Active low. When this tied then Gemini will define 1522bytes maximum normal packet length instead 1518bytes. Gemini will detect this setting during power reset. There internal pull high default configuration. Display Mode Selection. Gemini will keep detecting these setti duri power reset after power reset. LEDM LEDM Utilization Rate display Forwarding Rate display Collision Rate display Filtering Rate display EEPROM-Enable indication. Active low. This should tied EEPROM used configuration auto-loading. Gemini will detect this setting during power reset. There internal pull high default configuration. Forced Full-duplex selection. Active low. When these pins tied then Gemini will force external Transceiver Full duplex mode keep same speed Auto-negotiated one. Gemini will keep detecting this setting during power reset after power reset. There internal pull high default configuration. Forced flow control. Active low. When these pins tied low, then Gemini will forced enable flow control function. Gemini will detect this setting during power reset. There internal pull high default configuration. Reverse Selection Port Active low. This tied reversing definition Port There internal pull high default configuration. Management Mode Selection Parallel CPU, Serial Managment, Port N-Way Port N-Way monitor. Gemini will detect these setti duri reset. There internal pull down default configuration. Disable Management (default) Parallel Management Serial Management Reserved Reserved Reserved Port N-Way Monitor Enable Port N-Way Monitor Enable Operation Mode Selection. Gemini will detect this setting during power reset. default value OPMode0 OPMode1 through (default) Store forward Fragment free through Adaptive through Interface Selection. Active low. When these pins tied then Gemini will enable interface 10Base-T instead interface. Gemini will detect this setting during power reset. There internal pull high default configuration. Industrial Road, SBIP, HsinChu Version 0.70 (03)578-8879 (03)578-8871
LEDM0[0:1] LEDM1[0:1]
139,138 137,136
EEP-EN#
ForceFD0# ForceFD1#
ForceFC0# ForceFC1# RMII-SEL0# RMII-SEL1# MM0~2
OPMode0[0:1] 121,120 OPMode1[0:1] 119,118
SNI0-SEL# SNI1-SEL#
ADMtek Incorporated 98/07/22
ADMtek Incorporated Confidential
Gemini Specification
RAMSZ0~1 114,113
SRAM Size Setting indicate what type SRAM many SRAM chips applied packet buffering. Gemini will detect these setti duri reset RAMSZ0 RAMSZ1 SRAM SRAM SRAM (default) SRAM Speed 100Mbps 10Mbps selection. Active low. This tied high 10Mbps selection tied 100Mbps selection when both EEPROM MDC/MDIO supported. Gemini will keep detecting this setting during power reset after power reset. There internal pull-low circuit default configuration.
Speed0 Speed1
Miscellaneous
Clock Reset# 33MHz System clock reference input. This connected external 33MHz clock source. Reset#. Active low. power reset initialize Gemini state machines statuses enter initial default state. Besides, will turned when power testing fail. Gemini isolates most these pins. application, user should leave these pins non-connected.
141,142 144,159
Power
105, 123, 146, 152, 158, 166, 171, 181, 188, 195, 101, 106, 124, 127, 128, 129, 143, 148, 151, 157, 165, 170, 174, 180, 187, 194, 196,
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification Configuration Registers
EEPROM enable then default value configuration registers will updated auto-loaded contents from 93C46 EEPROM after power reset. Besides, value configuration registers modified through byte) SMIO word) path. configuration registers read/write-able except version register. There certain steps that Gemini configuration accordingly. During power resetting, configuration volt evel first. resetti negat EEPRO avail configuration information EEPROM will loaded into Gemini then. Next, ports MDIO enabled, Gemini will access result N-WAY relative Physical device through MDIO interface configuration accordingly. Finally, Gemini configurations still modified voltage level relative configuration pins configuration registers overwritten through interface SMDIO interface. default values configurations will consistent with setting from pins during power reset. Regarding priority configuration settings, simple rule that newest setting always overwrite one. example, speed 0(the speed mode Port during power reset detected 100Mbps mode, then, moment, power-on reset negated port 100Mbps. But, mini-seconds later, Gemini recognized that speed result Auto-Negotiation Port 10Mbps from MDIO, then speed Port would 10Mbps immediately. However, after this SMIO controller) changes speed Configuration register Port 100Mbps, then finally speed Port would 100Mbps. Force Flow Control each port independent result Auto Negotiation from PHY. Either half-duplex fullduplex mode, configuration programmed system requirement.
Add.
Label
CONFIG0
Descriptions
15~12 Version Packet uncti enab packet Gemini longer than around seconds will aged out. Enable packet-aging function. (default) Disable packet-aging function. Disable (default) Enable adopted) gorit Hash Algorithm (default) Hash Algorithm Port ueue orit ecti Port eans Spann Port Priority (default) High Priority Fast Aging Control. Disable fast aging control instruction. Enable fast aging control instruction aging timer equal seconds. Interrupt function (INT#) enable. Disable INT# function; means Gemini assert interrupt condition occurs (see description INT#). will take care Spanning packets polling mechanism. Enable INT# function. Gemini will assert INT# when interrupt condition from occurs. Spanning Tree Algorithm enable. disable Spanning Tree Algorithm. (default) enable Spanning Tree Algorithm with Blocks buffer. enable Spanning Tree Algorithm with Blocks buffer.
Default
01110000 00010101b
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
enable Spanning Tree Algorithm with Blocks buffer. Long packet length definition enable. Enable full (1522bytes) packet length definition. long packet defined packet length larger than 1522bytes accept. Disable full (1522bytes) packet length definition. long packet defined packet length larger than 1518bytes. SRAM Size; Mean SRAM Mean SRAM Mean SRAM (default) Mean SRAM Backpress ecti Disable Backpressure. Alternative Backpressure selected. (default) Bit15 Stop Receive function selection Port Disable Stop Receive function. Enable Stop Receive function. Gemini will isolate receive path Port Bit14 Stop Transmit function selection Port Disable Stop Transmit function. Enable Stop Transmit function. Gemini will isolate transmit path Port Bit13 Bypass Route Function enable Port Gemini should programmed Store Forward mode, this Disable bypass Route Function. Gemini will learn, filter, forward packets normal switch. Enable bypass Route Function. Gemini forward packets without filtering. Port State Control Port Forwarding (default) Learning Listening Blocking Back-off Algorithm Stopped enable Port Disable Back-off Algorithm Stopped function. Enable Back-off Algorithm Stopped function. Bypass check function enable Port Disable bypass check function, Gemini will check data each received packet. Enable bypass check function, Gemini checkt data each received packet. Port disable Enable Port (default) Disable Port Speed 100Mbps 10Mbps selection Port Means 100Mbps selected. (default) Means 10Mbps selected. Forced Full Duplex selection port force Full Duplex function Force port enable Full Duplex function Display Mode Selection Port Utilization Rate display (default) Collision Rate display Forwarding Rate display Filtering Rate display select Port Industrial Road, SBIP, HsinChu Version 0.70
CONFIG1
00000000 00001000b
ADMtek Incorporated 98/07/22
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
(default) Forced Flow Control Enable Port Flow control disable. (default) Flow control enable. This will enable IEEE 802.3x flow control setting, full-duplex mode selected. half duplex set, then backpressure flow control enabled. Operation Modes Port Through (default) Fragment Through Store Forward Adjust Through Stop Receive function selection Port Disable Stop Receive function. Enable Stop Receive function. Gemini will isolate receive path Port Stop Transmit function selection Port Disable Stop Transmit function. Enable Stop Transmit function. Gemini will isolate transmit path Port Bypass Route Function enable Port Gemini should programmed Store Forward mode, this Disable bypass Route Function. Gemini will learn, filter, forward packets normal switch. Enable bypass Route Function. Gemini forward packets without filtering. Port State Control Port Forwarding (default) Learning Listening Blocking Back-off Algorithm Stopped enable Port Disable Back-off Algorithm Stopped function Enable Back-off Algorithm Stopped function. Bypass check function enable Port Disable bypass check function. Gemini will check data each received packet. Enable bypass check function. Gemini check data each received packet. Disable Port Enable Port (default) Disable Port Speed 100Mbps 10Mbps selection Port Mean 100Mbps selected. (default) Mean 10Mbps selected. Forced Full Duplex selection Port force Full Duplex function enable Force port enable Full Duplex function Display Mode Selection Port Utilization Rate display (default) Collision Rate display Forwarding Rate display Filtering Rate display select Port ADMtek Incorporated 98/07/22 Industrial Road, SBIP, HsinChu Version 0.70 (03)578-8879 (03)578-8871
CONFIG2
00000000 00001000b
ADMtek Incorporated Confidential
Gemini Specification
(default) Forced Flow Control Enable Port flow control. (default) Flow control enable. This will enable 802.3x flow control setting, full-duplex mode selected. half duplex then backpressure flow control enabled. Operation Modes Port Through (default) Fragment Through Store Forward Adjust Through Aging timer. There choices with unit seconds (default means seconds Note: When this programmed with then unct sabl higher byte this register reserved only allowed written Inter Frame value selection. 15~8 Port Port0. signs positive negative. When value equal that means 96-bit time. (The maximum window defined follow. 0000000~00011000=0~24, 10000000~10011000 0~-24). called signed bit. When this value increases decreases interface, will added subtract sixteen time. increased interface, will added four-bit time. Adaptive Through Threshold Setting. This lower byte register separated bits) with base 128, 256) those three threshold points. default value 01001001. threshold points 128, error packets through, Fragment free through, Store Forward modes. When value 10011100 that means threshold points 384, 1024) error packets.
AGE
xxxxxxxx 00000001b
00000000 00000000b
ACTTH
xxxxxxxx 01001001b
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification Status Control Registers
There channels access status registers, from interface SMIO serial interface.
Add.
Label
OVERFLW
Descriptions
Counter Over flow Indicator. Each maps counter indicate whether overflow not. This read-only register. RXDropEvt1 RXOctets1 RXPkts1 CrcAlgEr1 UndersizePkt1 OversizePkt1 CollPkt1 RXDropEvt0 RXOctets0 RXPkts0 CrcAlgEr0 UndersizePkt0 OversizePkt0 CollPkt0 Data Area MDIO. Before MDIO Write command starts, written value should loaded into this register Serial Management Interface controller. After MDIO Read command completed, read value loaded into this register. Command Area Auto-Negotiation Registers. Command Completed flag. command Auto-Negotiation registers completed. This SMIO controller cleared Gemini when instruction completed. SMIO controller issued command AutoNegotiation Registers accessing Gemini. Port number indication. Mean that command targeted port port defined 00001b. application, external address should relevant 00001b. Mean that command targeted port port defined 00010b. application, external address should relevant number 00010b. Read Write Instruction Mean Read instruction Mean Write instruction Register Address which SMIO controller want access. word Address being accessed. Read/Write Command, highest Address being accessed, Write Command Port FIFO. Software Reset, when this written with Gemini will reset. cleared after reset done. After software resets, ports Gemini will initiated except configuration registers. highest address which SMIO controller wants read. Mode selection Mean idle Mean waiting Packet
Default
0000000x 0000000xb
MDIODATA
0000h
MDIOCMD
xx00h
RAMADDL RAMADDH
0000h 0xxxxxx0 xxx00000b
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
Mean Transmit Packet Mean testing. Read/Write selection when testing mode selected (See above 4,3). Read Write Port0 port selection when Transmit Packet mode selected (See above 4,3). Port0 target port packet transmitting. Port1 target port packet transmitting. Start Packet Indicator when Transmit Packet (FIFO writing) mode selected (See above 4,3). Cleared Gemini when Gemini starts packet transmitting. SMIO, this written data starting next packet. Handshaking when waiting Packet (FIFO reading) mode selected. Cleared Gemini when completed operation situation finishing current packet reading (bit SMIO, current packet reading done Command handshaking when external accessed. Cleared Gemini, means accessing completed Gemini. This SMIO controller cleared Gemini when read written) data from/to RAMDATAH RAMDATAL registers. SMIO, means SMIO controller issued reading writing) command Gemini. address should been loaded into RAMADDL RAMADDH. lower word data which SMIO controller wants read write. This also store Port FIFO lower word data. higher word data which SMIO controller wants read write. This also store Port FIFO higher word data. Speed-mode status Port Port 100Mbps mode Port 10Mbps mode Duplex-mode status Port Port Half Duplex mode Port Full Duplex mode Flow Control Selection status Port Port Disable status Flow Control mode Port Enable status Flow Control mode Speed-mode status Port Port 100Mbps mode means Port 10Mbps mode Duplex-mode status Port means Port Half Duplex mode means Port Full Duplex mode Flow Control Selection status Port means Port Disable status Flow Control mode means Port Enable status Flow Control mode System Time Stamp Packet Aging function reference. Default value Increase every second lasting. External Test Status. Gemini completed external Test. Gemini doing external Test now. This will asserted after power-on test external. this keeps high state Industrial Road, SBIP, HsinChu Version 0.70
RAMDATAL RAMDATAH STATUS
0000h 0000h x000x000 0000x000b
ADMtek Incorporated 98/07/22
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
that means there some errors test. Indicate Occupied situation Transmit FIFO from port Port occupied occupied Indicate Occupied situation Transmit FIFO from port from Port occupied occupied Port Read Pointer from Port Output Queue Port Input Queue Port Write Pointer from Port Output Queue Port Input Queue Port Read Pointer from Port Output Queue Port Input Queue Port Write Pointer from Port Output Queue Port Input Queue Port Read Pointer from Port Output Queue Port Input Queue Port Write Pointer from Port Output Queue Port Input Queue Port Read Pointer from Port Output Queue Port Input Queue Port Write Pointer from Port Output Queue Port Input Queue Port Read Pointer from Port Output Queue Port Input Queue Port Write Pointer from Port Output Queue Port Input Queue Port Read Pointer from Port Output Queue Port Input Queue Port Write Pointer from Port Output Queue Port Input Queue
IQABRPTR IQABWPTR IQACRPTR IQACWPTR IQBARPTR IQBAWPTR IQBCRPTR IQBCWPTR IQCARPTR IQCAWPTR IQCBRPTR IQCBWPTR
xxxxh xxxxh xxxxh xxxxh xxxxh xxxxh xxxxh xxxxh xxxxh xxxxh xxxxh xxxxh
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification Statistic Counters
parallel have only data width, reading certain register (word format), user should firstly read byte then following HIGH byte. There channels access counters, from interface SMIO serial interface. statistic counters read only cleared after read. recall from EEPROM. This only uses spanning tree algorithm write from EEPROM required initially.
Add.
Label
RXDropEvt0 RXOctets0A RXOctets0B RXPkts0 RXBRDPkts0 CRCALGER0
Descriptions
amount events which packets dropped port lack buffers. total number low-word data, including packets, received network from port number includes octets excludes framing bits. amount upper words from port total number received packets from port including packets, broadcast packets, multicast packets. total number received good broadcast packets from port including multicast unicast packets. total number received packets from port with length between 1518/1522 bytes, including octets, framing bits. Both with byte aligned without byte aligned counted. total number received packets from port less than octets long, including octets, framing bits, without error. total number received packets from port that longer than 1518 1522 octets, including octets, framing bits. count care result CRC. total number Collision packets from port total number Forwarding packets from port total number port Filtering packets amount events which packets dropped port lack buffers. total number low-word octet data, including packets, received network from port number includes octets excludes framing bits. amount high word octets from port total number received packets from port including packets, broadcast packets, multicast packets. total number received good packets from port 1which directed broadcast address. This does include multicast unicast packets. total number received packets from port with length between 1518/1522 bytes, including octets, framing bits. with byte aligned without byte aligned counted. total number received packets from port that less than octets long, including octets, framing bits, without error. total number received packets from port that longer than 1518/1522 octets long, including octets, framing bits. count result CRC. total number collision packets from port total number Forwarding packets from port total number Filtering packets from port byte port Address byte port Address byte port Address. Industrial Road, SBIP, HsinChu Version 0.70
Default
0000h 0000h 0000h 0000h 0000h 0000h
UndersizePkt0 OversizePkt0
0000h 0000h
CollPkt0 ForwardPkt0 FilterPkt0 RXDropEvt1 RXOctets1A RXOctets1B RXPkts1 RXBRDPkts1 CRCALGER1
0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h
UndersizePkt1 OversizePkt1
0000h 0000h
CollPkt1 ForwardPkt1 FilterPkt1 P0ID1-ID0 P0ID3-ID2 P0ID5-ID4
0000h 0000h 0000h 0000h 0000h 0000h
ADMtek Incorporated 98/07/22
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
address Port automatically defined Address Port (from P0ID5)
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification Function Description
Reset Restart
When Gemini power Gemini initially goes SRAM self-test mode. will generate pattern evaluate SRAM status. success, LEDs supported Gemini normal. Otherwise, Gemini LEDs
Port Interface 10/100Mbps Interface
Gemini provides interfaces without glue logic directly connect Reverse interface. AL962 capable result full auto-negotiation from automatically adjust speed itself. port forced operate certain mode controlled registers. Data paths each transmission reception 4-bit width. Transfer clock rate 10Mbps 2.5MHz 100Mbps 25MHz. clock inputs driven determinate auto-negotiation. Each interface compliant IEEE 802.3 standard following characteristics. able support both 10Mbps 100Mbps either half full duplex mode Data delimiters synchronous clock reference MDC/MDIO management interface Driving capability with limited length shield cable basic descriptions listed below. Carrier sense Indicate activity cable, either incoming outgoing. Driven transceiver. Collision half-duplex transceivers, indicate simultaneous transmission reception. Full-duplex transceivers never activate this signal. Driven transceiver. enable switch while transmitting. clock 25MHz 100Base-T. Driven transceiver. continuously. data 4-bit width data path while packet transmitting. clock 25MHz 100base-T. Driven transceiver. continuously. data valid: transceiver while receiving valid packet. presence carrier sense, data valid, indicates reception broken packet headers, probably wiring broken transceiver. data 4-bit data path while receiving packet MDC, MDIO Serial management interface. host drives MDIO operation bi-directional. Every incorporates simple, two-wire serial control bus, called management interface. Using management interface, adapter card gather status from transceiver, also control transceiver. management interface consists MDIO wires connector. 10Mbps Interface interfaces connect 10Mbps UTP, BNC, transceivers. Data path each transmission reception uses single bit, formed like data, transfer clock rate 10MHz. Collision Detect receives from transceiver collision detected from cable. Carrier Sense notifies Gemini current activity network. pins same conf gurat conf gurat egisters, CONFIG2, define interface between Gemini transceivers/PHYceiver.
10/100Mbps Reserved Interface
Each port Gemini also supports Reversed interfaces. only features similar MII, also assignment same. system design level, MII, RMII, interface chosen configuration pins, 135/ 116/117.
Media Access Control
AL962 implement functions IEEE 802.3 protocol such frame formatting, collision handling, etc. Gemini generates 56-bit preamble Start Frame delimiter while packet sending. half duplex mode, listening before transmitting prevent traffic jam. collision, packet will delay random time and, then, retransmit.
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
Automatic Address Learning, Forwarding, Filtering Function Address Resolution Table
architecture address lookup table listed below. size depends SRAM buffer. case 128kB buffer, address look table includes memory space from address 0000h 2000h. address table takes memory from 0000h 4000h other sizes buffers.
Address
Reserved
Reserved
Fig. Content Address Lookup Table MACaddress Source Address nati esti ddress Packet eser Source port number equal port when Source port number equal port when Aging status invalid (The record free called empty record) Reserved Aging status valid record established Aging status valid record established before Static set, record erased aging timer)
Address Recognition
entry hashing table calculated 32-bit polynomial, called hashing function, address, called input data. optional hashing functions extracted from different bits setting Config0. Each Destination Address, passes through hashing function gets 12-bit entry point SRAM. record empty, packet broadcast, treated unknown frame. Otherwise, record read, then address storage from current packet compared. addresses same, port number decided, packet forward assigned port. address collision occurred, incoming packet unknown packet also. address table adopted 2-layer scheme which records have same address entries allows address collision once. each comparison records read time. Address recognition learning process more efficient than layer entry table. broadcast packet will pass through other port without address recognition.
Learning Process
Address learning process composed packets hashing function described before. Each incoming packet will check whether packet errorless content entry address SRAM occupied. positive, packet will compare with address port number. both fields same information packet, aging time revised. same address with different port number, port number reassigned. When entries both layers collided, address lookup table will rewrite one. Otherwise, address port number incoming packet will entries empty record. following diagram describes general operations address learning recognition. [0.11] Address Entry Point
AAA-1 AAA+1 Address Lookup Table
Hashing Function
Fig. Address Learning Recognition
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
Aging Time
Gemini automatically examine status address lookup table. round robin speed, checking timer, depends aging time. normal, Gemini aging time configurable with every seconds unit fast aging time seconds. Aging time also enable disable depending system requirement. When enabled, this guaranty requiring free spaces released from occupied address entries. static record marked, information this record will erased.
Forwarding Scheme
Packet forwarding pretty simple. Each determined outgoing packet buffer incoming port directly sent assigned port. forwarding scheme broadcast unknown packets similar above.
Buffer Management Queues
Gemini buffering management divides 1.5k, 1536 bytes, memory store packet. buffer size each port decided Ethernet speed. both ports 10Mbps, 100Mbps, full-duplex operation, buffer allocation rate each port one. ports operate 10Mbps-to-100Mbps transmission half-duplex mode, buffer allocation rate vice vesa. This assumes speed port more storage incoming packets. following table described detail buffer locations.
Buffer Allocation 10Mbps, 100Mbps, Full-duplex mode ports with Disable
SRAM Size Lookup Table Maximum Number Packets Port Maximum Number Packets Port 128K Entries 256K Entries 512K Entries
Buffer Allocation 10Mbps, 100Mbps, Half-duplex mode with Disable
SRAM Size Lookup Table Maximum Number Packets 10Mbps Port Maximum Number Packets 100Mbps Port 128K Entries 256K Entries 512K Entries
Buffer Allocation 10Mbps, 100Mbps, Full-duplex mode with Enable
SRAM Size 128K 256K 512K Lookup Table Entries Entries Entries Maximum Number Packets Port 24/28 52/56/60 137/141/145 Maximum Number Packets Port 24/28 52/56/60 137/141/145 Maximum Number Packets Port 6/4/2 6/4/2 Remark Spanning Tree Algorithm enabled, buffer size configurable. defined Config0 register.
Buffer Allocation 10Mbps, 100Mbps, Half-duplex mode with Enable
SRAM Size 128K 256K 512K Lookup Table Entries Entries Entries Maximum Number Packets 10Mbps 43/50 94/101/108 249/256/263 Maximum Number Packets 100Mbps 10/11/12 25/26/27 Maximum Number Packets Port 6/4/2 6/4/2 Remark Spanning Tree Algorithm enabled, buffer size configurable. defined Config0 register. system application, port speed randomly changed, Gemini will reset reallocating buffer space each port. Gemini also provides five internal registers each port. following diagram basic concept Gemini memory management.
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
Start Address Read Point Packet Counter Write Point
Address
Fig. Port Buffer Management Gemini uses five registers control port buffer status. Start Address beginning point memory address each port Address point last entry. These registers determined when Gemini reset. Read/Write Points dynamically changed depending current outgoing incoming packets storage. Packet Counter equal maximum number packets where stored, packet full. other hand, when packet equal zero, buffer empty.
Backpressure 802.3x Flow Control
half duplex operation, Gemini supports backpressure feature. When buffer full, packet 802.3x control frame sent connected segment, which called backpressure. Gemini implements Alternative backpressure following conditions occurs. Packets number over thirds that buffer. Gemini will sequentially accept only every incoming packets. buffer full, packet transmitted regardless routing decision. Full duplex flow control, Gemini follows IEEE 802.3x standard. delay time PAUSE frame zero maximum value. feature allows Gemini handle remote side PAUSE frame. followings thresholds when PAUSE frames invoked. packet number buffer greater than equal blocks free blocks buffer left PAUSE frame with maximum delay time sent. free blocks buffer reach remote side pause status released. During system power forced backpressure mode changed, Gemini will reset. Rearrange buffer allocation necessary.
Auto-negotation Forced Full-duplex Operations
When MDC/MDIO pins communicate with transceivers, Gemini selected half full duplex mode independently. Otherwise, Gemini result auto-negotiation from PHYceiver adjust itself speed. force full duplex mode set, Gemini will operation full duplex operations PHYceivers must same operation. Forced Flow Control AL962 depends result auto-negotiation forced Full-duplex settings take backpressure 802.3x flow control mechanism. forced full duplex mode changed during system operation, Gemini will restarted, auto-negotiation response from transceiver.
Inter-Frame
idle time between continuous packets from same port. default value 10Mbps 9.6uSec 0.96usec 100Mbps.
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification Serial Management Interface(SMC, SMIO, MDIO pins)
Host
MDIO
Gemini
SMIO MDIO
ID=01
MDIO
Fig. specific application Serial Management Interface There three pins Serial Management Interface Gemini. SMC, Serial Management Clock, input pin. functions like MDC, Management Data Clock, interface device. SMIO bi-direction pin. functions like MDIO interface device. MDIO also multi-function pin. frame format Serial Management interface shown below table.
Command
Read Write
Serial Management Frame Format PHYAD REGAD
RRRRR RRRRR
DATA
IDLE
AAAAA AAAAA Preamble Operator REGAD Register Address
DDDDDDDDDDDDDDDD DDDDDDDDDDDDDDDD Start bits PHYAD address Turn Around
Initially, Gemini accepts number preamble field being from SMIO. After pins MM0~2 here into Gemin port ovidi transparent path between Host PHY. transparent path access directly with PHYAD 0001b except REGAD equal 11000b 11001b. When Host accesses Gemini with PHYAD 00001b REGAD 11000b, DATA field frame defined Gemini register address which allows Host access. SMIO Register Address: 0x18h
Name
Unused Access Type Register Address selected Gemini
Bits
15~9
Access
Description
indicates write access Gemini indicates read access Gemini Indicates selected register address Gemini
When Host accesses Gemini with PHYAD 00001b REGAD 11001b, DATA field this frame defined data field previous control frame (PHYAD 00001b REGAD 11000). previous control frame read command, Host will read specified register content. Otherwise, Host will provide value written into register through register address 11001b. Note: matter what kind access type applied, field Control Frame Data Frame (signal output from external serial management device) should read operat register 0x18h. This design prevents transparent write operation from abnormal settings.
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
SMIO Register Address: 0x19h
Bits
15:0
Name
Data
Access
Integer
Description
Data read from Gemini, write into Gemini.
field allows bi-direction access read/write operations length DATA field bits long. IDLE field used delay which treats frame delimiter.
Interface
Gemini supports 80186 interface. multiplex data address 8-bit width data operates bi-direction. ALE, Address Latch Enable, presented when address access used. Data information transferred during data phase cycle. M/IO indicates access method, either mapping memory accessing. INT# directly connected 80186. When interrupt occurs, input will cause vector specified routine. CPURD# means accessed memory driving data information onto data CPUWR# stands data available.
Spanning Tree Algorithm
Gemini well assistance provides required hardware executed software Spanning Tree Algorithm. CONFIG0 determine buffer allocation Enable/Disable functions. Switch stored EEPROM compulsory CONFIG0 should enable requires implement. BPDU, Bridge Protocol Data Units, packets passed through learning, filtering forwarding schemes. Detail operations please refer IEEE 802.1d.
Network Management
Network management function Gemini provides list statistics counters. These information expressed working status each port below. Packet Dropped buffer full Received byte number packets Received packet number Received broadcasting packet number Forwarding packet number Filtering packet number Alignment error counter Oversize packet counter Collision counter
Interface
Gemini directly supports four rating LEDs without glue logics, like utilization, forwarding, filtering collision. pins mode selection dynamically change showing display. This smart display easiest current traffic wires.
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification EEPROM Content
content EEPROM similar Configuration registers. following table shows offset relation EEPROM Configuration registers.
EEPROM Configuration Register EEPROM Configuration Register
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification Absolute Maximum Ratings
Supply Voltage(Vcc) Input Voltage Output Voltage Storage Temperature Ambient Temperature Protection -0.5 -0.5 -0.5 C(-85F 302F) 70C(32F 158F) 2000V
Specifications
Parameter
Cinp Lpinp
Description
Condition
4.75 -0.5
Typical
5.25
Units
Supply Voltage Power Supply Input Voltage Input HIGH Voltage Input Leakage Current Input HIGH Leakage Current 2.0V Output Voltage Iout =3mA/6mA Output HIGH Voltage Iout =-2mA Input Capacitance Inductance
Specifications
SRAM Read Timing
CE[1:
[15:
[31:
Parameter
Description
CE/OE address valid address cycle time address ready read data ready CE/OE deasserted address deasserted
Condition
Typical
Units
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
SRAM Write Timing
CE[1:
[15:
[31:
Parameter
Description
data valid write write pulse width address hold from write data hold from write
Condition
Typical
Units
Parallel Read Timing
Parameter
Description
Address/MIO valid falling Address/MIO hold from falling CPURD pulse width CPURD asserted data valid Data hold from CPURD
Condition
Typical
Units
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
Parallel Write Timing
Parameter
Description
CPUWR pulse width CPUWR asserted data valid data hold from CPURD
Condition
Typical
Units
EEPROM Timing
EECK
EECS
Parameter
Description
Condition
Clock 33MHz Clock 33MHz
Typical
Units
EECS/EEDI delay from falling EECK idle time EECS Clock 33MHz EEDO valid before rising EECK EEDO hold after rising EECK
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Gemini Specification
Transmit Receive Timing
TXCLK
TXEN
RXCLK
RXDV
962)
Parameter
Description
Condition
Typical
Units
TXEN/TXD delay from rising TXCLK RXDV/RXD valid before rising RXCLK RXDV/RXD hold from rising RXCLK pulse width Clock 33MHz MDIO delay from rising MDIO valid before rising MDIO hold after rising
ADMtek Incorporated 98/07/22
Industrial Road, SBIP, HsinChu Version 0.70
(03)578-8879 (03)578-8871
ADMtek Incorporated Confidential
Other recent searches
IN08048 - IN08048 IN08048 Datasheet
D815EFV - D815EFV D815EFV Datasheet
D815EPFV - D815EPFV D815EPFV Datasheet
CM250S - CM250S CM250S Datasheet
74THC2400 - 74THC2400 74THC2400 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
