Kbit (8Kb Parallel EEPROM FAST ACCESS TIME: 150ns SINGLE SUPPLY V
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M28C64C M28C64X
Kbit (8Kb Parallel EEPROM
FAST ACCESS TIME: 150ns SINGLE SUPPLY VOLTAGE POWER CONSUMPTION FAST WRITE CYCLE Bytes Page Write Operation Byte Page Write Cycle: ENHANCED WRITE DETECTION Ready/Busy Open Drain Output (for M28C64C product only) Data Polling Toggle PAGE LOAD TIMER STATUS HIGH RELIABILITY SINGLE POLYSILICON, CMOS TECHNOLOGY Endurance >100,000 Erase/Write Cycles Data Retention Years JEDEC APPROVED BYTEWIDE DESCRIPTION M28C64C Kbit power Parallel EEPROM fabricated with STMicroelectronics proprietary single polysilicon CMOS technology. device offers fast access time with power dissipation requires power supply. circuit been designed offer flexible microcontroller interface featuring both hardware software handshakingmode with Ready/Busy, Data Polling Toggle Bit. M28C64C supports byte page write operation. Table Signal Names
Address Input Data Input Output Write Enable Chip Enable Output Enable Ready Busy Supply Voltage Ground
PDIP28
PLCC32
SO28 (MS) mils
TSOP28 x13.4mm
Figure Logic Diagram
A0-A12
DQ0-DQ7
M28C64C
AI00746B
February 1999
1/15
M28C64C, M28C64X
Figure Connections Figure Connections
AI00747C
AI00748D
M28C64C
AI01016D
Warning: Don't Use.
Warning: Connected, Don't Use.
Figure Connections
Figure TSOP Connections
M28C64C
M28C64C
M28C64C
AI00876C
Warning: Don't Use.
Warning: Don't Use.
DESCRITPION Addresses (A0-A12). address inputs select 8-bit memory location during read write operation.
Chip Enable (E). chip enable input must enable read/write operations. When Chip Enable high, power consumption reduced. Output Enable (G). Output Enable input controls data output buffers used initiate read operations.
2/15
M28C64C, M28C64X
Table Absolute Maximum Ratings
Symbol VESD Parameter Ambient Operating Temperature Storage Temperature Range Supply Voltage Input/Output Voltage Input Voltage Electrostatic Discharge Voltage (Human Body model) Value +0.6 2000 Unit
Note: Except rating "Operating Temperature Range", stresses above those listed Table "Absolute Maximum Ratings" cause permanent damage device. These stress ratings only operation device these other conditions above those indicated Operating sections this specification implied. Exposure Absolute Maximum Rating conditions extended periods affect device reliability. Refer also STMicroelectronics SURE Program other relevant quality documents.
Table Operating Modes
Mode Read Write Standby Write Inhibit Write Inhibit Write Inhibit Output Disable
Note:
Data Data Hi-Z Data Hi-Z Data Hi-Z Hi-Z
Data (DQ0 DQ7). Data written read from M28C64C through pins. Write Enable (W). Write Enable input controls writing data M28C64C. Ready/Busy (RB). Ready/Busy open drain output that used detect internal write cycle. OPERATION order prevent data corruption inadvertent write operations during power-up, Power Reset (POR) circuit resets internal programming cicuitry. Access memory write mode allowed after power-up specified Table Read M28C64C accessed like static RAM. When with high, data addressed presented pins. pins high impedancewhen either high.
Write Write operations initiated when both high.The M28C64C supports both controlled write cycles. Address latched falling edge which ever occurs last Data rising edge which ever occurs first. Once initiated write operation internally timed until completion. Page Write Page write allows bytes consecutively latched into memory prior initiating programming cycle. bytes must located single page address, that must same bytes. page write initiated during byte write operation. Following first byte write instruction host send another address data maximum 100µs after rising edge which ever occurs first BLC). transition detected within 100µs, internal programming cycle will start.
3/15
M28C64C, M28C64X
Figure Block Diagram
RESET
CONTROL LOGIC
DECODE
A5-A12 (Page Address)
ADDRESS LATCH
ARRAY
A0-A4
ADDRESS LATCH
DECODE
SENSE DATA LATCH
BUFFERS
PAGE LOAD TIMER STATUS TOGGLE DATA POLLING
AI00877C
DQ0-DQ7
Microcontroller Control Interface M28C64C provides write operation status bits status that used minimize system write cycle. These signals available port bits memory during programming cycle only, signal separate pin. Figure Status Assignment
PLTS Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z
Data Polling Toggle PLTS Page Load Timer Status
Data Polling (DQ7). During internal write cycle, attempt read last byte written will produce complementary value previously latched bit. Once write cycle finished true logic value appears read cycle.
4/15
Toggle (DQ6). M28C64C offers another determining when internal write cycle completed. Duringthe internal Erase/Write cycle, will toggle from (the first read value "0") subsequent attempts read address memory. When internal cycle completed toggling will stop device will accessible Read Write operation. Page Load Timer Status (DQ5). Page Write mode data latched 100µs after previous byte. bytes input. Data output (DQ5) indicates status internal Page Load Timer. read asserting Output Enable (tPLTS). indicates timer running, High indicates time-out after which write cycle will start data input. Ready/Busy pin. provides signal open drain output which during erase/write cycle, which released completion programming cycle.
M28C64C, M28C64X
Table Measurement Conditions
Input Rise Fall Times Input Pulse Voltages Input Output Timing Ref. Voltages 20ns 0.4V 2.4V 0.8V 2.0V
1N914
Figure Testing Equivalent Load Circuit
1.3V
Note that Output Hi-Z defined point where data longer driven.
3.3k
Figure Testing Input Output Waveforms
2.4V
DEVICE UNDER TEST 30pF
2.0V 0.8V
AI00826
0.4V
includes capacitance
AI01129
Table Capacitance
Symbol Parameter Input Capacitance Output Capacitance Test Condition VOUT Unit
Note: Sampled only, 100% tested.
Table Read Mode Characteristics 70°C 85°C, 4.5V 5.5V)
Symbol ICC1 ICC2
Parameter Input Leakage Current Output Leakage Current Supply Current (TTL CMOS inputs) Supply Current (Standby) Supply Current (Standby) CMOS Input Voltage Input High Voltage Output Voltage Output High Voltage
Test Condition VIL, -0.3V
Unit
-400
+0.5
Note: I/O's open circuit.
Table Power Timing 70°C 85°C, 4.5V 5.5V)
Symbol tPUR tPUW Parameter Time Delay Read Operation Time Delay Write Operation Unit
Note: Sampled only, 100% tested.
5/15
M28C64C, M28C64X
Table Read Mode Characteristics 70°C 85°C, 4.5V 5.5V)
M28C64C Symbol Parameter Test Condition -150 tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX tACC Address Valid Output Valid Chip Enable Output Valid Output Enable Output Valid Chip Enable High Output Hi-Z Output Enable High Output Hi-Z Address Transition Output Transition VIL, VIL, -200 -250 Unit
Note: Output Hi-Z defined point which data longer driven.
Figure Read Mode Waveforms
A0-A12 tAVQV tGLQV tELQV DQ0-DQ7
VALID tAXQX
tEHQZ
tGHQZ DATA Hi-Z
AI00749B
Note: Write Enable High
6/15
M28C64C, M28C64X
Table Write Mode Characteristics 70°C 85°C, 4.5V 5.5V)
Symbol tAVWL tAVEL tELWL tGHWL tGHEL tWLEL tWLAX tELAX tWLDV tELDV tWLWH tELEH tWHEH tWHGL tEHGL tEHWH tWHDX tEHDX tWHWL tWHWH tWHRH tWHRL tEHRL tDVWH tDVEH tCES tOES tOES tWES tCEH tOEH tOEH tWEH tWPH tBLC Parameter Address Valid Write Enable Address Valid Chip Enable Chip Enable Write Enable Output Enable High Write Enable Output Enable High Chip Enable Write Enable Chip Enable Write Enable Address Transition Chip Enable Address Transition Write Enable Input Valid Chip Enable Input Valid Write Enable Write Enable High Chip Enable Chip Enable High Write Enable High Chip Enable High Write Enable High Output Enable Chip Enable High Output Enable Chip Enable High Write Enable High Write Enable High Input Transition Chip Enable High Input Transition Write Enable High Write Enable Byte Load Repeat Cycle Time Write Cycle Time Write Enable High Ready/Busy Chip Enable High Ready/Busy Data Valid before Write Enable High Data Valid before Chip Enable High Note Note VIL, VIH, 0.35 Test Condition VIL, VIH, Unit
Note: With external pull-up resistor.
7/15
M28C64C, M28C64X
Figure Write Mode Waveforms Write Enable Controlled
A0-A12 tAVWL tELWL tGHWL
VALID tWLAX
tWHEH
tWLWH
tWHGL
tWLDV DQ0-DQ7 DATA tDVWH
tWHWL
tWHDX
tWHRL
AI00750
Figure Write Mode Waveforms Chip Enable Controlled
A0-A12 tAVEL tGHEL tWLEL
VALID tELAX
tELEH
tEHGL
tELDV DQ0-DQ7 DATA tDVEH tEHDX
tEHWH
tEHRL
AI00751
8/15
M28C64C, M28C64X
Figure Page Write Mode Waveforms Write Enable Controlled
A0-A12
Addr
Addr
Addr
Addr
tPLTS tWHWL tWLWH DQ0-DQ7 Byte Byte tWHWH Byte tWHWH Byte tWHRH
tWHRL
Byte
AI00752C
Figure Data Polling Waveform Sequence
A0-A12
Address last byte Page Write instruction
LAST WRITE
INTERNAL WRITE SEQUENCE
READY
AI00753C
9/15
M28C64C, M28C64X
Figure Toggle Waveform Sequence
A0-A12
LAST WRITE
TOGGLE INTERNAL WRITE SEQUENCE
READY
AI00754D
Note: First Toggle forced
ORDERING INFORMATION SCHEME
Example:
M28C64C
-150
Version available bonded (pin -150 -200 -250
Speed
Package PDIP28 PLCC32
Temperature Range
SO28 mils TSOP28 13.4mm
listof availableoptions (Speed, Package,etc. further information aspect this device, please contact STMicroelectronics Sales Office nearest you.
10/15
M28C64C, M28C64X
PDIP28 Plastic DIP, mils width
Symb 2.54 14.99 15.24 3.18 1.78 17.78 3.43 2.08 33.02 15.24 13.59 13.84 0.100 0.590 0.600 0.125 0.070 0.700 0.135 0.082 1.52 0.20 36.83 0.30 37.34 1.300 0.600 0.535 0.545 0.38 3.56 0.38 4.06 0.51 0.060 0.008 1.450 0.012 1.470 5.08 0.015 0.140 0.015 0.160 0.020 inches 0.200
PDIP
Drawing scale.
11/15
M28C64C, M28C64X
PLCC32 lead Plastic Leaded Chip Carrier, rectangular
Symb 0.89 1.27 2.54 1.52 0.33 0.66 12.32 11.35 9.91 14.86 13.89 12.45 0.00 0.10 3.56 2.41 0.38 0.53 0.81 12.57 11.56 10.92 15.11 14.10 13.46 0.25 0.035 0.050 inches 0.100 0.060 0.013 0.026 0.485 0.447 0.390 0.585 0.547 0.490 0.000 0.004 0.140 0.095 0.015 0.021 0.032 0.495 0.455 0.430 0.595 0.555 0.530 0.010
0.51 (.020)
D2/E2
1.14 (.045)
PLCC
Drawing scale.
12/15
M28C64C, M28C64X
SO28 lead Plastic Small Outline, mils body width
Symb 1.27 2.46 0.13 2.29 0.35 0.23 17.81 7.42 10.16 0.61 0.10 2.64 0.29 2.39 0.48 0.32 18.06 7.59 10.41 1.02 0.050 inches 0.097 0.005 0.090 0.014 0.009 0.701 0.292 0.400 0.024 0.004 0.104 0.011 0.094 0.019 0.013 0.711 0.299 0.410 0.040
SO-b
Drawing scale.
13/15
M28C64C, M28C64X
TSOP28 lead Plastic Thin Small Outline, 13.4mm
Symb 0.55 0.95 0.17 0.10 13.20 11.70 7.90 0.50 0.10 1.25 0.20 1.15 0.27 0.21 13.60 11.90 8.10 0.70 0.022 0.037 0.007 0.004 0.520 0.461 0.311 0.020 0.004 inches 0.049 0.008 0.045 0.011 0.008 0.535 0.469 0.319 0.028
TSOP-c
Drawing scale.
14/15
M28C64C, M28C64X
Information furnished believed accurate reliable. However, STMicroelectronics assumes responsibility consequences such information infringement patents other rights third parties which result from use. license granted implication otherwise under patent patent rights STMicroelectronics. Spec ifications mentioned this publication subject change without notice. This publication supersedes replaces information previously supplied. STMicroelectronics products authorized critical components life support devices systems without express written approval STMicroelectronics. logo registered trademark STMicroelectronics 1999 STMicroelectronics Rights Reserved other names property their respective owners STMicroelectronics GROUP COMPANIES Australia Brazil Canada China France Germany Italy Japan Korea Malaysia Malta Mexico Morocco Netherlands Singapore Spain Sweden Switzerland Taiwan Thailand United Kingdom U.S.A. http://www.st.com
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