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MAX3875 Evaluation MAX3875 evaluation kit) simplifies evaluation


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19-1418; 12/98
MAX3875 Evaluation
MAX3875 evaluation kit) simplifies evaluation MAX3875, 2.5Gbps clock-recovery data-retiming enables testing MAX3875 functions. connectors provided differential PECL-compatible data clock outputs, well system loopback functions. differential data clock outputs have attenuators on-board allow direct connection highspeed oscilloscope. MAX3875 comes configured +3.3V operation consumes approximately 220mA.
_Features
Connections System I/Os Test Point Monitoring Loss-of-Lock (LOL) Single +3.3V Power-Supply Operation Fully Assembled Tested
Evaluates: MAX3875
_Ordering Information
PART MAX3875EVKIT TEMP. RANGE -40°C +85°C PACKAGE TQFP
_Component List
DESIGNATION C5-C10, C13, C14, C15, C21-C26, C29, R11, R15, R12, R16, DESCRIPTION DESIGNATION R13, R17, 0.1µF, ceramic capacitors R10, R14, R18, R25, Open 1µF, ceramic capacitor 33µF, ±20%, tantalum capacitor 2.2µF, ceramic capacitor MAX3875EHJ (5mm 32-pin TQFP) 56nH inductors Coilcraft* 0805HS-560TKBC 392, resistor resistors resistors None None MAX3875 evaluation MAX3875 data sheet LOL, GND, +3.3V JP10 JP2, JP10 SDI+, SDI-, SLBI+, SLBI-, SCLKO+, SCLKO-, SDO+, SDOD1 DESCRIPTION 130, resistors 220, resistors 10k, resistors variable resistor Test points 2-pin header (0.1" centers) 3-pin header (0.1" centers) Shunts
Edge-mount connectors
Coilcraft: phone 847-639-6400, 847-639-1469
Maxim Integrated Products
free samples latest literature: http://www.maxim-ic.com, phone 1-800-998-8800. small orders, phone 1-800-835-8769.
MAX3875 Evaluation Evaluates: MAX3875
_Detailed Description
MAX3875 fully assembled factory tested. enables testing MAX3875 functions. tions monitored high-impedance test point. high (LED off) indicates frequency lock while (LED indicates loss-of-lock condition. Note that circuitry will detect loss-ofpower condition (refer MAX3875 data sheet).
Test Equipment Required
+3.3V power supply with 300mA current capability Signal-source, 2.5Gbps minimum capability Jitter analyzer capable 2.5Gbps performance Oscilloscope with least 3GHz performance
Layout Considerations
MAX3875's performance greatly affected circuit board layout design. good high-frequency design techniques, including minimizing ground inductances using fixed-impedance transmission lines data clock signals.
Connections
serial data inputs (SDI+, SDI-) have on-board ACcoupling capacitors. MAX3875 data clock outputs (SDO+, SDO-, SCLKO+, SCLKO-) terminated on-board with PECL, attenuators. Configured this way, these outputs directly connected inputs high-speed oscilloscope analysis.
SDO+ BIAS-T
Setup
Select either serial data inputs, pins JP10 (SDI EN), system loopback inputs, pins JP10 (SLBI EN), with jumper JP10. Verify that shunt across jumper place. Connect +3.3V power supply appropriate terminals marked apply power. Connect 2.5Gbps PRBS signal selected inputs with cables. Connect outputs high-speed oscilloscope. Jitter analysis product performance also observed appropriately interfacing with bit-error-rate tester (BERT) jitter analyzer.
MAX3875 EVKIT
SDOOUTPUT ATTENUATORS REMOVED SDO+ SCLKO+ SCLKO+
TESTER
BIAS-T
CLOCK
DATA
ERROR DETECTOR
SCLKO50
Interfacing with Test Equipment
jitter analyzers bit-error-rate testers easily interface with kit's PECL output signal levels. your test equipment requires standard levels, then bias tees required (Figure example, using BERT, must Remove data clock output attenuators those signal lines intend observe. example, intend observe SDO+, then open R10, short bias bias MAX3875's outputs. adjustment available MAX3875 kit. PHADJ R26, although required, used shift sampling edge recovered clock relative center data eye. sure remove jumper intend adjust PHADJ.) frequency lock condi-
Figure Interface Test Equipment
Table Jumpers Test Points
NAME TYPE 2-Pin DESCRIPTION Disables Phase Adjustment (R26) Used select between serial data input (labeled system loopback function (labeled SLBI MAX3875. Used monitor voltage level NORMAL POSITION Shorted (disabled)
JP10
3-Pin
Test Point
MAX3875 Evaluation Evaluates: MAX3875
56nH VCCPLL 0.1µF 0.1µF 0.1µF VCCVCO 0.1µF 0.1µF VCCOUT 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF 0.1µF
+3.3V 33µF 56nH 2.2µF 56nH
+3.3V PHASE DISABLE PHASE 0.1µF OPEN +3.3V SDO+ SDO24 +3.3V VCCOUT 0.1µF +3.3V VCCOUT VCCOUT 0.1µF VCCOUT 0.1µF SDO+
+3.3V
VCCPLL
FIL+
FIL-
PHADJ+
PHADJ-
0.1µF VCCPLL SDIC2 0.1µF VCCPLL VCCPLL SLBI JP10
SDI+ SDIVCC SLBI+ SLBIGND
SDO-
SDI+
MAX3875
SCLKO+ SCLKOVCC
SCLKO+
SCLKO-
+3.3V
VCCPLL
SLBI+ 0.1µF
0.1µF VCCVCO VCCPLL
SLBI-
0.1µF
Figure MAX3875 Schematic
MAX3875 Evaluation Evaluates: MAX3875
1.0"
Figure MAX3875 Component Placement Guide
1.0"
Figure MAX3875 Board Layout-Component Side
1.0"
Figure MAX3875 Board Layout-Solder Side
MAX3875 Evaluation Evaluates: MAX3875
1.0"
Figure MAX3875 Board Layout-Ground Plane
1.0"
Figure MAX3875 Board Layout-Power Plane
MAX3875 Evaluation Evaluates: MAX3875
NOTES
Maxim cannot assume responsibility circuitry other than circuitry entirely embodied Maxim product. circuit patent licenses implied. Maxim reserves right change circuitry specifications without notice time.
_Maxim Integrated Products, Gabriel Drive, Sunnyvale, 94086 408-737-7600 1998 Maxim Integrated Products Printed registered trademark Maxim Integrated Products.

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