Evaluation Board AD7730L Transducer EVAL-AD7730LEB Interfacing th

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Evaluation Board AD7730L Transducer EVAL-AD7730LEB Interfacing th

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FEATURES Operates from Single Supply On-Board Reference Digital Buffers Various Linking Options Direct Hook-Up Printer Port Software Control Data Analysis On-Board User Grid Area Expansion INTRODUCTION
Evaluation Board AD7730L Transducer EVAL-AD7730LEB
Interfacing this board provided either through 36-Way Centronics Connector through 9-way D-type connector. External sockets provided analog inputs, external reference input option external master clock option.
OPERATING AD7730L EVALUATION BOARD
This Technical Note describes evaluation board AD7730L, Transducer ADC. AD7730L complete analog front-end weigh-scale pressure measurement applications. device accepts low-level signals directly from transducer outputs serial digital word. part features buffered differential programmable gain analog inputs well differential reference input. on-chip 6-bit allows removal TARE voltages. Clock signals synchronizing excitation bridge also provided. Full data AD7730L available AD7730 data sheet available from Analog Devices should consulted conjunction with this Technical Note when using Evaluation Board. Included evaluation board, along with AD7730L, AD780, +2.5 ultra high precision bandgap reference, 2.4576MHz crystal digital buffers buffer signals from edge connectors.
evaluation board four power supply input pins: AVDD, AGND, DVDD DGND. AD7730L specified with AVDD +5V. Therefore, AVDD voltage supplied board must +5V. This AVDD voltage also used power AD780 reference. board from single supply, simply connect inputs together. Both AGND DGND inputs provided board. AGND connects AD7730L AGND also connects AD780. DGND connects DGND AD7730L digital chips board. AGND DGND planes connected AD7730L. Therefore, recommended connect AGND DGND elsewhere system avoid ground loop problems. When using single supply both AVDD DVDD only ground connection should made board. This connection should made board's AGND input terminal. Both supplies decoupled their respective ground plane with 10µF tantalum 0.1µF ceramic disc capacitors.
POWER SUPPLIES
FUNCTIONAL BLOCK DIAGRAM
AGND DGND 9-WAY D-TYPE CONNECTOR
AIN1(+) AIN1(-) AIN2(+)/D1 AIN2(-)/D0 AD780 REFERENCE AD7730 BUFFERS 36-WAY CENTRONICS CONNECTOR
MCLK
REV.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Analog Devices.
Technology Way, P.O. 9106, Norwood. 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
EVAL-AD7730LEB
Link Options
There number link options evaluation board which should required operating setup before using board. functions these link options described detail below.
Link Function
This option selects master clock option AD7730L. master clock source comes from on-board crystal from external clock source SKT11. This double link both links must moved together correct operation. With both links position external clock option selected externally applied clock routed MCLK AD7730L. With both links position on-board crystal selected provides master clock AD7730L.
This link option used determine whether AD7730L normal operating mode STANDBY (power-down) mode. With this link position STANDBY input AD7730L connected logic high thus configuring part normal operation. With this link position STANDBY input AD7730L connected logic AD7730L placed power-down mode where power dissipation typically 100µW.
This link option used select reference source AD7730L's IN(-) input. With this link position IN(-) AD7730L connected SKT10. external voltage connected SKT10 used IN(-). With this link position IN(-) AD7730L connected directly AGND.
This link controls polarity serial clock. With this link position AD7730L connected logic high. With this input high, first transition serial clock data transfer from high low. This link should position when operating with evaluation board software. With this link position AD7730L connected logic low. With this input low, first transition serial clock data transfer from high.
This link option used select reference source AD7730L's IN(+) input. With this link position AD7730L connected directly output on-board reference, AD780. With this link position AD7730L connected directly AVDD. With this link position IN(+) AD7730L connected SKT9. external voltage connected SKT9 used IN(+).
This link series with pin. With this link place, SKT5 provides signal from AD7730L. This link series with pin. With this link place, SKT6 provides signal from AD7730L. This link series with AIN2(+)/D1 pin. With this link place, SKT8 connected directly AIN2(+)/D1 pin. This link removed that analog input signal SKT8 connected component grid signal conditioning before being applied AIN2(+) input AD7730L.
This link series with AIN2(-)/D0 pin. With this link place, SKT7 connected directly AIN2(-)/D0 pin. This link removed that analog input signal SKT7 connected component grid signal conditioning before being applied AIN2(-) input AD7730L.
LK10
This link series with AIN1(+) analog input. With this link place, analog input SKT3 input connected directly AIN1(+) input part. This link removed that input signal SKT3 connected component grid signal conditioning before being applied AIN1(+) input AD7730L. REV.
EVAL-AD7730LEB
Link Options (Cont'd) Link Function
LK11
This link series with AIN1(-) analog input. With this link place, analog input SKT4 input connected directly AIN1(-) input part. This link removed that input signal SKT4 connected component grid signal conditioning before being applied AIN1(-) input AD7730L.
Setup Conditions
Table shows position which links when evaluation board sent out.
Table Initial Link Positions
Link
Position
Function. Both links position select on-board crystal oscillator master clock board. Normal Operating Mode. IN(-) connected directly AGND. AD7730L tied high. IN(+) connected AVDD connected SKT5. connected SKT6. SKT8 connected AIN2(+)/D1. SKT7 connected AIN2(-)/D0. SKT3 connected AIN1(+). SKT4 connected AIN1(-). DGND RESET SCLK
Figure SKT1 Configuration
LK10 LK11
Table SKT1 Designations
Serial Clock. signal this buffered before being applied SCLK AD7730L. Logic Output. This buffered version signal AD7730L's DRDY pin. Chip Select. signal this buffered before being applied AD7730L. Reset Input. signal this buffered before being applied RESET AD7730L. Serial Data Input. Data applied this buffered before being applied AD7730L's pin. Ground reference point digital circuitry. Connects DGND plane evaluation board. Serial Data Output. This buffered version signal AD7730L's DOUT pin. Digital Supply Voltage. DVDD voltage evaluation board supplied this provided voltage applied main DVDD terminal. Logic Input. signal this buffered before being applied SYNC AD7730L.
EVALUATION BOARD INTERFACING
Interfacing evaluation board either 9-way DType connector, SKT1, 36-way Centronics connector, SKT2. pinout SKT1 connector given Figure corresponding designations given Table pinout this SKT2 connector shown Figure designations given Table III. evaluation board should powered before cable connected either connectors. SKT2 used connect evaluation board printer port (parallel port) Connection between direct standard parallel printer port cable. SKT1 used connect evaluation board other system.
DOUT DVDD
SYNC
NOTE explanation AD7730L functions mentioned here given Table part SKT2 designations description.
REV.
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Figure SKT2 Configuration
Table III. SKT2 Designations
Connect. This connected evaluation board. Serial Data Input. Data applied this buffered before being applied AD7730L's pin. serial data applied written input shift register part. Data from this input shift register transferred on-chip registers depending register selection bits Communications Register. Reset Input. signal this buffered before being applied RESET AD7730L. RESET active input which resets control logic, interface logic, calibration coefficients, digital filter on-chip registers power-on status. Chip Select. signal this buffered before being applied AD7730L. active logic input used select AD7730L. With this input hard-wired low, AD7730L operates three-wire interface mode with SCLK, DOUT used interface device. used select device systems with more than device serial frame synchronisation signal communicating with AD7730L. Serial Clock. signal this buffered before being applied SCLK AD7730L. external serial clock applied this input access serial data from AD7730L. This serial clock continuous clock with data transmitted continuous train pulses. Alternatively, noncontinuous clock with information being transmitted AD7730L smaller batches data. Logic Input. signal this buffered before being applied SYNC AD7730L. SYNC input allows synchronisation digital filters analog modulators across number AD7730Ls. While SYNC low, nodes digital filter, filter control logic, calibration control logic reset analog modulator also held reset state. Connect. These pins connected evaluation board. Digital Supply Voltage. This provides supply voltage IC4, buffer chip which buffers output signals from AD7730L before they applied SKT2. Logic output. This buffered version signal AD7730L's pin. used status output both conversion calibration mode. conversion mode, logic output indicates that output word available from AD7730L data register. will return high upon completion read operation full output word. data read taken place after output update, line will return high prior next output update, remain high while update taking place return again. This gives indication when read operation should initiated avoid reading from data register being updated. calibration mode, goes high when calibration initiated returns indicate that calibration complete. Connect. These pins connected evaluation board. Serial Data Output. This buffered version signal AD7730L's DOUT pin. Serial data from output shift register part clocked this pin. This output shift register contains information from nine on-chip registers depending register selection bits Communications Register. Connect. These pins connected evaluation board. Ground reference point digital circuitry. Connects DGND plane evaluation board. Connect. These pins connected evaluation board.
RESET
SCLK
SYNC
DVDD
11-12
DOUT
14-18 19-30 31-36
DGND
REV.
EVAL-AD7730LEB
SOCKETS
There eleven sockets AD7730L evaluation board. function these sockets outlined Table
Table Socket Functions Socket Function
RUNNING AD7730L INTERFACE SOFTWARE
Included evaluation board package PC-compatible disk which contains software controlling evaluating performance AD7730L using printer port There total thirteen files distribution disk. software, user must have IBM-compatible Windows must installed. Start Windows and, using either command File Manager, start program called SETUP.EXE distribution disk. This automatically installs application sets window called ANALOG DEVICES. application ICON found here. start application, double click ICON. When program starts, user asked select printer port. correct selection depends what type computer being used (Desktop, Laptop etc). LPT1 works most machines. When using Compaq laptop, select PRN. different port selected time from MAIN MENU. After selecting printer port, program displays Main Menu outlined Figure There number buttons Main Menu which select variety different functions. These described below.
Program AD7730L
SKT1 SKT2
9-Way D-Type Connector which used digital interfacing evaluation board. 36-Way Centronics Connector which used digital interfacing evaluation board. This connector should used when connecting board parallel printer port evaluation software. Sub-Minature (SMB) Connector. analog input signal AIN1(+) input AD7730L applied this socket. Sub-Minature (SMB) Connector. analog input signal AIN1(-) input AD7730L applied this socket. Sub-Minature (SMB) Connector. This socket provides ouput from AD7730L. Sub-Minature (SMB) Connector. This socket provides ouput from AD7730L. Sub-Minature (SMB) Connector. Connects AIN2(-)/D0 AD7730L. Sub-Minature (SMB) Connector. Connects AIN2(+)/D1 AD7730L. Sub-Minature (SMB) Connector. reference voltage IN(+) input AD7730L applied this socket when board configured externally-applied reference voltage. Sub-Minature (SMB) Connector. reference voltage IN(-) input AD7730L applied this socket when board configured externally-applied reference voltage. Sub-Minature (SMB) Connector. master clock signal MCLK input AD7730L applied this socket when board configured externally-applied master clock.
SKT3
SKT4
SKT5 SKT6 SKT7 SKT8 SKT9
Pressing this button calls second screen which displays contents Status Register provides another buttons allowing user program on-chip registers. Figure shows "Program AD7730L" screen. Pressing buttons this screen pulls further screen allowing functions register programmed. Figure gives example these screens (the screen programming Mode Register).
Read
SKT10
Read Data button allows user access "read data" screen. this screen, user choose whether reading data noise analysis simply display. also allows user choose many outputs AD7730L should read noise analysis routines.
Noise Analysis
SKT11
Noise Analysis button gives user access "noise analysis" screen. Here user look results data read terms code distribution, code spread etc. user also facility plot data versus time plot histogram results. Pressing this button allows user where either hardware reset (via software/interface reset (via writing user also hardware reset
Reset AD7730L
access reset menu RESET pin) 1's) selected. button board.
REV.
EVAL-AD7730LEB
Fast Step Demo
This button activates Fast Step demonstration screen. This screen allows user view compare FastStep response AD7730L against it's normal response.
Read from File
This button allows user store output data from AD7730L file either decimal hexadecimal format. This data used other programs subsequently read back AD7730L software.
Select Printer Port
Pressing this button allows user read data from file noise analysis. data read either decimal hexadecimal format.
Write File
This button allows user select printer port which AD7730L evaluation connected.
About
This provides details software revision.
Figure Main Screen
REV.
EVAL-AD7730LEB
Figure Program Screen
Figure Mode Register Screen
REV.
EVAL-AD7730LEB
Figure AD7730L Evaluation Board Circuit Diagram
REV.
EVAL-AD7730LEB
COMPONENT LISTING MANUFACTURERS Intergrated Circuits Component Location Vendor
AD7730LR AD780AN 74HC4050N 74C08N 74HC244N 5082-2810
Capacitors Component
Analog Devices Analog Devices Philips Texas Instruments Texas Instruments Hewlett Packard
Location
Vendor
10µF Tantalum 0.1µF Ceramic(X7R ±20%) Open Circuit 33pF Ceramic
Resistors Component
AVX- Kyocera, Mftrs TAG106MO16 Philips, Mftrs CW20C 104M -Philips, Mftrs 34339
Location
Vendor
Short Circuits 0.25W 10k±5% 0.25W 1M±5% 0.25W
Link Options, Switches Sockets Component
-Bourns 0.25W Bourns Bourns
Location
Vendor
Headers
(4x2 way) Harwin, Mftrs M20-9993606 way) (3x2 way) Lk10 Lk11 (1x2 way) Harwin, Mftrs M7571-05 Omron, Mftrs B3F1000 Sealectro, Mftrs B51-051-0000220 McMurd0, Mftrs SDE9PNTD Fujitsu, Mftrs FCN785J036G0 Harwin, Mftrs D28xx-01 Pins)
Shorting Plugs Push Button Switch Miniature Connectors 9-Way D-Type Connector Centronics Connector 24-Pin Socket 16-Pin Socket Socket 20-Pin Socket Wire Wrap Pins
Crystal Oscillator Component Identification
Headers required) SKT3 SKT11 SKT1 DGND AGND AVDD DVDD
Bicc Vero, Mftrs 663472C
Location
Vendor
2.4576 Oscillator
Xtal
IQD, Mftrs A116C
REV.
EVAL-AD7730LEB
Figure Component Layout diagram
REV.
EVAL-AD7730LEB
Figure Component Side Artwork Diagram
REV.
EVAL-AD7730LEB
Figure Solder Side Artwork Diagram
REV.

Evaluation Board AD7730L Transducer EVAL-AD7730LEB Interfacing th

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