Data Sheet August 2003 FN483.5 General Purpose Transistor Array

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Data Sheet August 2003 FN483.5 General Purpose Transistor Array

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CA3086
Data Sheet August 2003 FN483.5
General Purpose Transistor Array
CA3086 consists five general-purpose silicon transistors common monolithic substrate. transistors internally connected form differentially connected pair. transistors CA3086 well suited wide variety applications low-power systems frequencies from 120MHz. They used discrete transistors conventional circuits. However, they also provide very significant inherent advantages unique integrated circuits, such compactness, ease physical handling thermal matching.
Applications
Power Applications from 120MHz General-Purpose Signal Processing Systems Operating 190MHz Range Temperature Compensated Amplifiers Application Note, AN5296 "Application CA3018 Integrated-Circuit Transistor Array" Suggested Applications
Pinout
CA3086 (PDIP, SOIC) VIEW
SUBSTRATE
Ordering Information
PART NUMBER (BRAND) CA3086 CA3086M96 (3086) TEMP. RANGE (oC) PACKAGE PDIP SOIC Tape Reel PKG. DWG. E14.3 M14.15
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 321-724-7143 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2003. Rights Reserved. other trademarks mentioned property their respective owners.
CA3086
Absolute Maximum Ratings
following ratings apply each transistor device: Collector-to-Emitter Voltage, VCEO .15V Collector-to-Base Voltage, VCBO .20V Collector-to-Substrate Voltage, VCIO (Note .20V Emitter-to-Base Voltage, VEBO Collector Current, 50mA
Thermal Information
Thermal Resistance (Typical, Note (oC/W) (oC/W) PDIP Package SOIC Package Maximum Power Dissipation (Any transistor) .300mW Maximum Junction Temperature (Plastic Package) .150oC Maximum Storage Temperature Range -65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC (SOIC Lead Tips Only)
Operating Conditions
Temperature Range. -55oC 125oC
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTES: collector each transistor CA3086 isolated from substrate integral diode. substrate (Terminal must connected most negative point external circuit maintain isolation between transistors provide normal transistor action. avoid undesirable coupling between transistors, substrate (Terminal should maintained either signal (AC) ground. suitable bypass capacitor used establish signal ground. measured with component mounted evaluation board free air.
Electrical Specifications
PARAMETER
25oC, Equipment Design SYMBOL V(BR)CBO V(BR)CEO V(BR)ClO V(BR)EBO ICBO ICEO TEST CONDITIONS 10µA, 1mA, 10µA, 10µA, 10V, 10V, 0.002 (Figure UNITS
Collector-to-Base Breakdown Voltage Collector-to-Emitter Breakdown Voltage Collector-to-Substrate Breakdown Voltage Emitter-to-Base Breakdown Voltage Collector-Cutoff Current (Figure Collector-Cutoff Current (Figure Forward-Current Transfer Ratio (Figure
Electrical Specifications
PARAMETER
25oC, Typical Values Intended Only Design Guidance SYMBOL TEST CONDITIONS 10mA 10µA 10mA TYPICAL VALUES 0.715 0.800 -1.9 0.23 3.25 mV/oC UNITS
Forward-Current Transfer Ratio (Figure Base-to-Emitter Voltage (Figure
Temperature Coefficient (Figure Collector-to-Emitter Saturation Voltage Noise Figure (Low Frequency)
VBE/T
1mA, 10mA 1kHz, 100µA,
CA3086
Electrical Specifications
PARAMETER Low-Frequency, Small-Signal EquivalentCircuit Characteristics: Forward Current-Transfer Ratio (Figure Short-Circuit Input Impedance (Figure Open-Circuit Output Impedance (Figure Open-Circuit Reverse-Voltage Transfer Ratio (Figure Admittance Characteristics: Forward Transfer Admittance (Figure Input Admittance (Figure Output Admittance (Figure Reverse Transfer Admittance (Figure Gain-Bandwidth Product (Figure Emitter-to-Base Capacitance Collector-to-Base Capacitance Collector-to-Substrate Capacitance CEBO CCBO CClO 1MHz,VCE j1.5 j0.04 0.001 j0.03 Figure 0.58 25oC, Typical Values Intended Only Design Guidance (Continued) SYMBOL TEST CONDITIONS 1kHz,VCE 15.6 10-4 TYPICAL VALUES UNITS
Typical Performance Curves
COLLECTOR CUTOFF CURRENT (nA) COLLECTOR CUTOFF CURRENT (nA) 10-1 10-2 10-3 TEMPERATURE (oC)
10-1 10-2 10-3 10-4
TEMPERATURE (oC)
FIGURE ICBO TEMPERATURE
FIGURE ICEO TEMPERATURE
CA3086 Typical Performance Curves
STATIC FORWARD CURRENT TRANSFER RATIO (hFE) 0.01 EMITTER CURRENT (mA) BASE-TO-EMITTER VOLTAGE 25oC
(Continued)
25oC
0.01
EMITTER CURRENT (mA)
FIGURE
FIGURE
NORMALIZED PARAMETERS
1kHz 25oC
BASE-TO-EMITTER VOLTAGE
TEMPERATURE (oC) 0.5mA
3.5k 1.88 10-4 15.6µS
0.01 COLLECTOR CURRENT (mA)
FIGURE TEMPERATURE
FIGURE NORMALIZED hFE, hIE, hRE,
FORWARD TRANSFER CONDUCTANCE (gFE) SUSCEPTANCE (bFE) (mS)
INPUT CONDUCTANCE (gIE) SUSCEPTANCE (bIE) (mS)
COMMON EMITTER CIRCUIT, BASE INPUT 25oC,
COMMON EMITTER CIRCUIT, BASE INPUT 25oC,
FREQUENCY (MHz)
FREQUENCY (MHz)
FIGURE FREQUENCY
FIGURE FREQUENCY
CA3086 Typical Performance Curves
OUTPUT CONDUCTANCE (gOE) SUSCEPTANCE (bOE) (mS) FREQUENCY (MHz)
(Continued)
REVERSE TRANSFER CONDUCTANCE (gRE) SUSCEPTANCE (bRE) (mS)
COMMON EMITTER CIRCUIT, BASE INPUT 25oC,
COMMON EMITTER CIRCUIT, BASE INPUT 25oC, SMALL FREQUENCIES LESS THAN 500MHz
-0.5 -1.0
-1.5 -2.0 FREQUENCY (MHz)
FIGURE FREQUENCY
FIGURE FREQUENCY
GAIN BANDWIDTH PRODUCT (MHz) 1000 COLLECTOR CURRENT (mA) 25oC
FIGURE
CA3086 Dual-In-Line Plastic Packages (PDIP)
INDEX AREA
E14.3 (JEDEC MS-001-AA ISSUE
LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES Rev. 12/93
0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240
0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280
BASE PLANE SEATING PLANE 0.010 (0.25)
NOTES: Controlling Dimensions: INCH. case conflict between English Metric dimensions, inch dimensions control. Dimensioning tolerancing ANSI Y14.5M-1982. Symbols defined Series Symbol List" Section Publication Dimensions measured with package seated JEDEC seating plane gauge GS-3. dimensions include mold flash protrusions. Mold flash protrusions shall exceed 0.010 inch (0.25mm). measured with leads constrained perpendicular datum measured lead tips with leads unconstrained. must zero greater. maximum dimensions include dambar protrusions. Dambar protrusions shall exceed 0.010 inch (0.25mm). maximum number terminal positions. Corner leads E8.3, E16.3, E18.3, E28.3, E42.6 will have dimension 0.030 0.045 inch (0.76 1.14mm).
0.100 0.300 0.115 0.430 0.150
2.54 7.62 10.92 3.81
2.93
CA3086 Small Outline Plastic Packages (SOIC)
INDEX AREA SEATING PLANE 0.25(0.010)
M14.15 (JEDEC MS-012-AB ISSUE
LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL
MILLIMETERS 1.35 0.10 0.33 0.19 8.55 3.80 1.75 0.25 0.51 0.25 8.75 4.00 NOTES Rev. 12/93
0.0532 0.0040 0.013 0.0075 0.3367 0.1497
0.0688 0.0098 0.020 0.0098 0.3444 0.1574
0.10(0.004)
0.25(0.010)
0.050 0.2284 0.0099 0.016 0.2440 0.0196 0.050
1.27 5.80 0.25 0.40 6.20 0.50 1.27
NOTES: Symbols defined Series Symbol List" Section Publication Number Dimensioning tolerancing ANSI Y14.5M-1982. Dimension does include mold flash, protrusions gate burrs. Mold flash, protrusion gate burrs shall exceed 0.15mm (0.006 inch) side. Dimension does include interlead flash protrusions. Interlead flash protrusions shall exceed 0.25mm (0.010 inch) side. chamfer body optional. present, visual index feature must located within crosshatched area. length terminal soldering substrate. number terminal positions. Terminal numbers shown reference only. lead width "B", measured 0.36mm (0.014 inch) greater above seating plane, shall exceed maximum value 0.61mm (0.024 inch). Controlling dimension: MILLIMETER. Converted inch dimensions necessarily exact.
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Data Sheet August 2003 FN483.5 General Purpose Transistor Array

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