PACKAGE TYPE PDIP 5.0V Automotive Temperature Microwire® Ser

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PACKAGE TYPE PDIP 5.0V Automotive Temperature Microwire® Ser

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93C56A/B
PACKAGE TYPE
PDIP
5.0V Automotive Temperature Microwire® Serial EEPRO
Single supply 5.0V operation power CMOS technology active current (typical) standby current (maximum) organization (93C56A) organization (93C56B) Self-timed ERASE WRITE cycles (including auto-erase) Automatic ERAL before WRAL Power on/off data protection circuitry Industry standard 3-wire serial interface Device status signal during ERASE/WRITE cycles Sequential READ function 1,000,000 cycles guaranteed Data retention years 8-pin PDIP SOIC packages Available following temperature ranges: Automotive (E): -40°C +125°C
93C56A/B
SOIC
93C56A/B
BLOCK DIAGRAMEMORY ARRAY ADDRESS DECODER
DESCRIPTION
Microchip Technology Inc. 93C56A/B 2K-bit, low-voltage serial Electrically Erasable PROM. device memory configured bits (93C56A) bits (93C56B). Advanced CMOS technology makes this device ideal low-power, nonvolatile memory applications. 93C56A/B available standard 8-pin surface mount SOIC packages. This device only recommeded automotive temperature applications. commercial industrial applications, 93LC56A/B recommended.
ADDRESS COUNTER DATA REGISTER MEMORY DECODE LOGIC CLOCK GENERATOR OUTPUT BUFFER
Microwire registered trademark National Semiconductor.
1998 Microchip Technology Inc.
DS21206C-page
93C56A/B
ELECTRICAL CHARACTERISTICS
Maximum Ratings*
TABLE 1-1:
Name
FUNCTION TABLE
Function Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Connect Power Supply
.7.0V inputs outputs w.r.t. -0.6V +1.0V
Storage temperature .-65°C +150°C Ambient temp. with power applied.-65°C +125°C Soldering temperature leads seconds) +300°C protection pins.4
*Notice: Stresses above those listed under "Maximum ratings" cause permanent damage device. This stress rating only functional operation device those other conditions above those indicated operational listings this specification implied. Exposure maximum rating conditions extended periods affect device reliability.
TABLE 1-2:
ELECTRICAL CHARACTERISTICS
Automotive (E)VCC +4.5V +5.5VTamb -40°C +125°C
parameters apply over specified operating ranges unless otherwise noted Parameter High level input voltage level input voltage level output voltage High level output voltage Input leakage current Output leakage current capacitance (all inputs/outputs) Operating current Standby current Clock frequency Clock high time Clock time Chip select setup time Chip select hold time Chip select time Data input setup time Data input hold time Data output delay time Data output disable time Status valid time Program cycle time Endurance
Symbol CIN, COUT write read ICCS FCLK TCKH TCKL TCSS TCSH TCSL TDIS TDIH
Min. -0.3
Max.
Units cycles (Note
Conditions
4.5V -400 4.5V VOUT VIN/VOUT (Notes Tamb +25°C, FCLK
VSS;
Relative Relative Relative Relative (Note ERASE/WRITE mode ERAL mode WRAL mode 25°C, 5.0V, Block Mode (Note
Note This parameter tested Tamb 25°C FCLK MHz. This parameter periodically sampled 100% tested. This application tested guaranteed characterization. endurance estimates specific application, please consult Total Endurance Model which obtained website.
DS21206C-page
1998 Microchip Technology Inc.
93C56A/B
DESCRIPTION
Chip Select (CS)
cycles required during self-timed WRITE (i.e., auto ERASE/WRITE) cycle. After detecting START condition, specified number clock cycles (respectively high transitions CLK) must provided. These clock cycles required clock required opcode, address, data bits before instruction executed (Table Table 2-2). then become don't care inputs waiting START condition detected. Note: must between consecutive instructions.
high level selects device. level deselects device forces into standby mode. However, programming cycle which already progress will completed, regardless input signal. brought during program cycle, device will into standby mode soon programming cycle completed. must minimum (TCSL) between consecutive instructions. low, internal control logic held RESET status.
Data (DI)
Serial Clock (CLK)
Serial Clock used synchronize communication between master device 93C56A/B. Opcode, address, data bits clocked positive edge CLK. Data bits also clocked positive edge CLK. stopped anywhere transmission sequence high level) continued anytime with respect clock high time (TCKH) clock time (TCKL). This gives controlling master freedom preparing opcode, address, data. "Don't Care" (device deselected). high, START condition been detected, number clock cycles received device without changing status (i.e., waiting START condition).
Data used clock START bit, opcode, address, data synchronously with input.
Data (DO)
Data used READ mode output data synchronously with input (TPD after positive edge CLK). This also provides READY/BUSY status information during ERASE WRITE cycles. READY/BUSY status information available brought high after being minimum chip select time (TCSL) ERASE WRITE operation been initiated. status signal available held during entire ERASE WRITE cycle. this case, HIGH-Z mode. status checked after ERASE/WRITE cycle, data line will high indicate device ready.
TABLE 2-1:
ERASE ERAL EWDS EWEN READ WRITE WRAL
INSTRUCTION 93C56A
Address
Instruction Opcode
Data
Data
(RDY/BSY) (RDY/BSY) HIGH-Z HIGH-Z (RDY/BSY) (RDY/BSY)
Req. Cycles
TABLE 2-2:
ERASE ERAL EWDS EWEN READ WRITE WRAL
INSTRUCTION 93C56B
Address
Instruction Opcode
Data
Data
(RDY/BSY) (RDY/BSY) HIGH-Z HIGH-Z (RDY/BSY) (RDY/BSY)
Req. Cycles
1998 Microchip Technology Inc.
DS21206C-page
93C56A/B
FUNCTIONAL DESCRIPTION
Data (DI) Data (DO)
Instructions, addresses, write data clocked into rising edge clock (CLK). normally held HIGH-Z state except when reading data from device, when checking READY/BUSY status during programming operation. READY/BUSY status verified during ERASE/WRITE operation polling pin; indicates that programming still progress, while high indicates device ready. will enter HIGH-Z state falling edge possible connect Data (DI) Data (DO) pins together. However, with this configuration, logic-high level, possible "bus conflict" occur during "dummy zero" that precedes READ operation. Under such condition, voltage level seen undefined will depend upon relative impedances signal source driving higher current sourcing capability higher voltage pin.
START Condition
Data Protection
START detected device both high with respect positive edge first time. Before START condition detected, CLK, change combination (except that START condition), without resulting device operation (READ, WRITE, ERASE, EWEN, EWDS, ERAL, WRAL). soon high, device longer standby mode. instruction following START condition will only executed required amount opcode, address data bits particular instruction clocked After execution instruction (i.e., clock last required address data bit) become don't care bits until START condition detected.
During power-up, programming modes operation inhibited until reached level greater than 3.8V. During power-down, source data protection circuitry acts inhibit programming modes when fallen below 3.8V nominal conditions. ERASE/WRITE Disable (EWDS) ERASE WRTE Enable (EWEN) commands give additional protection against accidentally programming during normal operation. After power-up, device automatically EWDS mode. Therefore, EWEN instruction must performed before ERASE WRITE instruction executed.
FIGURE 3-1:
SYNCHRONOUS DATA TIMING
TCSS TCKH TCKL TCSH
TDIS TDIH
(READ) (PROGRAM) Note:
STATUS VALID
Test Conditions: 0.4V, 2.4V.
DS21206C-page
1998 Microchip Technology Inc.
93C56A/B
ERASE Erase (ERAL)
ERASE instruction forces data bits specified address logical state. This cycle begins rising clock edge last address bit. indicates READY/BUSY status device brought high after minimum (TCSL). logical indicates that programming still progress. logical indicates that register specified address been erased device ready another instruction. ERAL instruction will erase entire memory array logical state. ERAL cycle identical ERASE cycle, except different opcode. ERAL cycle completely self-timed commences rising clock edge last address bit. Clocking necessary after device entered ERAL cycle. indicates READY/BUSY status device, brought high after minimum (TCSL) before entire ERAL cycle complete.
FIGURE 3-2:
ERASE TIMING
TCSL CHECK STATUS
AN-1
AN-2
READY HIGH-Z
HIGH-Z
BUSY
FIGURE 3-3:
ERAL TIMING
TCSL CHECK STATUS
READY HIGH-Z
HIGH-Z
BUSY
1998 Microchip Technology Inc.
DS21206C-page
93C56A/B
ERASE/WRITE Disable Enable (EWDS/EWEN) READ
READ instruction outputs serial data addressed memory location pin. dummy zero precedes 8-bit (93C56A) 16-bit (93C56B) output string. output data bits will toggle rising edge stable after specified time delay (TPD). Sequential read possible when held high. memory data will automatically cycle next register output sequentially.
device powers ERASE/WRITE Disable (EWDS) state. programming modes must preceded ERASE/WRITE Enable (EWEN) instruction. Once EWEN instruction executed, programming remains enabled until EWDS instruction executed removed from device. protect against accidental data disturbance, EWDS instruction used disable ERASE/WRITE functions should follow programming operations. Execution READ instruction independent both EWEN EWDS instructions.
FIGURE 3-4:
READ TIMING
HIGH-Z
FIGURE 3-5:
EWDS TIMING
TCSL
FIGURE 3-6:
EWEN TIMING
TCSL
DS21206C-page
1998 Microchip Technology Inc.
93C56A/B
WRITE Write (WRAL)
WRITE instruction followed 8-bits (93C56A) 16-bits (93C56B) data which written into specified address. After last data clocked into pin, self-timed auto-erase programming cycle begins. indicates READY/BUSY status device, brought high after minimum (TCSL) before entire write cycle complete. logical indicates that programming still progress. logical indicates that register specified address been written with data specified device ready another instruction. Write (WRAL) instruction will write entire memory array with data specified command. WRAL cycle completely self-timed commences rising clock edge last data bit. Clocking necessary after device entered WRAL cycle. WRAL command does include automatic ERAL cycle device. Therefore, WRAL instruction does require ERAL instruction chip must EWEN status. indicates READY/BUSY status device brought high after minimum (TCSL).
FIGURE 3-7:
WRITE TIMING
TCSL
READY
HIGH-Z
BUSY
HIGH-Z
FIGURE 3-8:
WRAL TIMING
TCSL
HIGH-Z
BUSY
READY HIGH-Z
1998 Microchip Technology Inc.
DS21206C-page
93C56A/B
NOTES:
DS21206C-page
1998 Microchip Technology Inc.
93C56A/B
NOTES:
1998 Microchip Technology Inc.
DS21206C-page
93C56A/B
NOTES:
DS21206C-page
1998 Microchip Technology Inc.
93C56A/B
93C56A/B PRODUCT IDENTIFICATION SYSTETo order obtain information, e.g., pricing delivery, refer factory listed sales office. 93C56A/B Package: Plastic (300 Body), 8-lead Plastic SOIC (150 Body), 8-lead -40°C +125°C
Temperature Range:
93C56A Device: 93C56AT 93C56B 93C56BT
Microwire Serial EEPROM (x8) Microwire Serial EEPROM (x8) Tape Reel Microwire Serial EEPROM (x16) Microwire Serial EEPROM (x16) Tape Reel
Sales Support
Data Sheets Products supported preliminary Data Sheet have errata sheet describing minor operational differences recommended workarounds. determine errata sheet exists particular device, please contact following: Your local Microchip sales office Microchip Corporate Literature Center U.S. FAX: (602) 786-7277 Microchip Worldwide Site (www.microchip.com)
1998 Microchip Technology Inc.
DS21206C-page
WORLDWIDE SALES SERVICE
AMERICAS
Corporate Office
Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, 85224-6199 Tel: 480-786-7200 Fax: 480-786-7277 Technical Support: 480-786-7627 Address: http://www.microchip.com
AMERICAS (continued)
Toronto
Microchip Technology Inc. 5925 Airport Road, Suite Mississauga, Ontario 1W1, Canada Tel: 905-405-6279 Fax: 905-405-6253
ASIA/PACIFIC (continued)
Singapore
Microchip Technology Singapore Ltd. Middle Road #07-02 Prime Centre Singapore 188980 Tel: 65-334-8870 Fax: 65-334-8850
ASIA/PACIFIC
Hong Kong
Microchip Asia Pacific Unit 2101, Tower Metroplaza Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2-401-1200 Fax: 852-2-401-3431
Taiwan, R.O.C
Microchip Technology Taiwan 10F-1C Tung North Road Taipei, Taiwan, Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Atlanta
Microchip Technology Inc. Sugar Mill Road, Suite 200B Atlanta, 30350 Tel: 770-640-0034 Fax: 770-640-0307
Boston
Microchip Technology Inc. Mount Royal Avenue Marlborough, 01752 Tel: 508-480-9990 Fax: 508-480-8575
EUROPE
United Kingdom
Arizona Microchip Technology Ltd. Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 Tel: 5858 Fax: 44-118 921-5835
Beijing
Microchip Technology, Beijing Unit 915, Chaoyangmen Dajie Dong Erhuan Road, Dongcheng District China Hong Kong Manhattan Building Beijing 100027 Tel: 86-10-85282100 Fax: 86-10-85282104
Chicago
Microchip Technology Inc. Pierce Road, Suite Itasca, 60143 Tel: 630-285-0071 Fax: 630-285-0075
India
Microchip Technology Inc. India Liaison Office Legacy, Convent Road Bangalore 025, India Tel: 91-80-229-0061 Fax: 91-80-229-0062
Denmark
Microchip Technology Denmark Regus Business Centre Lautrup Ballerup DK-2750 Denmark Tel: 4420 9895 Fax: 4420 9910
Dallas
Microchip Technology Inc. 4570 Westgrove Drive, Suite Addison, 75248 Tel: 972-818-7423 Fax: 972-818-2924
Japan
Microchip Technology Intl. Inc. Benex 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa 222-0033 Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122
France
Arizona Microchip Technology SARL Parc d'Activite Moulin Massy Saule Trapu Batiment Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Dayton
Microchip Technology Inc. Prestige Place, Suite Miamisburg, 45342 Tel: 937-291-1654 Fax: 937-291-9175
Detroit
Microchip Technology Inc. Tri-Atria Office Building 32255 Northwestern Highway, Suite Farmington Hills, 48334 Tel: 248-538-2250 Fax: 248-538-2260
Korea
Microchip Technology Korea 168-1, Youngbo Bldg. Floor Samsung-Dong, Kangnam-Ku Seoul, Korea Tel: 82-2-554-7200 Fax: 82-2-558-5934
Germany
Arizona Microchip Technology GmbH Gustav-Heinemann-Ring D-81739 Germany Tel: 49-89-627-144 Fax: 49-89-627-144-44
Angeles
Microchip Technology Inc. 18201 Karman, Suite 1090 Irvine, 92612 Tel: 949-263-1888 Fax: 949-263-1338
Italy
Arizona Microchip Technology Centro Direzionale Colleoni Palazzo Taurus Colleoni 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883
11/15/99
Shanghai
Microchip Technology Shanghai Golden Bridge Bldg. 2077 Yan'an Road West, Hong Qiao District Shanghai, 200335 Tel: 86-21-6275-5700 Fax: 21-6275-5060
York
Microchip Technology Inc. Motor Parkway, Suite Hauppauge, 11788 Tel: 631-273-5305 Fax: 631-273-5335
Jose
Microchip Technology Inc. 2107 North First Street, Suite Jose, 95131 Tel: 408-436-7950 Fax: 408-436-7955
Microchip received QS-9000 quality system certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona July 1999. Company's quality system processes procedures QS-9000 compliant PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs microperipheral products. addition, Microchip's quality system design manufacture development systems 9001 certified.
rights reserved. 1999 Microchip Technology Incorporated. Printed USA. 11/99
Printed recycled paper.
Information contained this publication regarding device applications like intended suggestion only superseded updates. representation warranty given liability assumed Microchip Technology Incorporated with respect accuracy such information, infringement patents other intellectual property rights arising from such otherwise. Microchip's products critical components life support systems authorized except with express written approval Microchip. licenses conveyed, implicitly otherwise, under intellectual property rights. Microchip logo name registered trademarks Microchip Technology Inc. U.S.A. other countries. rights reserved. other trademarks mentioned herein property their respective companies.
1999 Microchip Technology Inc.

PACKAGE TYPE PDIP 5.0V Automotive Temperature Microwire® Ser

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