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16-bit Proprietary Microcontroller F2MC-16LX MB90378 Series


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DS07-13740-1E
16-bit Proprietary Microcontroller
F2MC-16LX MB90378 Series
MB90F378/V378
DESCRIPTION
MB90378 series line general-purpose, 16-bit microcontrollers designed those applications which require high-speed real-time processing. instruction designed optimized controller applications which inheriting architecture F2MC-16LX family allow wide range control tasks processed efficiently high speed. built-in interface, serial PS/2 interface simplifies communication with host PS/2 devices computer system. Moreover, SMbus compliant I2C*2 converter implements smart battery control. With these features, MB90378 series matches itself keyboard controller with smart battery control. While inheriting architecture F2MC*1 family, instruction F2MC-16LX core MB90378 series incorporates additional instructions high-level languages, supports extended addressing modes, contains enhanced multiplication division instructions well substantial collection improved manipulation instructions. addition, MB90378 series on-chip 32-bit accumulator which enables processing long-word data. stands FUJITSU Flexible Microcontroller, registered trademark FUJITSU LIMITED. Purchase Fujitsu components conveys license under Philips Patent Rights use, these components system provided that system conforms Standard Specification defined Philips.
PACKAGE
144-pin plastic LQFP
(FPT-144P-M12)
MB90378 Series
FEATURES
Clock Embedded clock multiplication circuit Operating clock (PLL clock) selected from divided-by-2 oscillation four times oscillation oscillation MHz) Minimum instruction execution time oscillation MHz, four times clock, operation addressing space Mbytes Internal 24-bit addressing Instruction optimized controller applications Rich data types (bit, byte, word, long word) Rich addressing mode types) High code efficiency Enhanced precision calculation realized 32-bit accumulator Instruction designed high level language multi-task operations Adoption system stack pointer Enhanced pointer indirect instructions Barrel shift instructions Program patch function address pointer) Improved execution speed 4-byte instruction queue Powerful interrupt function Priority level programmable levels factors stronger interrupt function Automatic data transmission function independent operation Extended intelligent service function (EI2OS) Maximum channels Low-power consumption (standby) mode Sleep mode (mode which operating clock stopped) Timebase timer mode (mode which operations other than timebase timer watch timer stopped) Stop mode (mode which oscillations stopped) intermittent operation mode Watch mode Dual operation flash Upper lower banks flash memory used execute erase/program read operation concurrently (MB90F378) Package LQFP-144 (FPT-144P-M12 pitch) Process CMOS technology
MB90378 Series
PRODUCT LINEUP
Part number Parameter Classification size size MB90F378 Flash type Kbytes (112 Kbytes Kbytes) Dual operation Kbytes Number instruction Minimum execution time ns/5 (PLL Addressing mode Data length bits Maximum memory space Mbytes port (Nch) port (CMOS) port (CMOS with pull-up control) Total 15.6 Kbytes MB90V378
function
port
16-bit reload timer 8/16-bit timer 16-bit timer decoder Parity generator PS/2 interface
Reload timer channels Reload mode, single-shot mode event count mode selectable timer channels (8-bit mode, channels) timer channels mode single-shot mode selectable decoder channel Parity generator channel Selectable odd/even parity PS/2 interface channels selectable sampling clocks interface Universal peripheral Interface GA20 output control Data buffer array channel channels only bytes
interface
Serial controller
Serial request channels clock monitor/control With full-duplex double buffer (variable data length) Clock asynchronized clock synchronized transmission (with start stop bits) selectively used (SMbus compliant) channel Support PHILIPS SMbus proposed Intel Selectable packet error check Timeout detection function Multi-address (SMbus compliant) channel Support PHILIPS SMbus proposed Intel Selectable packet error check Timeout detection function addresses support ALERT function (Continued)
UART
Multi-address
MB90378 Series
(Continued) Part number Parameter Bridge circuit DTP/external interrupt Extended external interrupt Key-on wake-up interrupt 8/10-bit converter 8-bit converter controller/driver Low-power consumption Process Package Operating voltage LQFP-144 (FPT-144P-M12 pitch) MHz* MB90F378 MB90V378
Three connection routes switched I2C/multi-address independent channels Selectable causes Rise/fall edge, fall edge, level level multiplex channels Selectable causes Rise/fall edge, fall edge, rise edge level independent channels Causes level 8/10-bit resolution channels Conversion time Less than internal clock) 8-bit resolution channels Selectable output CMOS port Stop mode/Sleep mode/CPU intermittent operation mode/Watch mode CMOS PGA299
Varies with conditions such operating frequency (see ELECTRICAL CHARACTERISTICS"). Assurance MB90V378 given only operation with tool power supply voltage operating temperature operating frequency MHz.
PACKAGE CORRESPONDING PRODUCTS
Package FPT-144P-M12 PGA299 Available available PACKAGE DIMENSIONS". MB90F378 MB90V378
Note more information about each package,
DIFFERENCES AMONG PRODUCTS
Memory size evaluation with evaluation product, note difference between evaluation product product actually used. following items must taken into consideration. MB90V378 does have internal ROM, however, operations equivalent chips with internal evaluated using dedicated development tool, enabling selection size settings development tool. MB90V378, images from FF4000H FFFFFFH mapped bank FF0000H FF3FFFH mapped bank only. (This setting changed development tool configuration.) MB90F378, images from FF4000H FFFFFFH mapped bank FF0000H FF3FFF mapped bank only.
MB90378 Series
ASSIGNMENT
VIEW
P40/PSCK0 P41/PSDA0 P42/PSCK1 P43/PSDA1 P44/PSCK2 P45/PSDA2 P46/CLKRUN P47/SERIRQ P50/GA20 P51/LFRAME P52/LRESET P53/LCK P54/LAD0 P55/LAD1 P56/LAD2 P57/LAD3 PA0/EEI0 PA1/EEI1 PA2/EEI2 PA3/EEI3 PA4/EEI4 PA5/EEI5 PA6/EEI6 PA7/EEI7 P83/INT6 P84/INT7 PB0/EEI8 PB1/EEI9 PB2/EEI10
LQFP-144
P77/PPG1 P76/UI3 P75/UO3 P74/UCK3 P73/UI2 P72/UO2 P71/UCK2 P70/UI1 P67/UO1 P66/UCK1 P65/INT5 P64/INT4 P63/INT3 P62/INT2 P61/INT1 P60/INT0 PD7/PPG3 PF7/V3* PF6/V2* PF5/V1* PF4/COM3* PF3/TO6/COM2* PF2/TIN6/COM1* PF1/TO5/COM0* PF0/TIN5/SEG8* PE7/TO4/SEG7 PE6/TIN4/SEG6 PE5/TO3/SEG5 PE4/TIN3/SEG4 PE3/TO2/SEG3 PE2/TIN2/SEG2 PE1/TO1/SEG1 PE0/TIN1/SEG0 P82/ALERT
(FPT-144P-M12)
Heavy current pins
MB90378 Series
DESCRIPTION
LQFP-144 128,129 20,21 name X0,X1 X0A,X1A KSI0 KSI7 circuit status during reset Oscillating Main oscillation pins. Oscillating Sub-clock oscillation pins. Reset input External reset input pin. Mode input Input operation mode specification. Connect this directly Vss. General-purpose ports. used key-on wake-up interrupt input Input enabled when EICR standby mode. General-purpose ports. General-purpose ports. General-purpose ports. 8/16-bit timer output pins. 8-bit channels mode Event output from PG00/PG01 16-bit 1channel mode Event output from PG00 General-purpose ports. 8/16-bit timer output pins. 8-bit channels mode Event output from PG10/PG11. 16-bit 1channel mode Event output from PG10. Port input General-purpose ports. General-purpose port. External trigger input (ADTG) converter. General-purpose open-drain port. Serial clock PS/2 interface This function selected when PS/2 interface enabled. General-purpose open-drain port. Serial data PS/2 interface This function selected when PS/2 interface enabled. General-purpose open-drain port. Serial clock PS/2 interface This function selected when PS/2 interface enabled. General-purpose open-drain port. Serial data PS/2 interface This function selected when PS/2 interface enabled. (Continued) Function
125, P30, 137, PG00, PG01 P32, 139, PG10, PG11
ADTG PSCK0 PSDA0 PSCK1 PSDA1
MB90378 Series
LQFP-144 name PSCK2 PSDA2 CLKRUN SERIRQ GA20 LFRAME LRESET LAD0 LAD3 INT0 INT5 UCK1 Port input status during reset
circuit
Function General-purpose open-drain port. Serial clock PS/2 interface This function selected when PS/2 interface enabled. General-purpose open-drain port. Serial data PS/2 interface This function selected when PS/2 interface enabled. General-purpose open-drain port. clock status restart request serial controller. This function selected when serial clock restart request enabled. General-purpose port. Serial data serial controller. This function selected when serial enabled. General-purpose open-drain port. GA20 output interface. This function selected when GA20 function enabled. General-purpose port. LFRAME input interface. This function selected when interface enabled. General-purpose port. Reset input interface. This function selected when interface enabled. General-purpose port. Clock input interface. This function selected when interface enabled. General-purpose ports. Address/Data interface. This function selected when interface enabled. General-purpose ports. used DTP/external interrupt request input Input enabled when ENIR: standby mode. General-purpose port. Serial clock UART This function enabled when UART enables clock output. (Continued)
MB90378 Series
LQFP-144 name UCK2 UCK3 PPG1 SCL1 SDA1 Port input status during reset General-purpose port. Serial data output UART This function enabled when UART enables data output. General-purpose port. Serial data input UART While UART operating input, input this used required must used other input. General-purpose port. Serial clock UART This function enabled when UART enables clock output. General-purpose port. Serial data output UART This function enabled when UART enables data output. General-purpose port. Serial data input UART While UART operating input, input this used required must used other input. General-purpose port. Serial clock UART This function enabled when UART enables clock output. General-purpose port. Serial data output UART This function enabled when UART enables data output. General-purpose port. Serial data input UART While UART operating input, input this used required must used other input. General-purpose port. Output This function enabled when output enabled. General-purpose open-drain port. Serial clock multi-address I2C. General-purpose open-drain port. Serial data multi-address I2C. (Continued)
circuit
Function
MB90378 Series
LQFP-144 name ALERT P83, INT6, INT7 SCL2 SDA2 SCL3 SDA3 SCL4 SDA4 EEI0 EEI7 EEI8 EEI15 AN11 input status during reset
circuit
Function General-purpose open-drain port. ALERT output multi-address I2C. General-purpose ports. used DTP/external interrupt request input ch6, Input enabled when ENIR: EN6, standby mode. General-purpose port. General-purpose port. General-purpose open-drain port. Serial clock bridge circuit. General-purpose open-drain port. Serial data bridge circuit. General-purpose open-drain port. Serial clock bridge circuit.
Port input
General-purpose open-drain port. Serial data bridge circuit. General-purpose open-drain port. Serial clock bridge circuit. General-purpose open-drain port. Serial data bridge circuit. General-purpose ports. External input Extend External Interrupt request When detect, prepare Interrupt. (Multiplex) General-purpose ports. External input Extend External Interrupt request When detect, prepare Interrupt. (Multiplex) General-purpose ports. converter analog input This function enabled when analog input specification enabled (ADER1). General-purpose ports. converter analog input This function enabled when analog input specification enabled (ADER2). (Continued)
MB90378 Series
LQFP-144 name PD4, DA1, PD6, PPG2, PPG3 SEG0 TIN1 SEG1 SEG2 TIN2 SEG3 SEG4 TIN3 SEG5 SEG6 TIN4 Port input status during reset
circuit
Function General-purpose ports. converter analog output This function selected when converted enabled. General-purpose ports. Output This function selected when output enabled. General-purpose port. Segment output controller/driver. This function selected when segment output enabled. External clock input reload timer General-purpose port. Segment output controller/driver. This function selected when segment output enabled. Event output reload timer General-purpose port. Segment output controller/driver. This function selected when segment output enabled. External clock input reload timer General-purpose port. Segment output controller/driver. This function selected when segment output enabled. Event output reload timer General-purpose port. Segment output controller/driver. This function selected when segment output enabled. External clock input reload timer General-purpose port. Segment output controller/driver. This function selected when segment output enabled. Event output reload timer General-purpose port. Segment output controller/driver. This function selected when segment output enabled. External clock input reload timer (Continued)
MB90378 Series
(Continued) LQFP-144 name SEG7 SEG8 TIN5 COM0 COM1 TIN6 COM2 COM3 19,55,91, 18,54,90, AVCC AVSS Source Power input Power input Port input circuit status during reset General-purpose port. Segment output controller/driver. This function selected when segment output enabled. Event output reload timer General-purpose Open-drain port. Segment output controller/driver. This function selected when segment output enabled. External clock input reload timer General-purpose Open-drain port. output controller/driver. This function selected when output enabled. Event output reload timer General-purpose Open-drain port. output controller/driver. This function selected when output enabled. External clock input reload timer General-purpose Open-drain port. output controller/driver. This function selected when output enabled. Event output reload timer General-purpose Open-drain port. output controller/driver. This function selected when output enabled. General-purpose Open-drain ports. Power input Power input controller/driver. This function selected when external voltage divider enabled. power input analog circuits. Vref+ input converter. This voltage must exceed Vcc. Vref- fixed AVSS. power input analog circuits. Power input pin. Power (3.3 input pin. Function
MB90378 Series
CIRCUIT TYPE
Type
X1/X1A
Circuit
Xout
Remarks
X0/X0A
Main/Sub clock (main/sub clock crystal oscillator) oscillation feedback resistor approximately
Standby mode control
CMOS hysteresis input Pull-up resistor approximately
CMOS hysteresis input
CMOS hysteresis input
CMOS hysteresis input
Pull-up control
Pout Nout CMOS hysteresis input Standby mode control
CMOS output CMOS hysteresis input Selectable pull-up resistor approximately
Pull-up control
Pout Nout CMOS input Standby mode control
CMOS output CMOS input Selectable pull-up resistor approximately
Nout CMOS hysteresis input Standby mode control
open-drain output CMOS hysteresis input tolerant
(Continued)
MB90378 Series
Type
Circuit
Remarks open-drain output CMOS input
Nout CMOS input
Standby mode control
Pout Nout CMOS input Standby mode control
CMOS output CMOS input
Pout Nout CMOS hysteresis input Standby mode control
CMOS output CMOS hysteresis input
Nout CMOS input Standby mode control
open-drain output CMOS input tolerant
Pout Nout CMOS input Standby mode control Analog input
CMOS output CMOS input analog input
(Continued)
MB90378 Series
Type
Circuit
Remarks CMOS output CMOS input analog output
Pout Nout CMOS input Standby mode control Analog input
Pout Nout CMOS hysteresis input
CMOS output CMOS hysteresis input Segment output
Standby mode control Segment output
Nout CMOS hysteresis input
open-drain output CMOS hysteresis input Segment output
Standby mode control Segment output
Nout CMOS hysteresis input Standby mode control driving power supply
open-drain output CMOS hysteresis input driving power supply
(Continued)
MB90378 Series
(Continued) Type Circuit Remarks Power supply input protection circuit
Analog input enable
converter reference voltage (AVR) input with protection circuit
Analog input enable
Nout
open-drain output CMOS input tolerant
CMOS input Standby mode control
MB90378 Series
HANDLING DEVICES
sure that maximum rated voltage exceeded (latch-up prevention).
latch-up occur CMOS voltage higher than lower than applied input output other than medium-to-high voltage pins. latch-up also occur voltage higher than rating applied between pin. latch-up causes rapid increase power supply current, which result thermal damage element. Take utmost care that maximum rated voltage exceeded. When turning power analog circuits, sure that analog supply voltages (AVCC, AVR) analog input voltage exceed digital supply voltage (VCC).
Stabilize supply voltages
Even within operation guarantee range supply voltage, malfunction caused supply voltage undergoes rapid change. voltage stabilization guidelines, ripple fluctuations (P-P value) commercial frequencies should suppressed "10%" less reference value. During momentary change such when switching supply voltage, voltage fluctuations should also suppressed that "transient fluctuation rate" V/ms less.
Power-on
prevent malfunction built-in voltage drop circuit, secure (between more voltage rise time during power-on.
Treatment unused input pins
unused input cause malfunction left open. Every unused input should pulled down.
Treatment converter, converter power
When converter, converter comparator used, connect pins follows: AVCC AVSS VSS. VCC,
Notes external clock
When external clock used, oscillation stabilization wait time required power-on reset cancellation sub-clock mode stop mode. shown diagram below, when external clock used, connect only leave open.
MB90378 series Open
MB90378 Series
Power supply pins
When device more pins, pins that should have equal potential connected within device order prevent latch-up other malfunction. reduce extraneous emission, prevent malfunction strobe signal increase group level, maintain local output current rating, connect these power supply pins external power supply ground them. current source should connected pins device with minimum impedance. recommended that bypass capacitor about connected near terminals between VSS.
Analog power-on sequence converter converter
power converter converter (AVCC, AVR) analog inputs (AN0 AN11) must turned after power digital circuits (VCC) turned When turning power, turn power digital circuits (VCC) after turning power converter, converter analog inputs. When power turned off, should exceed AVCC. Also, when that used analog input also used input port, input voltage should exceed AVCC. (The power analog circuits power digital circuits simultaneously turned off.)
MB90378 Series
BLOCK DIAGRAM
MC-16LX family core
Clock control circuit Reset circuit (Watchdog timer) Interrupt controller Timebase timer
Other pins MD2, AVCC, AVSS,
Delayed interrupt generator open-drain port (Multi-address) P80/SCL1 P81/SDA1 P82/ALERT P90/SCL2 P91/SDA2 P92/SCL3 P93/SDA3 P94/SCL4 P95/SDA4
P00/KSI0 P07/KSI7 P30/PG00 P33/PG11 P37/ADTG P40/PSCK0 P41/PSDA0 P42/PSCK1 P43/PSDA1 P44/PSCK2 P45/PSDA2 P46/CLKRUN P47/SERIRQ
CMOS port
Key-on wake-up interrupt 8/16-bit timer (ch1, ch2)
open-drain port (P47 CMOS port)
Bridge circuit CMOS port Extend external interrupt channels)
PS/2 interface Serial channels) Interface
PA0/EEI0 PA7/EEI7 PB0/EEI8 PB7/EEI15 P83/INT6 P84/INT7
Extend external interrupt channels)
P50/GA20 P51/LFRAME P52/LRESET P53/LCK P54/LAD0 P55/LAD1 P56/LAD2 P57/LAD3
DTP/external interrupt (ch6, ch7)
GA20 control
(ch0, ch1, ch2, ch3)
8/10-bit converter channels) 8-bit converter channels) 16-bit (ch2, ch3) CMOS port
open-drain CMOS
P60/INT0 P65/INT5 P66/UCK1 P67/UO1 P70/UI1 P71/UCK2 P72/UO2 P73/UI2 P74/UCK3 P75/UO3 P76/UI3 P77/PPG1
DTP/external interrupt ch0, UART (ch1, ch2, ch3) 16-bit (ch1) CMOS port FLASH Mirroring Flash security
PC0/AN0 PC7/AN7 PD0/AN8 PD3/AN11 PD4/DA1 PD5/DA2 PD6/PPG2 PD7/PPG3
CMOS port open-drain port
16-bit reload timer
(ch1, ch2, ch3, ch4, ch5, ch6)
controller/driver (9SEG 4COM)
PE0/TIN1/SEG0 PE1/TO1/SEG1 PE2/TIN2/SEG2 PE3/TO2/SEG3 PE4/TIN3/SEG4 PE5/TO3/SEG5 PE6/TIN4/SEG6 PE7/TO4/SEG7 PF0/SEG8/TIN5* PF1/COM0/TO5* PF2/COM1/TIN6* PF3/COM2/TO6* PF4/COM3* PF5/V1* PF7/V3*
P07, P17, P27, With resistors that used input pull-up resistors. High current pins
MB90378 Series
MEMORY
Single-chip mode (with mirroring function) FFFFFFH area Address
FC0000H
010000H area bank image)
Address 004000H
Peripheral area 003F80H Address area 000100H 0000F8H 000000H Peripheral area Access allowed Internal access memory
Register
Model MB90F378 MB90V378
Address FE0000H FE0000H*
Address 004000H 004000H*
Address 001900H 003F80H
MB90V378 does contain ROM. Assume that development tool uses these area decode areas. Notes single-chip mode (without mirroring function) selected, Chapter "ROM Mirroring Function Selection Module" MB90378 series manual. data bank seen image higher bank validate small model compiler. Because addresses low-order bits bank same, table referenced without "far" specification. example, when 00C000H accessed, contents FFC000H actually accessed. area bank exceeds Kbytes, areas cannot seen images bank. Because data from FF4000H FFFFFFH seen image 004000H 00FFFF data table should stored area from FF4000H FFFFFFH.
MB90378 Series
F2MC-16LX PROGRAMMING MODEL
Dedicated registers
8-bit 16-bit 32-bit
Accumulator User Stack Pointer (USP) System Stack Pointer (SSP) Processor Status (PS) Program Counter (PC) Direct Page Register (DPR) Program Bank Register(PCB) Data Bank Register (DTB) User Stack Bank Register (USB) System Stack Bank Register (SSB) Additional Data Bank Register (ADB)
General-purpose registers
Dedicated register Accumulator User stack pointer System stack pointer Processor status Program counter Direct page register Program bank register Data bank register User stack bank register System stack bank register Additional data bank register Internal
General-purpose register
MB90378 Series
Processor status (PS)
Default value Default value 00000 -01XXXXX
Default value
ILM2 Default value
ILM1
ILM0
used Undefined
MB90378 Series
Address 000000H 000001H 000002H 000003H 000004H 000005H 000006H 000007H 000008H 000009H 00000AH 00000BH 00000CH 00000DH 00000EH 00000FH 000010H 000011H 000012H 000013H 000014H 000015H 000016H 000017H 000018H 000019H 00001AH 00001BH 00001CH 00001DH 00001EH 00001FH Abbreviation PDR0 PDR1 PDR2 PDR3 PDR4 PDR5 PDR6 PDR7 PDR8 PDR9 PDRA PDRB PDRC PDRD PDRE PDRF DDR0 DDR1 DDR2 DDR3 DDR4 DDR5 DDR6 DDR7 PGDR PGCSR DDRA DDRB DDRC DDRD DDRE DDR8 Register Port data register Port data register Port data register Port data register Port data register Port data register Port data register Port data register Port data register Port data register Port data register Port data register Port data register Port data register Port data register Port data register Port direction register Port direction register Port direction register Port direction register Port direction register Port direction register Port direction register Port direction register Parity generator data register Parity generator control status register Port direction register Port direction register Port direction register Port direction register Port direction register Port direction register Byte Word Resource name access access Port Port Port Port Port Port Port Port Port Port Port Port Port Port Port Port Port Port Port Port Port Port Port Port Parity generator Port Port Port Port Port Port Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB X1111111 XXXXXXX1 XXXXXXXXB XXXXXXXXB -XXXX111B -111111B XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB 11111111B 00000000B 00000000B 00000000B 00000000B 0000000-B 00000000B 00000000B XXXXXXXXB X-0B 00000000B 00000000B 00000000B 00000000B 00000000B -0000-B (Continued)
MB90378 Series
Address 000020H 000021H 000022H 000023H 000024H 000025H 000026H 000027H 000028H 000029H 00002AH 00002BH 00002CH 00002DH 00002EH 00002FH 000030H 000031H 000032H 000033H 000034H 000035H 000036H 000037H 000038H 000039H 00003AH 00003BH 00003CH 00003DH 00003EH 00003FH
Abbreviation SMR1 SCR1 SIDR1/ SODR1 SSR1 M2CR1 CDCR1 ENIR EIRR ELVR ADER1 ADER2 BRSR ADC0 ADCR0 ADCR1 ADCS0 ADCS1 SICRL SICRH SIFR1 SIFR2 SIFR3 SIFR4 PDCRL1 PDCRH1 PCSRL1 PCSRH1 PDUTL1 PDUTH1 PCNTL1 PCNTH1
Register Serial mode register Serial control register Input data register Output data register Serial status register Mode control register Clock division control register Interrupt/DTP enable register Interrupt/DTP cause register Request level setting register Analog input enable register Analog input enable register Bridge circuit selection register control register data register control status register Serial interrupt request register Serial interrupt control register Serial interrupt frame number register Serial interrupt frame number register Serial interrupt frame number register Serial interrupt frame number register PPG1 down counter register PPG1 period setting register PPG1 duty setting register PPG1 control status register
Byte Word Resource name access access 16-bit timer (ch1) Serial 8/10-bit converter Port Port Bridge circuit DTP/external interrupt Communication prescaler UART1
Initial value 00000-00B 00000100B XXXXXXXXB 00001000B -1000B 00-0000B 00000000B XXXXXXXXB 00000000B 00000000B 11111111B -1111B -000000B 00000000B XXXXXXXXB 00000-XXB 00-B 00000000B 00000000B 00000000B -000000B -000000B -000000B -000000B 11111111B 11111111B XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB -000000B 00000000B (Continued)
MB90378 Series
Address 000040H 000041H 000042H 000043H 000044H 000045H 000046H 000047H 000048H 000049H 00004AH 00004BH 00004CH 00004DH 00004EH 00004FH 000050H 000051H 000052H 000053H 000054H 000055H 000056H 000057H 000058H 000059H 00005AH 00005BH 00005CH 00005DH
Abbreviation PDCRL2 PDCRH2 PCSRL2 PCSRH2 PDUTL2 PDUTH2 PCNTL2 PCNTH2 PDCRL3 PDCRH3 PCSRL3 PCSRH3 PDUTL3 PDUTH3 PCNTL3 PCNTH3 PSCR0 PSSR0 PSCR1 PSSR1 PSCR2 PSSR2 PSDR0 PSDR1 PSDR2 PSMR DAT0 DAT1 DACR0 DACR1
Register PPG2 down counter register PPG2 period setting register PPG2 duty setting register
Byte Word Resource name access access 8-bit converter 3-channel PS/2 interface 16-bit timer (ch3) 16-bit timer (ch2)
Initial value 11111111B 11111111B XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB -000000B 00000000B 11111111B 11111111B XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB -000000B 00000000B 0-00000B 00000000B 0-00000B 00000000B 0-00000B 00000000B 00000000B 00000000B 00000000B -0000B XXXXXXXXB XXXXXXXXB (Continued)
PPG2 control status register PPG3 down counter register PPG3 period setting register PPG3 duty setting register PPG3 control status register PS/2 interface control register PS/2 interface status register PS/2 interface control register PS/2 interface status register PS/2 interface control register PS/2 interface status register PS/2 interface data register PS/2 interface data register PS/2 interface data register PS/2 interface mode register converter data register converter data register control register control register
MB90378 Series
Address 00005EH 00005FH 000060H 000061H 000062H 000063H 000064H 000065H 000066H 000067H 000068H 000069H 00006AH 00006BH 00006CH 00006DH 00006EH 00006FH 000070H 000071H 000072H 000073H 000074H 000075H 000076H 000077H
Abbreviation UPAL1 UPAH1 UPAL2 UPAH2 UPAL3 UPAH3 UPCL UPCH UPDI0/ UPDO0 UPS0 UPDI1/ UPDO1 UPS1 UPDI2/ UPDO2 UPS2 UPDI3/ UPDO3 UPS3 ROMM TMCSRL1 TMCSRH1 TMR1/ TMRD1 TMCSRL2 TMCSRH2 TMR2/ TMRD2
Register UPI1 address register (lower) UPI1 address register (upper) UPI2 address register (lower) UPI2 address register (upper) UPI3 address register (lower) UPI3 address register (upper) control register (lower) control register (upper) UPI0 data input register/ data output register UPI0 status register UPI1 data input register/ data output register UPI1 status register UPI2 data input register/ data output register UPI2 status register UPI3 data input register/ data output register UPI3 status register control register mirroring function selection register Timer control status register (lower) Timer control status register (upper) 16-bit timer/reload register Timer control status register (lower) Timer control status register (upper) 16-bit timer/reload register
Byte Word Resource name access access 16-bit reload timer (ch2) 16-bit reload timer (ch1) mirroring function interface
Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB 00000000B -000-000B XXXXXXXXB 00000000B XXXXXXXXB 00000000B XXXXXXXXB 00000000B XXXXXXXXB 00000000B -000 00000000B -0000B XXXXXXXXB XXXXXXXXB 00000000B -0000B XXXXXXXXB XXXXXXXXB (Continued)
MB90378 Series
Address 000078H 000079H 00007AH 00007BH 00007CH 00007DH 00007EH 00007FH 000080H 000081H 000082H 000083H 000084H 000085H 000086H 000087H 000088H 000089H 00008AH 00008BH 00008CH 00008DH 00008EH 00008FH 000090H 00009DH 00009EH 00009FH
Abbreviation TMCSRL3 TMCSRH3 TMR3/ TMRD3 TMCSRL4 TMCSRH4 TMR4/ TMRD4 IBCRL IBCRH IBSRL IBSRH IDAR IADR ICCR ITCR ITOC ITOD ISTO IMTO RDR0 RDR1 RDR2 RDR3
Register Timer control status register (lower) Timer control status register (upper) 16-bit timer/reload register Timer control status register (lower) Timer control status register (upper) 16-bit timer/reload register control register (lower) control register (upper) status register (lower) status register (upper) data register
Byte Word Resource name access access Port Port Port Port 16-bit reload timer (ch4) 16-bit reload timer (ch3)
Initial value 00000000B -0000B XXXXXXXXB XXXXXXXXB 00000000B -0000B XXXXXXXXB XXXXXXXXB -0000B 00000000B 00000000B -000000B XXXXXXXXB -XXXXXXXB 0-000000B -0-00000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B 00000000B
address register clock control register timeout control register timeout clock register timeout data register slave timeout register master timeout register Port pull-up resistor setting register Port pull-up resistor setting register Port pull-up resistor setting register Port pull-up resistor setting register
Prohibited area Program address detect control status register Delayed interrupt cause/ clear register Address match detection Delayed interrupt
PACSR DIRR
00000000B (Continued)
MB90378 Series
Address 0000A0H 0000A1H 0000A2H, 0000A3H 0000A4H 0000A5H 0000A7H 0000A8H 0000A9H 0000AAH 0000ABH 0000ACH 0000ADH 0000AEH 0000AFH 0000B0H 0000B1H 0000B2H 0000B3H 0000B4H 0000B5H 0000B6H 0000B7H 0000B8H 0000B9H 0000BAH 0000BBH 0000BCH 0000BDH 0000BEH 0000BFH
Abbreviation LPMCR CKSCR
Register Low-power consumption mode register Clock selection register
Byte Word Resource name access access Prohibited area Low-power consumption control register
Initial value 00011000B 11111100B
CKMC
Clock modulation control register
Clock modulation
Prohibited area WDTC TBTC Watchdog control register Timebase timer control register Watch timer control register Wake-up interrupt control register Wake-up interrupt flag register Flash memory control status register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Interrupt control register Watchdog timer Timebase timer Watch timer X-XXX111B 1-00100 10001000B
Prohibited area EICR EIFR FMCS Key-on wake-up interrupt Flash memory interface circuit 00000000B 000X0000B
Prohibited area ICR00 ICR01 ICR02 ICR03 ICR04 ICR05 ICR06 ICR07 ICR08 ICR09 ICR10 ICR11 ICR12 ICR13 ICR14 ICR15 Interrupt controller 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B 00000111B (Continued)
MB90378 Series
Address 0000C0H 0000C1H 0000C2H 0000C3H 0000C4H 0000C5H 0000C6H 0000C7H 0000C8H 0000C9H 0000CAH 0000CBH 0000CCH 0000CDH 0000CEH 0000CFH 0000D0H 0000D1H 0000D2H 0000D3H 0000D4H 0000D5H 0000D6H 0000D7H 0000D8H 0000D9H 0000DAH 0000DBH 0000DCH 0000DDH 0000DEH 0000DFH 0000E0H
Abbreviation MBCRL MBCRH MBSRL MBSRH MDAR MALR MADR1 MADR2 MADR3 MADR4 MADR5 MADR6 MCCR MTCR MTOC MTOD MSTO MMTO SMR2 SCR2 SIDR2/ SODR2 SSR2 M2CR2 CDCR2 EENR1 EERR1 EELR1 EENR2 EERR2 EELR2 PDL3
Register MI2C control register (lower) MI2C control register (upper) MI2C status register (lower) status register (upper) MI2C data register MI2C alert register MI2C address register MI2C address register MI2C address register MI2C address register MI2C address register MI2C address register MI2C clock control register MI2C timeout control register MI2C timeout clock register MI2C timeout data register MI2C slave timeout register MI2C master timeout register Serial mode register Serial control register Input data register output data register Status register Mode control register Clock division control register Interrupt enable register Interrupt cause register Request level setting register Interrupt enable register Interrupt cause register Request level setting register Port data latch register
Byte Word Resource name access access Port data latch Extend External Interrupt Extend External Interrupt Communication prescaler UART2 Multi-address
Initial value -0000B 00000000B 00000000B -000000B XXXXXXXXB -0000B -XXXXXXXB -XXXXXXXB -XXXXXXXB -XXXXXXXB -XXXXXXXB -XXXXXXXB 0-000000B -0-00000B 00000000B 00000000B 00000000B 00000000B 00000-00B 00000100B XXXXXXXXB 00001000B -1000B 00-0000B 00000000B XXXXXXXXB 00000000B 00000000B 00000000B XXXXXXXXB 00000000B 00000000B 00000000B (Continued)
MB90378 Series
Address 0000E1H 0000E2H 0000E3H 0000E4H 0000E5H 0000E6H 0000E7H 0000E8H 0000E9H 0000EAH 0000EBH 0000ECH 0000EDH 0000EEH 0000EFH 0000F0H 0000F4H 0000F5H 0000F7H 0000F8H 0000FFH 000100H 0018FFH 001FF0H 001FF1H 001FF2H
Abbreviation BRRL BRRH SMR3 SCR3 SIDR3 SODR3 SSR3 M2CR3 CDCR3 TMCSRL5 TMCSRH5 TMR5/ TMRD5 LCRL LCRH VRAM
Register data register result register (lower) result register (upper) Serial mode register Serial control register Input data register output data register Status register Mode control register Clock division control register Timer control status register (lower) Timer control status register (upper) 16-bit timer/reload register control register control register display
Byte Word Resource name access access controller/driver 16-bit reload timer (ch5) Communication prescaler UART3 decoder
Initial value -XXXXB XXXXXXXXB XXXXXXXXB 00000-00B 00000100B XXXXXXXXB 00001000B -1000B 00-0000B 00000000B -0000B XXXXXXXXB XXXXXXXXB 00010000B 00000000B XXXXXXXXB
Prohibited area
External area
Prohibited area (RAM area) Program address detection register PADR0 Program address detection register Program address detection register
Address match detection
XXXXXXXXB XXXXXXXXB XXXXXXXXB (Continued)
MB90378 Series
Address 001FF3H 001FF4H 001FF5H 001FF6H 003F7FH 003F80H 003F81H 003F82H 003F83H 003F84H 003F85H 003F86H 003F87H 003F88H 003F89H 003F8AH 003F8BH 003F8CH 003F8DH 003F8EH 003F8FH 003F90H 003F91H 003F92H 003F93H 003F94H 003F95H 003F96H 003F97H 003F98H 003F99H 003F9AH 003F9BH
Abbreviation
Register Program address detection register
Byte Word Resource name access access Address match detection
Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB
PADR1
Program address detection register Program address detection register
Prohibited area UDRL10 UDRH10 UDRL11 UDRH11 UDRL12 UDRH12 UDRL13 UDRH13 UDRL14 UDRH14 UDRL15 UDRH15 UDRL16 UDRH16 UDRL17 UDRH17 UDRL18 UDRH18 UDRL19 UDRH19 UDRL1A UDRH1A UDRL1B UDRH1B UDRL1C UDRH1C UDRL1D UDRH1D data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data buffer array-Extend XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB (Continued)
MB90378 Series
Address 003F9CH 003F9DH 003F9EH 003F9FH 003FA0H 003FA1H 003FA2H 003FA3H 003FA4H 003FA5H 003FAEH 003FAFH 003FB0H 003FB1H 003FB2H 003FB3H 003FB4H 003FB5H 003FB6H 003FB7H 003FBFH 003FC0H 003FC1H 003FC2H 003FC3H 003FC4H 003FC5H 003FC6H 003FC7H 003FC8H 003FC9H
Abbreviation UDRL1E UDRH1E UDRL1F UDRH1F DBACLR
Register data register (lower) data register (upper) data register (lower) data register (upper) Data buffer array clear register
Byte Word Resource name access access data buffer array data buffer array-Extend
Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB -000B
Prohibited area FWR0 FWR1 SSR0 FLASH programming control register FLASH programming control register Sector switching register Prohibited area PCKCR PRLL2 PRLH2 PRLL3 PRLH3 PPGC2 PPGC3 PCS23 clock control register reload register (lower) reload register (upper) reload register (lower) reload register (upper) control register control register clock control register Prohibited area UDRL0 UDRH0 UDRL1 UDRH1 UDRL2 UDRH2 UDRL3 UDRH3 UDRL4 UDRH4 data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data buffer array XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB (Continued) 8/16-bit timer XXXX0000B XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB 00000001B 00000001B 000000XXB Dual operating FLASH 00000000B 00000000B 00XXXXX0B
MB90378 Series
Address 003FCAH 003FCBH 003FCCH 003FCDH 003FCEH 003FCFH 003FD0H 003FD1H 003FD2H 003FD3H 003FD4H 003FD5H 003FD6H 003FD7H 003FD8H 003FD9H 003FDAH 003FDBH 003FDCH 003FDDH 003FDEH 003FDFH 003FE0H 003FE1H 003FE2H 003FE3H 003FE4H 003FE5H 003FE6H 003FE7H 003FE8H 003FE9H 003FEAH 003FEBH 003FECH 003FEDH
Abbreviation UDRL5 UDRH5 UDRL6 UDRH6 UDRL7 UDRH7 UDRL8 UDRH8 UDRL9 UDRH9 UDRLA UDRHA UDRLB UDRHB UDRLC UDRHC UDRLD UDRHD UDRLE UDRHE UDRLF UDRHF DNDL0 DNDH0 DNDL1 DNDH1 DNDL2 DNDH2 DNDL3 DNDH3 DNDL4 DNDH4 DNDL5 DNDH5 DNDL6 DNDH6
Register data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) data register (lower) data register (upper) DOWN data register (lower) DOWN data register (upper) DOWN data register (lower) DOWN data register (upper) DOWN data register (lower) DOWN data register (upper) DOWN data register (lower) DOWN data register (upper) DOWN data register (lower) DOWN data register (upper) DOWN data register (lower) DOWN data register (upper) DOWN data register (lower) DOWN data register (upper)
Byte Word Resource name access access data buffer array
Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB (Continued)
MB90378 Series
(Continued) Address 003FEEH 003FEFH 003FF0H 003FF1H 003FF2H, 003FF3H 003FF4H 003FF5H 003FF6H 003FF7H 003FF8H 003FF9H 003FFAH 003FFBH 003FFCH 003FFDH 003FFEH 003FFFH TMCSRL6 TMCSRH6 TMR6/ TMRD6 PRLL0 PRLH0 PRLL1 PRLH1 PPGC0 PPGC1 PCS01 Abbreviation DNDL7 DNDH7 DBAAL DBAAH Register DOWN data register (lower) DOWN data register (upper) Data buffer array address register (lower) Data buffer array address register (upper) Byte Word Resource name access access Prohibited area Timer control status register (lower) Timer control status register (upper) 16-bit timer/reload register reload register (lower) reload register (upper) reload register (lower) reload register (upper) control register control register clock control register Prohibited area 8/16-bit timer 16-bit reload timer (ch6) 00000000B -0000B XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB 00000001B 00000001B 000000XXB data buffer array Initial value XXXXXXXXB XXXXXXXXB XXXXXXXXB XXXXXXXXB
Meaning abbreviations used reading writing Readable writable Read-only Write-only Explanation initial values initialized initialized initial value undefined. used. initial value undefined. Instruction using addressing e.g. supported registers area 003F80H 003FFF
MB90378 Series
INTERRUPT FACTORS, INTERRUPT VECTORS, INTERRUPT CONTROL REGISTER
Interrupt cause Reset INT9 instruction Exception processing converter conversion termination Timebase timer UPI0 IBF/LPC reset UPI1 UPI2 UPI3 DTP/ext. interrupt channels detection DTP/ext. interrupt channels detection DTP/ext. interrupt channels detection Key-on wake-up interrupt detection UPI0/1/2/3 16-bit timer 8/16-bit timer PS/2 interface PS/2 interface Watch timer transfer complete error 16-bit timer DTP/ext. interrupt channels detection Multi-address transfer complete error Extend External Interrupt 07/08 timeout standby wake-up 16-bit reload timer 1/2/5 underflow Multi-address timeout standby wake-up 16-bit reload timer 3/4/6 underflow UART1 receive UART1 send UART2 receive UART2 send UART3 receive UART3 send Flash memory status Delayed interrupt generator module
EI2OS support
Interrupt vector Number Address FFFFDCH FFFFD8H FFFFD4H FFFFD0H FFFFCCH FFFFC8H FFFFC4H FFFFC0H FFFFBCH FFFFB8H FFFFB4H FFFFB0H FFFFACH FFFFA8H FFFFA4H FFFFA0H FFFF9CH FFFF98 FFFF94 FFFF90 FFFF8CH FFFF88 FFFF84 FFFF80 FFFF7CH FFFF78 FFFF74 FFFF70 FFFF6CH FFFF68 FFFF64 FFFF60 FFFF5CH FFFF58 FFFF54
Interrupt control register Address
Priority*2 High
ICR00 ICR01 ICR02 ICR03 ICR04 ICR05 ICR06 ICR07 ICR08
0000B0H*1 0000B1H*1 0000B2H*1 0000B3H*1 0000B4H*1 0000B5H*2 0000B6H*1 0000B7H*1 0000B8H*1
ICR09
0000B9H*1
ICR10 ICR11 ICR12 ICR13 ICR14 ICR15
0000BAH*1 0000BBH*1 0000BCH*1 0000BDH*1 0000BEH*1 0000BFH*1
(Continued)
MB90378 Series
(Continued) used interrupt request flag cleared EI2OS interrupt clear signal. Cannot used. used support EI2OS stop request. used.
peripheral functions that share register, interrupt level will same. extended intelligent service used with peripheral function that shares register with another peripheral function, service started either function. EI2OS clear supported, both interrupt request flags interrupt causes cleared EI2OS interrupt clear signal. recommended mask either interrupt request during EI2OS. EI2OS service cannot started multiple times simultaneously. Interrupt other than operating interrupt masked during EI2OS operation. recommended mask either interrupt requests during EI2OS.
This priority applied when interrupts same level occur simultaneously.
MB90378 Series
ELECTRICAL CHARACTERISTICS
Absolute Maximum Rating
Parameter Power supply voltage*1 converter reference input voltage*1 power supply voltage*1 Input voltage*
Symbol AVCC
Rating
Unit AVCC AVCC
Remarks
AVR,
AVSS
must exceed pins except P45, P82, P45, P82, pins except pins except Average output current operating current operating efficiency Average output current operating current operating efficiency
Output voltage*
ICLAMP |ICLAMP| IOL1 IOL2 IOLAV1
Maximum clamp current Total maximum clamp current level maximum output current
level average output current IOLAV2 level total maximum output current level total average output current level maximum output current level average output current level total maximum output current level total average output current Power consumption Operating temperature Storage temperature
IOLAV IOHAV IOHAV Tstg
(Continued) Average output current operating current operating efficiency Average output current operating current operating efficiency Average output current operating current operating efficiency
MB90378 Series
(Continued) This parameter based AVSS when power AVCC same voltage. Take care that does exceed turned shall never exceed maximum output current peak value corresponding pin. within recommended operating conditions. voltage (current). signal should always applied limiting resistance placed between signal microcontroller. value limiting resistance should that when signal applied input current microcontroller does exceed rated values, either instantaneously prolonged periods. Note that when microcontroller drive current low, such power saving modes, input potential pass through protective diode increase potential pin, this affect other devices. Note that signal input when microcontroller power supply (not fixed power supply provided from pins, that incomplete operation result. Note that input applied during power-on, power supply provided from pins resulting supply voltage sufficient poerate power-on reset. Care must taken leave input open. Note that analog system input/output pins other than input pins (LCD drive pins, etc.) cannot accept signal input. Sample recommended circuits Input/output equivalent circuits
Protective diode
Limiting resistance input
WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum ratings. exceed these ratings.
MB90378 Series
Recommended Operating Conditions
(VSS Parameter Power supply voltage converter reference input voltage power supply voltage Operating temperature Symbol Value AVCC Unit Remarks Normal operation assurance range Retains state stop mode Normal operation assurance range pins (The optimum value dependent element use.) AVSS
operating voltage varies with operation frequency. AVCC same voltage. Take care that does exceed when power turned WARNING: recommended operating conditions required order ensure normal operation semiconductor device. device's electrical characteristics warranted when device operated within these ranges. Always semiconductor devices within their recommended operating condition ranges. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their FUJITSU representatives beforehand.
MB90378 Series
Characteristics
(VCC Parameter Symbol AVCC name P17, P27, P37, P46, P47, P57, PC7, P07, P67, P77, P86, PA7, PB7, PE7, PF7, Condition AVSS Unit Remarks Value
CMOS input pins
VIHS level input voltage VIHS5
CMOS hysteresis input pins tolerant CMOS hysteresis input pins tolerant CMOS input pins SMbus input pins Mode pins CMOS input pins
VIH5 VIHSM VIHM
P50, P80, P81, P17, P27, P37, P46, P47, P57, P82, PC7, P07, P45, P67, P77, P86, PA7, PB7, PE7, PF7, P80, P81, P45, P50, P82, P46, port pins except P46, P50, P82, P95, port pins except IOH1 IOL1 IOL2
level input voltage
VILS
CMOS hysteresis input pins SMbus input pins Mode pins
VILSM VILM Open-drain output application voltage level output voltage level output voltage
12.0
VOH1
VOL1 VOL2
(Continued)
MB90378 Series
Parameter Input leakage current (Hi-Z output leakage current) Open-drain output leakage current
Symbol
name
Condition
Value
Unit
Remarks
input pins P46, P50, P82, P95,
ILEAK
Internal operation Internal operation MHz, sleep mode External kHz, Internal operation kHz, sub-clock mode, External kHz, Internal operation kHz, sub-clock sleep mode, External kHz, Internal operation kHz, watch mode, Internal operation MHz, timebase timer mode stop mode,
ICCS
ICCL Power supply current*
ICCLS
ICCWAT
ICCT Power supply current* ICCH Input capacitance input pins except VCC, AVCC, VSS, AVSS
(Continued)
MB90378 Series
(Continued) Parameter Symbol name Condition Between divided resistance RLCD Between Between Between COM0 COM3 RVSEG SEG0 SEG8 COM0 COM3, SEG0 SEG8 P07,P10 P17, P27,P30 P37, Value Unit Remarks
COM0 COM3 output impedance SEG0 SEG8 output impedance leakage current Pull-up resistance Pull-down resistance
RVCOM
LLCDL
RDOWN
MB90V378 only
current value preliminary value subject change enhanced characteristics without previous notice. power supply current measured with external clock.
MB90378 Series
Characteristics
Clock Timings (VCC Parameter AVCC Value AVSS Unit Remarks
Symbol name Condition
(When stops) When using oscillation circuit When using oscillation circuit When using oscillation circuit When using oscillation circuit When using oscillation circuit
Clock frequency
6.67
(When stops) When using external clock When using external clock When using external clock When using external clock When using external clock
Clock cycle time Frequency fluctuation rate locked* Input clock pulse width Input clock rise/fall time Internal operating clock frequency Internal operating clock cycle time tHCYL tLCYL PWHL PWLL fLCP tLCP 122.1 8.192 15.2 X0A, X0A, 31.25 30.5 32.768
6.67
Recommend duty ratio Recommend duty ratio External clock operation
Main clock operation Sub-clock operation Main clock operation Sub-clock operation
MB90378 Series
clock timing
tHCYL
X0A, clock timing
tLCYL
PWHL
PWLL
MB90378 Series
operation guarantee range
Relationship between machine clock frequency power supply voltage
Power supply voltage
Machine clock (MHz) Operation guarantee range Normal operation guarantee range Guaranteed oscillation frequency range
Relationship between external clock frequency machine clock frequency
Guaranteed oscillation frequency range
Machine clock (MHz)
(PLL off)
6.67
External clock (MHz)*
When using crystal oscillator ceramic oscillator, maximum oscillation clock frequency MHz.
MB90378 Series
ratings measured following measurement reference voltages Input signal waveform Output signal waveform
Hysteresis input
Output
CMOS input
SMbus input
MB90378 Series
Reset Input Timing (VCC Parameter Symbol AVCC Condition Value Reset input time tRSTL Oscillation time oscillator* AVSS Unit Remarks Normal operation stop mode sub-clock mode
name
Oscillation time oscillator time reach oscillation amplitude from stand still. crystal oscillator, oscillation time between several tens FAR/ceramic oscillator, oscillation time between hundreds several external clock, oscillation time Note internal operating clock cycle time. Refer "(1) Clock Timings" rating tCP.
stop mode
tRSTL
oscillation amplitude
Internal operation clock
Oscillation time oscillator
Oscillation stabilization time Instruction execution
Internal reset
MB90378 Series
Power-on Reset (VCC Parameter Power supply rise time Power supply cut-off time AVCC Value AVSS Unit repeated operations Remarks
Symbol name Condition tOFF VCC* VCC*
must kept lower than before power-on. Notes above values used causing power-on reset. Some registers device initialized only upon power-on reset. initialize these registers, turn power supply using above values. Make sure that power supply rises within selected oscillation stabilization time. power supply voltage needs varied course operation, smooth voltage rise recommended.
tOFF
Sudden changes power supply voltage cause power-on reset. change power supply voltage while device operation, recommended raise voltage smoothly suppress fluctuations shown below. this case, change supply voltage with clock used. voltage drop fewer second, however, clock.
data hold
recommended keep rising speed supply voltage mV/ms slower.
MB90378 Series
UART1 UART3 (VCC AVCC Parameter Serial clock cycle time Valid delay time valid hold time Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX name UCK1 UCK3 UCK1 UCK3, output UCK1 UCK3, internal shift clock mode UCK1 UCK3, UCK1 UCK3 UCK1 UCK3 UCK1 UCK3, output external shift clock UCK1 UCK3, mode UCK1 UCK3, Condition AVSS Value Unit Remarks
Serial clock pulse width Serial clock pulse width Valid Notes delay time valid hold time
These ratings synchronous mode. load capacitance value connected pins while testing. internal operating clock cycle time. Refer "(1) Clock Timings" rating tCP.
MB90378 Series
Internal shift clock mode
tSCYC tSLOV
tIVSH
tSHIX
Internal shift clock mode
tSLSH tSLOV tSHSL
tIVSH
tSHIX
MB90378 Series
Resources Input Timing (VCC Parameter Timer input pulse width
AVCC name TIN1 TIN6
Condition
Symbol tTIWH tTIWL
AVSS Value
Unit Remarks
Note internal operating clock cycle time. Refer "(1) Clock Timings" rating tCP.
TIN1 TIN6
tTIWH tTIWL
Trigger Input Timing (VCC Parameter Symbol AVCC name ADTG, INT0 INT7, EEI0 EEI15, KSI0 KSI7 Value AVSS Unit Remarks Normal operation Stop mode
Condition
Input pulse width
tTRGH tTRGL
Note internal operating clock cycle time. Refer "(1) Clock Timings" rating tCP.
INT0 INT7 EEI0 EEI15 KSI0 KSI7
tTRGH tTRGL
ADTG
tTRGH tTRGL
MB90378 Series
Multi-address Timing (VCC AVCC Parameter Start condition output Stop condition output Start condition detect Stop condition detect Restart condition output Restart condition detect output width output width output delay output setup time after interrupt input pulse input pulse output setup time hold time Notes Symbol name tSTA tSTO tSTA tSTO tSTASU tSTASU tLOW tHIGH tDOSU tHIGH SCL, SCL, SCL, SCL, SCL, SCL,
Value
AVSS
Unit Remarks Master mode Master mode
Master mode
Master mode Master mode
internal operating clock cycle time. Refer "(1) Clock Timings" rating tCP. setting shift clock oscillation defined "ICCR register (CS4, CS3)" "MCCR register (CS4, CS3)". Please refer MB90378 series manual details. setting shift clock oscillation defined "ICCR register (CS2 CS0)" "MCCR register (CS2 CS0)". Please refer MB90378 series manual details. tDOSU shown interrupt time longer than width SCL. output value specified condition that rise/fall time ns".
stop condition transferring next byte. After setting register IBCRH restart.
MB90378 Series
Data transmit (master/slave)
tDOSU
tSTASU tSTA tLOW
Data receive (master/slave)
tDOSU
tHIGH tLOW
tSTO
MB90378 Series
PS/2 Interface Timing (VCC Parameter PSCK clock cycle time PSCK PSDA Symbol tPCYC tPLOV tPIVSH tPHIX tPHSL tPLSH AVCC Unit Remarks Value
name PSCK0 PSCK2, PSDA0 PSDA2
Condition
PSCK0 PSCK2, Transmission Mode PSDA0 PSDA2 PSCK0 PSCK2, PSDA0 PSDA2 Reception Mode PSCK0 PSCK2, PSDA0 PSDA2 PSCK0 PSCK2, PSDA0 PSDA2 PSCK0 PSCK2, PSDA0 PSDA2
Valid PSDA PSCK PSCK valid PSDA hold time PSCK clock pulse width PSCK clock pulse width
Note internal operating clock cycle time. Refer "(1) Clock Timings" rating tCP.
tPCYC
PSCK0 PSCK1 PSCK2
Transmission Mode
PSDA0 PSDA1 PSDA2
tPLOV
Reception Mode
PSDA0 PSDA1 PSDA2
tPIVSH
tPHIX
MB90378 Series
Timing (VCC Parameter LCLK cycle time LCLK high time LCLK time AVCC name AVSS Value Unit Remarks
Symbol tCYCLE tHIGH tLOW
Condition
LCLK timing
tCYCLE tHIGH LCLK tLOW
MB90378 Series
Parameter Output valid delay Float active delay Active float delay Input setup time Input hold time
Symbol name Condition tVAL tOFF
Value
Unit
Remarks
LAD, LFRAME, GA20 timing
LCLK
tVAL
OUTPUT Delay Tri-state OUTPUT tOFF
LCLK
INPUT
MB90378 Series
Converter Electrical Characteristics
(2.7 Parameter Resolution Total error Non-linear error Differential linearity error Zero transition voltage Full-scale transition voltage AN11 AN11 AVSS AVSS Symbol AVSS, AVCC Value AVSS AVSS AVSS Unit MB90V378 MB90F378 Actual value specified values specified ADCR0 CT1, ADCR0 ST1, ST0. sure that setting value greater than value Actual value specified ADCR0 ST1, bits. sure that setting value greater than value Remarks name
VFST
Conversion time
Sampling period Analog port input current Analog input voltage Reference voltage Power supply current Reference voltage supply current Offset between channels AN11 AN11 AVCC AN11
IAIN VAIN
AVSS AVSS
AVCC
AVCC
current when converter operating stop mode (for
MB90378 Series
Converter Glossary
Resolution Analog changes that identifiable with converter. Linearity error deviation straight line connecting zero transition point ("00 0000 0000" 0000 0001") with full-scale transition point ("11 1111 1110" 1111 1111") from actual conversion characteristics. Differential linearity error deviation input voltage needed change output code from theoretical value. Total error total error defined difference between actual value theoretical value, which includes zero-transition error/full-scale transition error linearity error.
Total error
3FFH 3FEH 3FDH LSB} Actual conversion value
004H 003H 002H 001H AVRL Analog input
(Measured value) Actual conversion value Theoretical characteristics AVRH
Total error digital output (Theoretical value) (Theoretical value) VFST (Theoretical value)
LSB}
[LSB]
AVss 1024 AVss
Voltage transition digital output from
(Continued)
MB90378 Series
(Continued) Linearity error
3FFH 3FEH 3FDH Digital output Actual conversion value VFST (Measured value) Digital output (Measured value) Actual conversion value
Differential linearity error
Theoretical characteristics Actual conversion value
004H 003H 002H
(Measured value) (Measured value)
Theoretical characteristics 001H (Measured value) AVRL Analog input AVRH
Actual conversion value AVRH Analog input
AVRL
Linearity error digital output Differential linearity error digital output
VOT}
[LSB]
[LSB]
VFST 1022
Voltage transition digital output from "000H" "001H" VFST Voltage transition digital output from "3FEH" "3FFH"
MB90378 Series
Notes Using Converter
About external impedance analog input sampling time converter with sample hold circuit. external impedance high keep sufficient sampling time, analog voltage charged internal sampling hold capacitor insufficient, adversely affecting conversion precision. Analog input circuit model
Analog input During sampling Comparator
Note values reference values.
MB90F378/V378
(Max)
(Max)
satisfy conversion precision standard, consider relationship between external impedance minimum sampling time either adjust resistor value operating frequency decrease external impedance that sampling time longer than minimum value. relationship between external impedance minimum sampling time
[External impedance
[External impedance
External impedance
External impedance
MB90F378/V378
MB90F378/V378
Minimum sampling time
Minimum sampling time
sampling time cannot sufficient, connect capacitor about analog input pin. About errors |AVR AVSS| becomes smaller, values relative errors grow larger.
MB90378 Series
Electrical Characteristics
(VCC Parameter Resolution Differential linearity error Non-linearity error Conversion time Analog output impedance Power supply current IDVR IDVRS AVCC AVCC stops Symbol name AVCC AVSS Value Unit Remarks
Condition
With load capacitance
Serial Electrical Characteristics
(VCC Parameter level input voltage level input voltage level output voltage level output voltage AVCC AVSS Unit Remarks Value
Symbol name Condition
Flash Memory Program/Erase Characteristics
Parameter Sector erase time Kbytes sector) Sector erase time Kbytes sector) Chip erase time Byte (8-bit width) programing time Program/Erase cycle 10,000 Condition Value 3,600 Unit cycle Remarks Excludes programming prior erasure Excludes programming prior erasure Excludes programming prior erasure Except over head time system
MB90378 Series
EXAMPLE CHARACTERISTICS (MB90F378)
Power Supply Current
[mA]
50.0
Fcin
ICCS [mA]
18.0
Fcin
16.0 40.0
Fcin Fcin
14.0
Fcin
12.0 30.0
Fcin Fcin
10.0
Fcin
20.0
Fcin
10.0
Fcin
Fcin
Fcin
ICCH
(Continued)
MB90378 Series
(Continued)
VOH1
VOH2
IOH1 [mA]
IOH2 [mA]
VOL1
VOL2
IOL1 [mA]
IOL2 [mA]
MB90378 Series
ORDERING INFORMATION
Part number MB90F378PFF-GE1 Package 144-pin Plastic LQFP (FPT-144P-M12) Remarks
MB90378 Series
PACKAGE DIMENSION
144-pin plastic LQFP (FPT-144P-M12)
18.00±0.20(.709±.008)SQ +0.40 *16.00 -0.10 .630 +.016 -.004
Note These dimensions include resin protrusion. Resin protrusion +0.25(.010)Max(each side). Note Pins width pins thickness include plating thickness. Note Pins width include cutting remainder.
0.08(.003)
Details part 1.50 -0.10 .059 -.004
+0.20 +.008
(Mounting height)
INDEX
0~8°
0.60±0.15 (.024±.006) 0.10±0.05 (.004±.002) (Stand off) 0.25(.010)
LEAD
0.40(.016)
0.18±0.035 .007±.001
0.07(.003)
0.145 -0.03 .006
+.002 -.001
+0.05
2003 FUJITSU LIMITED F144024S-c-3-3
Dimensions (inches). Note: values parentheses reference values.
MB90378 Series
FUJITSU LIMITED
Rights Reserved. contents this document subject change without notice. Customers advised consult with FUJITSU sales representatives before ordering. information, such descriptions function application circuit examples, this document presented solely purpose reference show examples operations uses Fujitsu semiconductor device; Fujitsu does warrant proper operation device with respect based such information. When develop equipment incorporating device based such information, must assume responsibility arising such information. Fujitsu assumes liability damages whatsoever arising information. information this document, including descriptions function schematic diagrams, shall construed license exercise intellectual property right, such patent right copyright, other right Fujitsu third party does Fujitsu warrant non-infringement third-party's intellectual property right other right using such information. Fujitsu assumes liability infringement intellectual property rights other rights third parties which would result from information contained herein. products described this document designed, developed manufactured contemplated general use, including without limitation, ordinary industrial use, general office use, personal use, household use, designed, developed manufactured contemplated accompanying fatal risks dangers that, unless extremely high safety secured, could have serious effect public, could lead directly death, personal injury, severe physical damage other loss (i.e., nuclear reaction control nuclear facility, aircraft flight control, traffic control, mass transport control, medical life support system, missile launch control weapon system), requiring extremely high reliability (i.e., submersible repeater artificial satellite). Please note that Fujitsu will liable against and/or third party claims damages arising connection with above-mentioned uses products. semiconductor devices have inherent chance failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. products described this document represent goods technologies subject certain restrictions export under Foreign Exchange Foreign Trade Japan, prior authorization Japanese government will required export those products from Japan.
F0504 2005 FUJITSU LIMITED Printed Japan

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