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EE-181
Technical Notes using Analog Devices' components development tools
Contact technical support phone: (800) ANALOG-D e-mail: dsp.support@analog.com visit on-line resources http://www.analog.com/dsp
Interfacing ADSP-BF535 Blackfin® Processor Single-CHIP Digital Camera "OV6630" over External Memory
Contributed Thorsten Lorenzen April 2003
Introduction
purpose this note describe hook video devices like (Common Interface Format) Single-Chip Digital Camera external ADSP-BF535 Blackfin® Processor. Because architecture video processing capabilities, Blackfin Processors will interface with video devices. ADSP-BF535 first part Blackfin family equipped with standard interface that glueless interact with video devices. This note dedicated show Asynchronous Interface used receive video sizes.
must linked ADSP-BF535 data transfers. Additionally, some pins required device control configuration purposes. HREF asserted (polarity chosen) indicates active video pixels (image data).
Output Format OV6630
OV6630 CMOS Image sensor provided single chip video/imaging camera device designed provide high level functionality single, small-footprint package. more details about functionality referred internet address below. order explain been accessed ADSP-BF535 Processor schematic required output pins figure 2.1. datasheet OV6630 found www.ovt.com seen figure pins Y[7:0] UV[7:0] required transfer data. PCLK represents clock aligned data. Each raising edge PCLK will indicate valid data bus. These pins necessary
Figure
Because programmable sensor size discussed below HREF provides distinguish between active video pixels blank data. blank data modified senor field will also transferred represented "10" Y[7:0] "80" UV[7:0]. Figure shows transfer pixel, blanking HREF indicating active pixel. configuration sensor output over -bit this note. pixel exists byte luminance byte
Copyright 2003, Analog Devices, Inc. rights reserved. Analog Devices assumes responsibility customer product design application customers' products infringements patents rights others which result from Analog Devices assistance. trademarks logos property their respective holders. Information furnished Analog Devices Applications Development Tools Engineers believed accurate reliable, however responsibility assumed Analog Devices regarding technical accuracy topicality content provided Analog Devices' Engineer-to-Engineer Notes.
chrominance information that transferred same time. VSYNC channel HREF channel seen sensor transfer e.g. lines HREF will asserted times also. Each start frame will indicated VSYNC around before HREF asserts.
Figure
windowing feature OV6630 image sensors allows user-definable window sizing required application. Window size setting pixels) ranges from 292, positioned anywhere inside boundary. Note that modifying window size and/or position does change frame data rate. OV6630 imager alters assertion HREF signal consistent with programmed horizontal vertical region. default output window 288. Figure shows graphically.
Figure
video output port OV6630 image sensor provides number output format standard options suit many different application requirements. These formats user programmable through Omnivision's SCCB wire control interface. OV6630 imager supports both ITU-601 ITU-656 output formats different configurations. this note sensor provide differential video signals (YUV) 4:2:2, 16-bit wide clocked 8.867MHz (PCLK).
Asynchronize Interface ADSP-BF535 Blackfin Processor
Processors asynchronous interface used receive video data. 32-bit data fetched manner shown figure 3.1.
Figure
order detect first line each frame signal VSYNC asserts before. Figure shows
Interfacing ADSP-BF535 Blackfin® Processor Single-CHIP Digital Camera "OV6630" over External Memory (EE-181) Page
Figure
Figure
mentioned ADSP-BF535 Blackfin Hardware Reference Manual after read cycle initiated Async Memory Select line (/AMS) Async Ouput Enable line (/AOE) Async Read Enable line (/ARE) become asserted. After multicycle "Read Access" delay (Configured Async Interface Bank Control Register), /ARE normally de-assert complete read operation. interface configured extend access, /ARE remains until ARDY been sampled high. data will fetched cycle after this happened. architecture ADSP-BF535, DMA-controlled data download somewhat non-intuitive. Each data transfer split into bursts eight read access. After burst, appears because internal activity. Figure illustrates this. shown figure, first read data words (shown Channel /ARE signal). large before next required loading next descriptor.
Note also that each transfer split into bursts eight accesses this configuration, four bursts execution). Understanding this behavior crucial developing proper interface. Figure zooms into these burst patterns analyze many cycles taken each access.
Figure
peripheral clock "SCLK" displayed channel channel shows /ARE pin. After eight read strobes done nine extra cycles taken place data into internal memory.
Interfacing ADSP-BF535 Blackfin® Processor Single-CHIP Digital Camera "OV6630" over External Memory (EE-181) Page
Interface ADSP-BF535 Processor into OV6630
ADSP-BF535 configured make full 32-bit external memory interface, order gain maximum throughput. 16-bit words from camera will packed into 32-bit word before being read Blackfin Processor. interface single-chip camera, LVT16374 latches used. These parts able fetch data received from video device latch until Asynchronous Interface been read. 8.867 PCLK OV6630 clocks 74HC74 configured divider. 4.43 output then clocks LVT16374 fetch data transmitted Y[7:0] UV[7:0] rising edge. data will held LVT16374 until next rising edge CLOCK "CK" appears. When asserts, Processor reads data latched LVT16374. ARDY used synchronize video data with ADSP-BF535. long ARDY low, access held off? This way, camera able control asynchronous memory interface. routing GPIO PWDN OV6630, sensor turned without lose configurations done during setup time SCCB bus. routing GPIO PWDN OV6630, sensor turned without lose configurations done during setup time SCCB bus. ADSP-BF535 provides 256kBytes internal Memory. frame video contains pixels. Each pixel represented bytes under 4:2:2 digital component video representation. This equates 202,752 bytes frame. shown Figure 5.2, storing blanking data well would obviously cause memory overflow. gate shown Figure stops data transfer avoid storing blanking data internal memory. gate controlled HREF signal camera. HREF remains high during active video transfers. memory will filled just with active video data. detect first line each frame, VSYNC signal used mentioned section VSYNC connected programmable flag generates interrupt before start frame. This interrupt will enable transfer. Figure shows timing requirements camera Processor met.
Data Structure Improvements
mentioned section camera sends active data plus blanking data sequentially. Blanking data does fill internal memory doesn't contain useful information.
Interfacing ADSP-BF535 Blackfin® Processor Single-CHIP Digital Camera "OV6630" over External Memory (EE-181) Page
Figure
Interfacing ADSP-BF535 Blackfin® Processor Single-CHIP Digital Camera "OV6630" over External Memory (EE-181) Page
raising edge PCLCK video data taken half frequency each raising edge PCLCK will change state FlipFlops output "74HC74". Each rising edge 74HC74s will fetch data certain latch.
OV6630 PCLCK 8.867 OV6630 Data Port Y[7:0]
74HC74 [Q0] LVT16374 [CK] 4.43 74HC74 [Q0/] Bottom LVT16374 [CK] ARDY
AOE/ LVT16374 Q[15:0] D[15:0]
Each rising edge 74HC74s will data output
/AOE remains until ARDY sampled high
Each rising edge /AOE will fetch bits data into Figure
After each read burst access takes longer. That does affect transfer
Interfacing ADSP-BF535 Blackfin® Processor Single-CHIP Digital Camera "OV6630" over External Memory (EE-181) Page
Figure
Interfacing ADSP-BF535 Blackfin® Processor Single-CHIP Digital Camera "OV6630" over External Memory (EE-181) Page
Conclusion:
goal this project show video sources connected ADSP-BF535 with less glue logic possible. fact, maximum resolution that achieved video formats (352 288). actual resolution limited limitation Blackfins external port timing, structure internal memory. external port halts during processor loads next descriptor when been expired. That causes large timing (mentioned chapter would meet requirement camera. this problem downloading each frame separately. expires after receiving each frame will reloaded during camera send blank data anyway (The camera sends blank data between each line each frame). Word Count Register limited maximum 65,536 (2^16). frame format video 4:2:2 standard represented 202,752 bytes (352*288 pixels bytes) Processor accesses over 32-bit interface results 50,688 words (202,752bytes (bytes/word)). That fits DMAs Word Count Register. Resolutions higher than could probably served frame frame basis. That causes become reloaded during active video pixel transfers results data misses. Building interface like done this note access SDRAM SRAM supported anymore. Except PCI, SPORT, data just stored memory. ADSP-BF535 provides memory 256k bytes memory. memory able keep frame video consisting 202,752 bytes. Higher resolutions does picture system shown figure
Video transfers with higher resolutions than revered Note: "Interfacing ADSP-BF535 ADV7185/3 NTSC/PAL video decoder over External Memory Bus". This Note available soon.
Interfacing ADSP-BF535 Blackfin® Processor Single-CHIP Digital Camera "OV6630" over External Memory (EE-181) Page
Figure
References:
-www.ovt.com -OV6630 Datasheet -OV7610MD Board -ADSP-BF535 Datasheet -ADSP-BF535 Blackfin Hardware Reference -VisualDSP++3.0
Interfacing ADSP-BF535 Blackfin® Processor Single-CHIP Digital Camera "OV6630" over External Memory (EE-181) Page
Document History
Version April 2003 January 2003 January 2003 August 2002 Description Ported code example VisualDSP++ Changed according Blackfin naming convention. Typos. Schematics, Gerber files PDFs attached site Initial release Rev.
Interfacing ADSP-BF535 Blackfin® Processor Single-CHIP Digital Camera "OV6630" over External Memory (EE-181) Page

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