AN1900 CDMA Upmixer Design Considerations Using MRFIC1854 Prepare

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AN1900 CDMA Upmixer Design Considerations Using MRFIC1854 Prepare

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AN1900 CDMA Upmixer Design Considerations Using MRFIC1854
Prepared Ricky Mak, Edmund Chan, Curtis Gong, Kelvin Leung Motorola SPS-WSSG RF/IF Applications Engineering
INTRODUCTION
This note focuses designing Motorola's MRFIC1854 with Qualcomm's MSM3000 based CDMA platform. order achieve excellent performance transmitter (Tx) chain well very good production yield, points strongly recommended.
Freescale Semiconductor, Inc.
DESIGN CONSIDERATIONS
order understand necessity keeping recommendations successful design, let's review typical architecture, shown Figure chain using CDMA mobile system (MS). baseband signal from MSM3000 first modulated into signal IFT3000 (Qualcomm). This modulated signal must then band limited before up-converting transmitting frequency upmixer. exciter power amplifier (PA) further amplify signal. dynamic range (DR) much must implemented chain order meet system power control requirement. This large provided three automatic gain control (AGC) amplifiers chain. IFT3000 about which corresponds control voltage ranging from amplifiers MRFIC1854 have total about with control voltage ranging from Based power control algorithm (both open closed loops), MSM3000 outputs pulse density modulation (PDM) control signal adjust gain.
order best performance, total gain must distributed properly among these three amplifiers. much gain IFT3000 results adjacent channel power rejection (ACPR) problem whereas little gain results excess noise issue. improve noise performance, also recommended insert filter prior upmixer. achieve better signal-to-noise ratio (SNR) ACPR, IFT3000 usually operated high output power region because both ACPR increase with output power. prevent amplifier upmixer MRFIC1854 from saturation, attenuator prior upmixer must used more attenuation required. However, gain control issue complicated following facts. Firstly, there normally only control available from MSM3000 baseband processor. Secondly, characteristics IFT3000 MRFIC1854 have different gain slopes. These points imply that three amplifiers cannot controlled independently even though level shifters used provide adequate control voltage ranges different amplifiers. other words, three voltages mapped each other. result, gain tolerance amplifier adversely affect pre-designed gain budget. example, IFT3000 needs drive harder case gain upmixer, which turn, causes ACPR problem overdriving upmixer. attenuation network must therefore designed with enough margins.
Figure System Block Diagram Chain CDMA
IFT3000* MRFIC1854
Vcntrl
Vcntrl
Product Qualcomm, Inc.
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AN1900
Figure IFT3000 MRFIC1854 Output Power Gain
OUTPUT POWER (dBm) Gain -100 -120 Gain Gain Product Qualcomm, Inc. IFT3000*
Vcontrol
Freescale Semiconductor, Inc.
Thirdly, MRFIC1854 designed used over entire dynamic range, limiting device operate linear portion curve result higher overall gain variation. Figure shows typical curves MRFIC1854. apparent that there about +8.0 gain variation middle curve compared about +1.0 gain variation ends. This suggests that whole MRFIC1854 must utilized allow loop adjust total gain itself dynamically. Limiting usable range MRFIC1854 result lack output power and/or amplifier saturation case gain devices. level shifting circuits MRFIC1854 must designed such cover entire range, i.e. from recommended apply fixed control voltage transition region amplifier neither. This enlarge effect gain variation. Lastly, nonlinearity compensation algorithm adopted MSM3000 places another constraint upon design. this platform, curve piece-wisely linearized into linear segments with each segment representing linear equation form where slope offset each segment, depicted Figure values bits) bits) found power calibration
stored sixteen 16-bit words RAS_RAM MSM3000. With six-bit input ranging from 0/64 63/64, resulting control (TX_AGC_ADJ) 9-bit signal. This suggests there most gain steps entire gain slope must carefully chosen. These linearized line segments compensate nonlinearity characteristics produce linear amplifier gain curve. effect device gain variation block chain causes open loop gain characteristics shifting x-direction, example, gain device results entire open loop gain curve shifting right side. consequence, larger output value must generated order produce same output power level. practice, long gains ends open loop curve remain unchanged, gain variation transition part amplifier cancelled after calibration. However, remind that gain budget will adversely affected explained before. case, only part curve MRFIC1854 covered, there chance that some gain devices cannot produce maximum output power even though maximum code input.
Figure Linearized Output
Linear amplifier gain Linearized Output line segments with slope Open Loop gain characteristics
Segment offset
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
Linearized Segments
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GAIN (dB)
Figure Improved System Block Diagram Chain CDMA
AN1900
IFT3000* MRFIC1854 Vcntrl Vcntrl Real time Changing PDM1 Products Qualcomm, Inc. Preset calibration Vcntrl
MSM3000*
Level Shifter
Freescale Semiconductor, Inc.
handle this issue, solutions more control signal scheme, described Figure additional output ("PDM1" "PDM2") used providing signal amplifiers, MRFIC1854, trim curve back preset position simply adding this voltage with TX_AGC_ADJ output. This trimming voltage found power calibration, which then converted back output signal. corresponding output value stored MSM3000 permanently. This method advantages reducing harmful effect gain variation individual device, less disturbance gain budget more accurate power calibration. other hand, those advantages expense MSM3000 control software modification, calibration program modification well little longer calibration time. Additional components
required because most current designs have incorporated OPAMP level shifting already. save calibration time, additional output normally zero. Additional calibration only done those failure matter using suggested scheme not, designing level shifting networks, data should collected gain characteristics both IFT3000 MRFIC1854, well gain variation gain variation data provide picture gains vary from device device basis. With consideration tolerance data, proper level shifting circuits designed with enough margins cover gain variation amplifiers minimize impact gain tolerance production yield.
REFERENCE
MRFIC1854A Data Sheet: CDMA Upmixer/Exciter
MOTOROLA WIRELESS SEMICONDUTOR www.freescale.com SOLUTIONS APPLICATIONS INFORMATION
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AN1900
Freescale Semiconductor, Inc.
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