AN1745 Freescale Semiconductor, Inc. Interfacing HC705C8A Mo
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Freescale Semiconductor, Inc.
Interfacing HC705C8A Module
Mark Glenewinkel Consumer Systems Group Austin, Texas
Introduction
More more applications requiring liquid crystal displays (LCD) effectively communicate outside world. This application note describes hardware software interface needed display information from MC68HC705C8A. Some suppliers provide only glass that waveforms needed directly drive segments have generated microcontroller (MCU) microprocessor (MPU). Other suppliers provide module, which glass segment drivers provided small packaged circuit board. This application note uses module from Optrex, part number DMC16207 (207). utilizes Hitachi driver, HD44780, provide segment waveforms simple parallel port interface that easily interfaces bus. Circuitry example code given also demonstrate ability providing pre-defined messages from EPROM memory. code easily modified take serial peripheral interface (SPI) serial communication interface (SCI) data display module.
Motorola, Inc., 1998
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Freescale Semiconductor, Inc. Application Note Module Hardware Interface
Optrex many module configurations that have varying display lines display line character lengths. module 2-line, 16-character/line display. Each character displayed using pixel font matrix. module character generator capable displaying ASCII characters. parallel interface work with either 4-bit 8-bit buses. Once data presented bus, latched clocking device. Depending pin, data will used instruction ASCII character.
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Descriptions
Table describes interface pins found module. Table Module Pinout
Signal Power Power Power (ground) drive voltage Selects registers Instruction register (for write), address counter (for read) Data register (for write read) Selects read write Write Read Starts data read/write falling edge Four high-order bidirectional three-state data pins. Used data transfer receive between 207. used busy flag. Four low-order bidirectional three-state data pins. Used data transfer receive between 207. These pins used during 4-bit operation. Function
14-11
DB7-DB4
10-7
DB3-DB0
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Application Note Module Hardware Interface
Timing Table Timing Electricals
Characteristic Enable cycle time Enable pulse width (high level) Enable rise decay time Address setup time, R/W, Symbol tCYCE PWEH tEr, tDDR tDSW tDHR Unit
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Data delay time Data setup time Data hold time (write) Data hold time (read) Address hold time
PWEH DB0-DB7 tDSW VALID DATA tCYCE
Figure Write Timing Operation
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Freescale Semiconductor, Inc. Application Note
PWEH DB0-DB7 tDDR VALID DATA tCYCE tDHR
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Figure Read Timing Operation Interface Figure Figure show examples 8-bit 4-bit timing sequences, respectively. Note that check needed maximum instruction execution time respected before sending another instruction.
INTERNAL OPERATION
EXEC TIME
DB7-DB0
DATA INSTRUCTION WRITE
BUSY BUSY FLAG CHECK
BUSY
DATA
BUSY FLAG CHECK
INSTRUCTION WRITE
Figure 8-Bit Timing Sequence
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Application Note Module Hardware Interface
4-bit interface data, only four lines (DB7-DB4) used transfer. lines DB3-DB0 disabled. data transfer completed after 4-bit data been transferred twice. four highorder bits transferred first (DB7-DB4), then low-order bits transferred (DB3-DB0).
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INTERNAL OPERATION
EXEC TIME BUSY
DB7-DB0
D7-D4
D3-D0
BUSY
D7-D4
D3-D0
INSTRUCTION WRITE
BUSY FLAG CHECK
BUSY FLAG CHECK
INSTRUCTION WRITE
Figure 4-Bit Timing Sequence
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Freescale Semiconductor, Inc. Application Note Module Software Interface
Instruction Commands
module many different configurations that easily implemented sending correct function command device. These commands listed Table followed explanation each function they execute. Table Module Instruction Code
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Instruction Clear display Return cursor home Entry mode Display on/off ctrl Cursor display shift Function CGRAM address DDRAM address Read busy flag &addr Write data DDRAM Read data from DDRAM
Execution time (max) 1.64 1.64
DDRAM: Display data CGRAM: Character generator ACG: CGRAM address ADD: DDRAM address; corresponds cursor address Address counter used both DDRAM CGRAM addresses
Clear Display
Clear display writes space code into DDRAM addresses. then sets DDRAM address into address counter returns display original status shifted. other words, display disappears cursor blinking goes left edge first line display. entry mode (increment mode). entry mode left unchanged.
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Application Note Module Software Interface
Return Cursor Home
Return cursor home sets DDRAM address into address counter returns display original status shifted. DDRAM contents change. cursor blinking goes left edge first line display.
Entry Mode
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Increments (I/D decrements (I/D DDRAM address when character code written into read from DDRAM. cursor blinking moves right when incremented left when decremented same applies writing reading CGRAM. Shifts entire display either right left (I/D when display does shift will seem cursor does move display does. display does shift when reading from DDRAM. Also, writing into reading from CGRAM does shift display.
Display On/Off Control
display when when When off, display data remains DDRAM, displayed instantly setting cursor displayed when displayed when Even cursor disappears, function other specifications will change during display data write. cursor displayed using five dots eighth line character. character indicated cursor blinks when blinking displayed switching between blank dots displayed characters speed 409.6-ms intervals when fOSC (HD44780 operating frequency) kHz. cursor blinking display simultaneously. (The blinking frequency changes according fOSC. example, when fOSC, kHz, 409.6 (250/270) 379.2 ms.)
Cursor Display Shift
Cursor display shift shifts cursor position display right left without writing reading display data. Table 4.This function used correct search display. 2-line display, cursor
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Freescale Semiconductor, Inc. Application Note
moves second line when passes 40th digit first line. first second line displays will shift same time. When displayed data shifted repeatedly, each line moves only horizontally. second line display does shift into first line position. address counter (AC) contents will change only action performed display shift.
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Table Cursor Display Shift Combination
Description Shifts cursor position left; decremented Shifts cursor position right; incremented Shifts entire display left; cursor follows display shift Shifts entire display right; cursor follows display shift
Function
Sets interface data length. Data sent received 8-bit lengths (DB7 DB0) when 4-bit lengths (DB7 DB4) when When 4-bit length selected, data must sent received twice. Sets number display lines Sets character font
NOTE:
Perform function instruction beginning program before executing instructions (except read busy flag address instruction). From this point, function instruction cannot executed unless interface data length changed.
CGRAM address sets CGRAM binary address ACG5-ACG0 into address counter. Data written read from CGRAM.
CGRAM Address
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Application Note Module Software Interface
DDRAM Address
DDRAM address sets DDRAM binary address ADD6-ADD0 into address counter. Data written read from DDRAM. Read busy flag address reads busy flag (BF) indicating that system internally operating previously received instruction. internal operation progress. next instruction will accepted until reset Check status before next write operation. same time, value address counter binary (AC6-AC0) read out. This address counter used both CGRAM DDRAM addresses, value determined previous instruction. address contents same instructions CGRAM address DDRAM address. Write data CGRAM DDRAM writes 8-bit data CGRAM DDRAM. write into CGRAM DDRAM determined previous specification CGRAM DDRAM address setting. After write, address incremented decremented automatically according entry mode. entry mode also determines display shift. Read data from CGRAM DDRAM reads 8-bit data from CGRAM DDRAM. previous designation determines whether CGRAM DDRAM read. Before entering this read instruction, either CGRAM DDRAM address instruction must executed. executed, first read data will invalid. When serially executing read instructions, next address data normally read from second read. address instructions need executed just before this read instruction when shifting cursor cursor shift instruction (when reading DDRAM). operation cursor shift instruction same DDRAM address instruction. After read, entry mode automatically increases decreases address However, display shift executed regardless entry mode.
Read Busy Flag Address
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Write Data CGRAM DDRAM
Read Data from CGRAM DDRAM
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Freescale Semiconductor, Inc. Application Note
Address Table shows address HD44780. character positions module shown first table with addresses shown beneath them. uses only first addresses.
NOTE:
Note that addresses bits wide when writing DDRAM, (bit always Therefore, write address $02, 8-bit data sent will binary 10000010%.
Understand that when display shifted, whole address used. other words, when shift right executed character address moved position first line display. Table Address
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Initialization Routines
ensure proper initialization module, sequence instruction codes must executed. These instructions data width, font type, number display lines. addition, cleared, entry mode data set. Figure shows power-on reset initialization 8-bit data bus, while Figure shows power-on reset initialization 4-bit data bus.
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Application Note Module Software Interface
POWER
WAIT MORE THAN AFTER RISES CANNOT CHECKED BEFORE THIS INSTRUCTION
FUNCTION INTERFACE BITS
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WAIT MORE THAN CANNOT CHECKED BEFORE THIS INSTRUCTION
FUNCTION INTERFACE BITS
WAIT MORE THAN CANNOT CHECKED BEFORE THIS INSTRUCTION
FUNCTION INTERFACE BITS
CHECKED AFTER THESE INSTRUCTIONS FUNCTION INTERFACE BITS SPECIFY DISPLAY LINES FONTS. SETTINGS CANNOT CHANGED AFTER THIS POINT. DISPLAY DISPLAY CLEAR ENTRY MODE
Figure Power-On Reset 8-Bit Initialization
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Freescale Semiconductor, Inc. Application Note
POWER
WAIT MORE THAN AFTER RISES CANNOT CHECKED BEFORE THIS INSTRUCTION FUNCTION INTERFACE BITS
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WAIT MORE THAN CANNOT CHECKED BEFORE THIS INSTRUCTION
FUNCTION INTERFACE BITS
WAIT MORE THAN CANNOT CHECKED BEFORE THIS INSTRUCTION
FUNCTION INTERFACE BITS
CHECKED AFTER THESE INSTRUCTIONS
FUNCTION INTERFACE BITS FUNCTION INTERFACE BITS SPECIFY DISPLAY LINES FONTS. SETTINGS CANNOT CHANGED. DISPLAY
DISPLAY CLEAR
ENTRY MODE
Figure Power-On Reset 4-Bit Initialization
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Application Note MC68HC705C8A Interface
MC68HC705C8A Interface
Choosing between 4-bit data usually defined (input/output) code space constraints application. analyze both, different test routines were written demonstrate 8-bit 4-bit configurations. Also, grounded write executions only. Since cannot check flag, delay times stated Table must observed.
Freescale Semiconductor, Inc.
Although these routines were tested MC68HC705C8A device, HC05 device with enough memory execute these routines. simple change memory should allow code ported other HC05s.
Hardware
code tested these development tools: M68MMPFB0508 MMEVS platform board X68EM05C9A series emulation module M68CBL05B noise flex cable M68TB05C9P40 40-pin PLCC target head adapter
schematic shown Figure shows typical circuit used interface MC68HC705C8A 207.
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Freescale Semiconductor, Inc. Application Note
MODULE
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VOLTAGE DETECT
RESET
4-MHz CLOCK CIRCUITRY
OSC1 OSC2
Figure Typical C8A-to-207 Circuit
Software
software written demonstrate MC68HC705C8A module interface shown following appendices. Appendix Flowcharts Appendix 8-Bit Code Appendix 4-Bit Code
flowchart roughly sketches routines. code written take pre-defined messages easily display them calling subroutine. MC68HC705C8A receiving messages from SCI, message temporary buffer change message routine start reading ASCII characters from start buffer.
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Application Note References
References
MC68HC705C8A Technical Data, Motorola order number MC68HC705C8A/D, Motorola, 1996. M68HC05 Applications Guide, Motorola order number M68HC05AG/AD/D, Motorola, 1996.
DMC-16207 Digikey #73-1025-ND.
Freescale Semiconductor, Inc.
1997 Optrex Databook Digikey #73-1001-ND.
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Freescale Semiconductor, Inc. Application Note Appendix Flowcharts
START
INITIALIZE PORT PINS WAIT
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SEND FUNCTION CODE WAIT
SEND FUNCTION CODE WAIT SEND FUNCTION CODE
FUNCTION CODE BUS, ROWS, DOTS LCD_WRITE
DISPLAY CODE DISPLAY CURSOR OFF, BLINKING LCD_WRITE
CLEAR DISPLAY CODE CLEAR DISPLAY, CURSOR ADDR LCD_WRITE WAIT
ENTRY MODE CODE INCREMENT, DISPLAY SHIFT LCD_WRITE
JUMP MESSAGE1
JUMP MESSAGE2
INFINITE LOOP
Figure Main Flowchart
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Application Note Appendix Flowcharts
LCD_WRITE
STORE DATA PORT
CLOCK
WAIT
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RETURN FROM
Figure LCD_Write Subroutine Flowchart
LCD_ADDR
CLEAR INSTRUCTION MODE
STORE DATA PORT
CLOCK
WAIT
INSTRUCTION MODE
RETURN FROM
Figure LCD_ADDR Subroutine Flowchart
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Freescale Semiconductor, Inc. Application Note
MESSAGE
LOAD WITH ADDRESS
LCD_ADDR
CLEAR INDEX REGISTER
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LOAD FROM POINTING MESSAGE BUFFER
BUFFER? LCD_WRITE
INCREMENT INDEX REGISTER
RETURN FROM
Figure Message Subroutine Flowchart
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Application Note Appendix 8-Bit Code
Appendix 8-Bit Code
File name: LCD_MOD8.ASM Example Code Module (HD44780) using 8-bit Ver: Date: April 1998 Author: Mark Glenewinkel Motorola Field Applications Consumer Systems Group Assembler: 1.02 code explanation flowcharts, please consult Motorola Application Note "Interfacing HC705C8A Module" Literature AN1745/D SYSTEM DEFINITIONS EQUATES Internal Register Definitions PORTA ;LCD control signals PORTB ;LCD data DDRA ;data direction PortA DDRB ;data direction PortB Application Specific Definitions LCD_CTRL LCD_DATA Memory Definitions EPROM MSG_STORAGE RESET
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;PORTA ;PORTB ;PORTA, ;PORTA, ;PORTA,
$160 $500 $1FFE
;start EPROM ;start ;start message block ;vector reset
VARIABLES TIME ;used delay time
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Freescale Semiconductor, Inc. Application Note
MAIN ROUTINE EPROM ;start EPROM Intialize Ports START LCD_CTRL ;clear LCD_CTRL LCD_DATA ;clear LCD_DATA #$FF ;make ports outputs DDRA ;PortA output DDRB ;PortB output INITIALIZE Wait #150T TIME VAR_DELAY Send Init Command bset bclr Wait Send Init Command bset bclr Wait Send Init Command
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;set delay time ;sub 0.1ms delay
#$38 LCD_DATA E,LCD_CTRL E,LCD_CTRL
;LCD init command ;clock data
#41T TIME VAR_DELAY
;set delay time ;sub 0.1ms delay
#$38 LCD_DATA E,LCD_CTRL E,LCD_CTRL
;LCD init command ;clock data
TIME VAR_DELAY
;set delay time ;sub 0.1ms delay
#$38 LCD_WRITE
;LCD init command ;write data
Send Function Command 8-bit bus, rows, dots #$38 LCD_WRITE Send Display Ctrl Command display cursor off, blinking #$0C LCD_WRITE
;function command ;write data
;display ctrl command ;write data
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Application Note Appendix 8-Bit Code
Send Clear Display Command clear display, cursor addr=0 #$01 LCD_WRITE #16T TIME VAR_DELAY Send Entry Mode Command increment, display shift #$06 LCD_WRITE
;clear display command ;write data ;set delay time ;sub 0.1ms delay
;entry mode command ;write data
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SEND MESSAGES address, send data DUMMY MESSAGE1 MESSAGE2 DUMMY ;send Message1 ;send Message2 ;done with example
SUBROUTINES Routine creates delay according formula TIME*100 using 2-MHz internal Cycle count instruction shown VAR_DELAY #33T deca TIME VAR_DELAY Routine sends Data LCD_WRITE LCD_DATA bset E,LCD_CTRL bclr E,LCD_CTRL #13T deca Routine sends Address LCD_ADDR bclr RS,LCD_CTRL LCD_DATA bset E,LCD_CTRL bclr E,LCD_CTRL #13T deca bset RS,LCD_CTRL AN1745 MOTOROLA More Information This Product, www.freescale.com
;clock data delay
;LCD command mode ;clock data delay ;LCD data mode
Freescale Semiconductor, Inc. Application Note
MESSAGE1
OUTMSG1 MESSAGE2
clrx incx clrx incx
#$84 LCD_ADDR MSG1,X OUTMSG1 LCD_WRITE
;addr ;send addr ;load AccA w/char from ;end msg? ;write data ;loop finish
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#$C0 LCD_ADDR MSG2,X OUTMSG2 LCD_WRITE
;addr ;send addr ;load AccA w/char from ;end msg? ;write data ;loop finish
OUTMSG2
MESSAGE STORAGE MSG_STORAGE MSG1 'Motorola' MSG2 'Microcontrollers'
VECTOR TABLE RESET START
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Application Note Appendix 4-Bit Code
Appendix 4-Bit Code
File name: LCD_MOD4.ASM Example Code Module (HD44780) using 4-bit Ver: Date: April 1998 Author: Mark Glenewinkel Motorola Field Applications Consumer Systems Group Assembler: 1.02 code explanation flowcharts, please consult Motorola Application Note "Interfacing HC705C8A Module" Literature AN1745/D SYSTEM DEFINITIONS EQUATES Internal Register Definitions PORTA ;LCD control signals PORTB ;LCD data DDRA ;data direction PortA DDRB ;data direction PortB Application Specific Definitions LCD_CTRL LCD_DATA Memory Definitions EPROM MSG_STORAGE RESET
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;PORTA ;PORTB ;PORTA, ;PORTA, ;PORTA,
$160 $500 $1FFE
;start EPROM ;start ;start message block ;vector reset
VARIABLES TIME ;used delay time
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Freescale Semiconductor, Inc. Application Note
MAIN ROUTINE EPROM ;start EPROM Intialize Ports START LCD_CTRL ;clear LCD_CTRL LCD_DATA ;clear LCD_DATA #$FF ;make ports outputs DDRA ;PortA output DDRB ;PortB output INITIALIZE Wait #150T TIME VAR_DELAY Send Init Command bset bclr Wait Send Init Command bset bclr Wait Send Init Command
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;set delay time ;sub 0.1ms delay
#$30 LCD_DATA E,LCD_CTRL E,LCD_CTRL
;LCD init command ;clock data
#41T TIME VAR_DELAY
;set delay time ;sub 0.1ms delay
#$30 LCD_DATA E,LCD_CTRL E,LCD_CTRL
;LCD init command ;clock data
TIME VAR_DELAY
;set delay time ;sub 0.1ms delay
#$30 LCD_WRITE
;LCD init command ;write data
Send Function Command 4-bit bus, rows, dots #$20 LCD_WRITE #$20 LCD_WRITE #$80 LCD_WRITE
;function command ;write data ;function command ;write data ;function command ;write data
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Application Note Appendix 4-Bit Code
Send Display Ctrl Command display cursor off, blinking #$00 LCD_WRITE #$C0 LCD_WRITE Send Clear Display Command clear display, cursor addr=0 #$00 LCD_WRITE #16T TIME VAR_DELAY #$10 LCD_WRITE #16T TIME VAR_DELAY Send Entry Mode Command increment, display shift #$00 LCD_WRITE #$60 LCD_WRITE SEND MESSAGES address, send data MESSAGE1 MESSAGE2
;display ctrl command ;write data ;display ctrl command ;write data
;clear display command ;write data
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;delay ;clear display command ;write data
;delay
;entry ;write ;entry ;write
mode data mode data
command command
;send Message1 ;send Message2
DUMMY
DUMMY
;done with example
SUBROUTINES Routine creates delay according formula TIME*100 using 2-MHz internal Cycle count instruction shown VAR_DELAY #33T deca TIME VAR_DELAY
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Freescale Semiconductor, Inc. Application Note
Routine sends Data LCD_WRITE LCD_DATA bset E,LCD_CTRL bclr E,LCD_CTRL #13T deca Routine sends Address LCD_ADDR bclr RS,LCD_CTRL LCD_DATA bset E,LCD_CTRL bclr E,LCD_CTRL #13T deca bset RS,LCD_CTRL MESSAGE1 clrx asla asla asla asla incx clrx asla asla asla #$80 LCD_ADDR #$40 LCD_ADDR MSG1,X OUTMSG1 LCD_WRITE MSG1,X
;clock data delay
;LCD command mode ;clock data delay ;LCD data mode
Freescale Semiconductor, Inc.
;addr ;send ;addr ;send
addr addr
;load AccA w/char from ;end msg? ;write data ;load Acca w/char from ;shift
LCD_WRITE
;write data ;loop finish
OUTMSG1 MESSAGE2
#$C0 LCD_ADDR #$00 LCD_ADDR MSG2,X OUTMSG2 LCD_WRITE MSG2,X
;addr ;send ;addr ;send
addr addr
;load Acca w/char from ;end msg? ;write data ;load AccA w/char from ;shift
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Application Note Appendix 4-Bit Code
OUTMSG2
incx
LCD_WRITE
;write data ;loop finish
MESSAGE STORAGE MSG_STORAGE MSG1 'Motorola' MSG2 'Microcontrollers'
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VECTOR TABLE RESET START
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Freescale Semiconductor, Inc. Application Note
Freescale Semiconductor, Inc.
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
reach USA/EUROPE/Locations Listed: Motorola Literature Distribution, P.O. 5405, Denver, Colorado 80217, 1-800-441-2447 1-303-675-2140. Customer Focus Center, 1-800-521-6274 JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 141, 4-32-1 Nishi-Gotanda, Shinigawa-Ku, Tokyo, Japan. 03-5487-8488 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd., Ping Industrial Park, Ting Road, N.T., Hong Kong. 852-26629298 MfaxTM, Motorola Back System: RMFAX0@email.sps.mot.com; http://sps.motorola.com/mfax/; TOUCHTONE, 1-602-244-6609; Canada ONLY, 1-800-774-1848 HOME PAGE: http://motorola.com/sps/
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