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AN-HK-32
In-Circuit Programming FLASH Memory MC68HC908GP32
Freescale Semiconductor, Inc.
T.C. Applications Engineering Microcontroller Division Hong Kong
This application note describes In-Circuit Programming (ICP) FLASH memory Motorola MC68HC908GP32 (GP32) microcontroller, general purpose device based HC08 architecture that 32k-bytes on-chip FLASH. text divided into parts: PART covers general overview techniques that applied GP32 PART covers simple low-cost implementation GP32
detailed specification MC68HC908GP32, please refer datasheet: Motorola order number MC68HC908GP32/H.
PART Introduction
In-circuit programming process which device programmed erased with device final circuit board target system. This allows user code changed without having remove device target system reprogramming initial programming. GP32, 32k-bytes FLASH memory allocated user code, with additional 36-bytes FLASH user defined reset interrupt vectors. high voltage supply required GP32 program erase operations; generated internal charge-pump. This
Motorola, Inc., 2000
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FLASH memory programmed erased using software routines running either User mode Monitor mode, writing FLASH Control register address $FE08. User Mode User mode, GP32 running user code, that been programmed FLASH memory. This mode which GP32 will running during most time. Monitor mode, GP32 running code that been permanently programmed into area memory GP32 during fabrication. monitor code used communicating external host, connected serial link. Programming initially blank GP32 FLASH memory executed monitor mode. mode which GP32 enters latched after power-on-reset (POR), depends logic level following pins: IRQ, RST, PTA0, PTA7, PTC0, PTC1, PTC3. (For details, please refer Monitor section datasheet.)
Monitor Mode
Freescale Semiconductor, Inc.
Initial FLASH Programming
In-Circuit Programming User Mode
user mode implemented maintain target system operation while reprogramming FLASH memory GP32. Reprogramming FLASH memory GP32 involves stages. first stage erase operation erase existing data FLASH memory cell. minimum erase size 128-bytes, known page. MASS FLASH Control register provides option erasing entire FLASH array operation, known MASS erase. should noted that erase byte FLASH memory reads $FF. second stage programming process, which programs blank FLASH memory with data. Thus, reprogramming involves: erase program. Code Performing user mode requires that erase programming routines code stored part non-volatile memory that called user program. This means code needs routine that part user code, programmed into GP32's FLASH memory. With this mind, user mode cannot performed FLASH memory initially blank; blank device. Initial blank devices programmed Monitor mode (see next section Monitor Mode). With code programmed into FLASH memory, called software hardware, operate ways:
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MOTOROLA
code sets GP32 communication link with outside host system GP32 port pins interface, then transfers control GP32 host system. host issues commands erase GP32's FLASH memory downloads data program FLASH memory. this case, GP32 code acting command interpreter. Alternatively, code carry erase process downloads data from external source programming. source intelligent host EPROM containing user code. both above methods, code must loaded into area memory, routine executed area. Program erase operations allowed while program running FLASH area. possible code execute FLASH area, there danger erasing code itself. Block Protected FLASH Memory There situation where FLASH memory cannot erased user mode: when block protected. FLASH Block Protect register address $FF7E used protect (prevent from erase programming) block entire FLASH memory. Once that block memory protected, cannot erased while GP32 running user mode. only erased monitor mode. FLASH Block Protect register cannot rewritten "unblock" protected FLASH, because implemented FLASH register also block protected. More details user mode using host communication discussed Motorola Application Note AN1770: In-Circuit Programming FLASH Memory MC68HC908GP20.
Freescale Semiconductor, Inc.
In-Circuit Programming Monitor Mode
Monitor mode, GP32 running monitor code that been permanently programmed into area memory ($FE20 $FF52) GP32 during fabrication. First time programming GP32's FLASH memory only executed monitor mode. monitor code consists routines communicating host connected using serial link PTA0. Once link established, control transferred host system. host controls directly writing registers. Monitor mode entered ways:
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High Volt Entry Monitor Mode Similar most Motorola MCUs, providing high voltage (VDD +2.5V GP32's case) during will force GP32 enter monitor mode. With this high voltage entry method, clock input OSC1) must either 4.9152MHz 9.8304MHz. This clock divides produce 9600 baud communication speed PTA0; since GP32's disabled monitor mode (see Monitor mode section datasheet more details). With FLASH memory implementation, there need reduce number wire connections target system program when required. other method entry monitor mode blank reset vector. only time when reset vector blank when entire GP32's FLASH memory blank reset vector only erased during mass erase operation. also grounded during mode latch after POR, enabled, allowing 32.768kHz crystal between OSC1 OSC2 input clock. This saving wires three jumpers compared with high voltage entry method: connection OSC1. Implementing monitor mode advantage that code needs written user code. addition, MCUscribe program, free Motorola utility, available host system that talks PTA0 serial link.
Blank Vector Entry Monitor Mode
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Other Considerations
Signal Conditioning
Normal system activities will usually halted during operation, allow uninterrupted programming process. Therefore, start process, should configured such that contention runaway signal will occur during process. Also note that when system first switched-on with having blank FLASH memory, port pins default their reset states. pins used connecting external host shared with target system, make sure they isolated proper logic level when connection made.
Isolation
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Freescale Semiconductor, Inc. PART Introduction
following method low-cost; with minimal system user code changes. involves steps: Erasing FLASH memory User mode. Programming FLASH memory Monitor mode (blank vector entry) using Motorola's SPGMR08 Serial Programmer. Constraints This method must meet these conditions: FLASH memory block protected. Block protected FLASH memory cannot erased user mode. high voltage (VTST) applied required entering monitor mode erase FLASH memory. frequency must 2.4576MHz programming FLASH (see Programming FLASH Memory Monitor Mode). 2.4576MHz used derive 9600 baudrate communication between Host. 2.4576MHz frequency generated using MCU's (usually with 32.768kHz external reference crystal). used, then external crystal must 9.8304MHz times frequency).
Freescale Semiconductor, Inc.
Mass Erasing FLASH Memory User Mode
program listing back this application note contains routine mass erasing MCU. Since this program demonstration purposes, only MASS_ERASE subroutine required inclusion user program. Other parts program involves setting clock using polling PTA0 PTA7 calling routine. What program does this: Configure 2.4576MHz from 32.768kHz. Check logic levels PTA0 PTA7; true, proceed mass erase. Load MASS_ERASE routine memory. Execute MASS_ERASE routine. routine loops until reset vector blank.
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this implementation, used setting request mass erase operation. After POR, when (see figure user code will load mass erase routine into perform FLASH mass erase operation. erase routine, delay timing based frequency 2.4576MHz, mass erase operation repeated until user vectors security bytes erased. time required mass erase operation less than seconds.
GP32
Freescale Semiconductor, Inc.
Pins target system
Figure Mass Erase Port Configuration flowchart figure shows sequence events mass erase operation.
Power-On Reset
Initialize
PA0=1 PA7=0
Continue with user main program Perform mass erase routine
Reset vector security blank
Figure Mass Erase Flowchart
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Procedure Mass Erase Using sample program, this step-by-step procedure erases GP32 FLASH user mode: Switch power target system. Isolate port pins from target system logic. high pull-up resistor VDD. ground directly VSS. Switch power target system. Wait seconds. Switch power target system.
Freescale Semiconductor, Inc.
FLASH memory erased. next section describes procedure programming GP32 FLASH memory using blank vector entry monitor mode.
Programming FLASH Memory Monitor Mode
Programming GP32's blank FLASH memory achieved running monitor mode; with host connected using serial link. Monitor mode entered ways after power-on-reset: high voltage (VDD +2.5V) applied pin, FLASH memory erased blank.
latter method entering monitor mode programming FLASH memory will described here. With this method, enters monitor mode after power-on reset when detects that reset vector, $FFFE-$FFFF, blank (containing $FF). Motorola SPGMR08 serial programmer used interface between target system host system. Figure shows connection SPGMR08. Three wires used: This serial data link between host MCU. VDD_S This line provides power power-on reset synchronization between host MCU. Common ground systems.
other wires only necessary high voltage entry monitor mode. this implementation, required grounded mode entry, crystal frequency must 32.768kHz.
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SPGMR08 Adapter board connector
(4.9152MHz)
GP32
OSC1
32.768kHz
VTST
OSC2
note
Freescale Semiconductor, Inc.
VDD_MCU
VDD_S
Pins target system power-on reset
VDD_MCU 100k
NOTES: 0.1µF normal operation SW1: position SW2: position blank reset vector monitor mode entry SW1: position SW2: position high voltage monitor mode entry SW1: position SW2: position PTC0=1, PTC1=0, PTC3=0 must satisfied. high voltage monitor mode entry required, VTST required, omitted signals default position resistors, required SPGMR08 voltage VTST 7.75V omitted VTST required.
Figure Programming Setup Once programming system connected figure programming carried running MCUscribe utility supplied with SPGMR08. When MCUscribe finished programming, jumpers back their original position, then select "power-off" command MCUscribe utility screen menu.
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Freescale Semiconductor, Inc. Further Information
above method limitations. They are: erase program operations entire 32k-bytes FLASH memory erase operation erases FLASH locations; program operation programs FLASH locations. There must power outage during erase program operations; otherwise, high voltage must applied that enter Monitor mode. alternative extract target system reprogrammed using external programmer.
Freescale Semiconductor, Inc.
Further cost-savings achieved using circuit figure replace SPGMR08. Other methods that applied GP32 described application note: AN1770 In-Circuit Programming FLASH memory MC68HC908GP20.
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Freescale Semiconductor, Inc.
7.75V
VTST
2N3906
(optional)
1N914 2N3906
VDD_S
Serial Programming Schematic
MC145407 74HC125 74HC125 VDD_S
74HC125
2N3904
4.9152 74HC125 OSCILLATOR
Figure Interface Circuit
DB-9 CONNECTOR
4.9152
(optional)
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Serial
Serial
HOST
optional signals required high voltage entry Monitor Mode.
MOTOROLA
Freescale Semiconductor, Inc. Program Listing
Assembler Directives $base 68HC908GP32 User Mode FLASH Mass Erase Author T.C. File Name gp32icp.asm Description This program allows mass erase itself user mode. detect condition mass erase PA0=1 PA7=0. Jumper setting: Jumper Mass Erase Pullup(10K) Short Memory usage: $00A0-$00DF FLASH $F000-$F06F Version Date Description 12/28/99 Changed from erase jumper EQUATES PCTL $0036 Control Register PBWC $0037 Bandwidth Control Register PMSH $0038 Multiplier Select Register High PMSL $0039 Multiplier Select Register PMRS $003A Range Select Register PMDS $003B Reference Divider Select Register AUTO PBWC LOCK PBWC PLLON PCTL PCTL Initial Settings 32.768 crystal clock produce 2.4576 internal clock Prescaler Program Bits (PRE) value PCTL (def Power-of-Two Range Select Bits (VCR) value PCTL (def Multiplier Select Bits (MUL) value PMSH (def Multiplier Select Bits (MUL) value PMSL (def Range Select Bits (VRS) value PMRS (def Reference Divider Select Bits (RDS) value PMDS (def=1) value interpreted
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Flash Control Register ;-FLCR $fe08 Flash Control Register HVEN MASS ERASE FLBPR $ff7e Flash Block Protect Register CONFIG1 CONFIG2 DDRA MAIN $F000 FLPROGST $FF19 USERVECTOR $FFFE VECTOR $FFF0 Main Program ;-org MAIN START: CONFIG2 #$31, CONFIG1 Disable PCTL frequency 2.4576MHz bset 0,PCTL using external 32.768KHz bset 0,PMSH crystal turn #NLO PMSL PMRS bset PLLON, PCTL bset AUTO, PBWC brclr LOCK, PBWC,* bset BCS, PCTL DDRA check user mode mass erase condition PA0=5V PA7=GND user mode condition brclr 0,PTA, USERCODE check brset 7,PTA, USERCODE check clrh clrx NEXTRAM: MASS_ERASE, Load mass erase code from flash RAM, incx cbeqx #ENDRAM-MASS_ERASE, RUNRAM NEXTRAM
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RUNRAM: USERCODE: Start user code Mass Erase ;-MASS_ERASE: ldhx clra clrh V_CHECK: incx V_NEXT: ICPMODE: Waiting power-off #$0F V_CHECK check last location VECTOR,x #$FF V_NEXT load security user vectors check blank bluk erase again vectors blank #FLCR #%00000110 FLBPR FLBPR DELAY #%00001110 DLY_N100US #%00001100 DLY_100US #$05 FLCR MASS ERASE flag read from block protect register write security fail delay 10us Execute mass erase
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HVEN delay
clear ERASE flag delay 100us clear HVEN flag
Delay Subroutine frequency 2.4576MHz N*(1+3) 9+4N DLY_100US: DELAY: deca MOTOROLA More Information This Product, www.freescale.com DELAY 100.5us
DLY_N100US: psha pula deca ENDRAM: USERVECTOR START DLY_100US [247]
DLY_N100US
RESET
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Freescale Semiconductor, Inc. Notes
Freescale Semiconductor, Inc.
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Freescale Semiconductor, Inc.
Motorola reserves right make changes without further notice products herein. Motorola makes warranty, representation guarantee regarding suitability products particular purpose, does Motorola assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Motorola data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Motorola does convey license under patent rights rights others. Motorola products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Motorola product could create situation where personal injury death occur. Should Buyer purchase Motorola products such unintended unauthorized application, Buyer shall indemnify hold Motorola officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Motorola negligent regarding design manufacture part. Motorola registered trademarks Motorola, Inc. Motorola, Inc. Equal Opportunity/Affirmative Action Employer.
reach USA/EUROPE/Locations Listed: Motorola Literature Distribution; P.O. 5405, Denver, Colorado 80217. 1-800-441-2447 1-303-675-2140 JAPAN: Nippon Motorola Ltd. SPD, Strategic Planning Office 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. 03-5487-8488 MfaxTM, Motorola Back System: RMFAX0@email.sps.mot.com; http://sps.motorola.com/mfax/; TOUCHTONE 1-602-244-6609; Canada ONLY 1-800-774-1848 HOME PAGE: http://motorola.com/sps/
Mfax trademark Motorola, Inc. Motorola, Inc., 2000
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