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TMS320C6000 Daughterboard Interface
Brian Carlson Enterprises, Inc.
Abstract
This application note provides information interface daughterboard TMS320C62x EVM, TMS320C62x McEVM, TMS320C67x EVM. introduction daughterboard concept provided identifying advantages using this approach rapid prototyping accelerated product developments. Details daughterboard design provided including identification memory peripheral interfaces' signals, buffering considerations, power budget mechanical connector information. list potential daughterboards presented reinforce point that when they used with EVM, wide range applications addressed. designing daughterboards based information this application note, standardized, modular approach used that allows system designers concentrate systemspecific issues rather than core memory design. using low-cost address wide range applications, simply exchanging daughterboards, users have learn platform write utilities board support software every project.
Contents
Abstract Introduction Expansion Memory Interface Memory Decoding Buffer Characteristics Wait States Expansion Peripheral Interface.8 Signal Buffer Characteristics Daughterboard Power.11 Daughterboard Dimensions Daughterboard Connectors Mating Dimensions Potential Daughterboards References.17
Digital Signal Processing Solutions
December 1998
Figures
Figure TMS320C62x Daughterboard Interface.4 Figure Daughterboard Envelopes Connections TMS320C6x Figure Daughterboard Mating Dimensions Illustration
Tables
Table Daughterboard Expansion Memory Connector List.6 Table Expansion Memory Interface Buffer Characteristics.7 Table Daughterboard Expansion Peripheral Connector List Table Maximum Daughterboard Current.12 Table Daughterboard Mating Dimensions
Introduction
provides expansion connectors that allow functionality extended address application-specific requirements. expansion connectors provide daughterboard with access signals that enable peripheral devices with memorymapped serial interfaces used with EVM. These direct, high-speed connections DSP, which critical real-time processing, depend host processor interaction transfers. Daughterboards provide both analog digital capabilities, giving low-cost flexibility used variety applications. Users design their custom daughterboards obtain them from other vendors. daughterboards present modular approach interface design that support wide range applications. With this modular approach, core memory design leveraged across several applications, with daughterboards providing functions meet unique requirements. This protects user's investment platform, including tools software that developed since used multiple applications. Future design efforts only need focus interface requirements related support software, rather than complete processing system. This incremental design paradigm lends itself well rapid prototyping product development acceleration. EVM's expansion connectors provide access DSP's asynchronous external memory interface (EMIF) on-chip peripheral control/status signals. Both connectors also provide multiple voltages supply power daughterboard. Each expansion connectors low-profile, 80-pin, 0.050"-pitch connector designed support high-speed board interconnections. Mating connectors daughterboard available several mating heights which meet maximum height requirement defined Local Specification Revision standard sizes daughterboards defined. small size intended applications that require connection mounting bracket. large size intended applications that require connection mounting bracket need more board space implementation. Figure shows daughterboard interface including signals provided expansion connectors.
TMS320C6000 Daughterboard Interface
Figure TMS320C62x Daughterboard Interface
20-Bit Address
EA[21:2]
EXPANSION MEMORY CONNECTOR
32-Bit Data
ED[31:0]
/CE1 /BE[3:0] /AOE /ARE /AWE ARDY 3.3V
McBSP0 Signals
CLKR0,CLKX0, CLKS0, FSR0,FSX0, DR0,DX0 CLKR1,CLKX1, CLKS1, FSR1,FSX1, DR1,DX1 TINP0 TOUT0 TINP1 TOUT1 EXT_INT7 IACK INUM[3:0] DMAC[3:0] XCNTL[1:0] XSTAT[1:0] DSP_PD /XRESET CLKOUT2 /CE2 /CE3 3.3V -12V
EXPANSION PERIPHERAL CONNECTOR
McBSP1 Signals
TMS320C6000 Daughterboard Interface
TMS320C62x DAUGHTERBOARD
Expansion Memory Interface
EVM's expansion memory interface provides DSP's asynchronous EMIF signals daughterboard. External asynchronous memories memory-mapped peripherals interfaced EVM, including nonvolatile memory that could used boot upon reset. Since expansion memory interface provides parallel, 32-bit data interface, provides fastest data transfer mechanism with DSP. expansion memory interface only mastered DSP, memory-mapped devices daughterboard always slave devices. expansion memory interface includes: external address signals (EA[21:2]). DSP's external address signals available expansion memory interface, allowing bytes external memory addressed. However, because space must shared with onboard peripherals, only lower bytes available daughterboard. used external asynchronous memory instead SDRAM, additional bytes each these memory spaces addressed. Therefore total bytes asynchronous memory directly addressable daughterboard. memory page register could used enable very large memory space daughterboard. external data signals (ED[31:0]). DSP's external data signals available expansion memory interface support full 32-bit word accesses daughterboard. memory space enable (/CE1). DSP's memory space enable available expansion memory interface allow asynchronous accesses daughterboard memory memory-mapped devices. memory space enables provided expansion peripheral connector additional asynchronous memory address spaces. Four byte enables (/BE[3:0]). DSP's four byte enables available expansion memory interface support byte (8-bit), halfword (16-bit) word (32-bit) daughterboard memory accesses. Four asynchronous control signals (/AOE, /ARE, /AWE ARDY). DSP's asynchronous EMIF control signals provided control memory accesses daughterboard. These signals indicate direction data transfer allow daughterboard wait states memory accesses. Power signals. expansion memory interface also provides ground, 3.3-V voltages daughterboard. expansion memory interface supports both 3.3-V devices since uses lowvoltage translation buffers that have tolerant inputs. expansion memory interface provided dual-row, 80-pin surface-mount connector. This connector profile with 0.050" (1.27 pitch. recommended mating connector provides 0.465" board spacing, allowing ample space daughterboard components.
TMS320C6000 Daughterboard Interface
Table identifies pinout expansion memory interface connector. Note that table shows actual connector names which vary slightly from names.
Table Daughterboard Expansion Memory Connector List
Signal Name XA21 XA19 XA17 XA15 XA13 XA11 /XBE3 /XBE1 XD31 XD29 XD27 XD25 XD23 XD21 XD19 XD17 XD15 XD13 XD11 /XRE /XOE SPARE (N/C) Type I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z Signal Name XA20 XA18 XA16 XA14 XA12 XA10 /XBE2 /XBE0 XD30 XD28 XD26 XD24 XD22 XD20 XD18 XD16 XD14 XD12 XD10 /XWE XRDY /XCE1 Type I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z
TMS320C6000 Daughterboard Interface
Memory Decoding
expansion memory interface provides memory space enable that should used daughterboard memory decoding. asynchronous memory space shared with EVM's onboard peripherals, first bytes bytes space available daughterboard. This memory space indicated /CE1 being asserted with either EA21 EA20 being low. Onboard peripherals addressed when both EA21 EA20 high. both banks SDRAM required application, then memory spaces used provide bytes additional memory each. this done, then respective memory space control register should configured asynchronous memory, EVM's CPLD register SDCNTL should disable desired SDRAM bank(s).
Buffer Characteristics
DSP's EMIF address, data control signals brought expansion memory interface buffered several reasons:
Preserve signal integrity Distribute loads efficiently Isolate daughterboard interface during onboard memory cycles Eliminate problems daughterboard device relinquish time Provide 3.3-V voltage translation support devices daughterboard Provide sufficient current sink source daughterboard interface
designer daughterboard should aware that signal buffering board, there additional signal delays from specified TMS320C6201 timing parameters. buffering also provides defined current sink source capabilities. These buffer characteristics must accounted during design daughterboard. Table summarizes characteristics buffers used various expansion memory interface signals including maximum delay sink/source current.
Table Expansion Memory Interface Buffer Characteristics
Signal Type Address Data Control Buffer Type SN74ALB16244 SN74LVTH162245 SN74ALB16244 Delay
TMS320C6000 Daughterboard Interface
Wait States
expansion memory interface supports wait state control daughterboard through DSP's ARDY ready signal. includes pull-up resistor external ARDY signal (XRDY) from daughterboard, defaults zero wait states. wait states required daughterboard device operation, then logic daughterboard should clear XRDY until device ready complete data transfer, which time XRDY should high. order support wait states, requires that memory space's read/write strobe fields initialized minimum three CLKOUT1 cycles. values memory space's setup strobe periods need adjusted account response time daughterboard's logic. example, logic cannot clear XRDY before begins sample will cycle before device ready.
Expansion Peripheral Interface
EVM's expansion peripheral interface provides DSP's on-chip peripheral signals daughterboard. This peripheral interface allows synchronous serial devices, such codecs communication controllers, added daughterboard. expansion peripheral interface includes: Seven signals each serial ports (McBSP0 McBSP1). DSP's seven McBSP1 signals available expansion peripheral interface. These signals buffered 'CBT3384 device support both 3.3-V serial devices using McBSP1 daughterboard. DSP's seven McBSP0 signals also available when software controls onboard 'CBT3257 multiplexers that connect them expansion connector rather than onboard audio codec. This architecture provides daughterboard with access both DSP's serial ports, which useful many applications. Because 'CBT3257 multiplexer used, both 3.3-V serial devices McBSP0 daughterboard. Both serial ports allow full-duplex connections between daughterboard consisting separate data, frame sync clock signals receive transmit paths. input/output signals each timers (timer timer expansion peripheral interface includes each timers' input output signals. This allows timer signals sent daughterboard, timer input events counted come from daughterboard. Each timer input output signal. Interrupt, interrupt acknowledge, identification signals. external interrupt (EXT_INT7) included expansion peripheral interface allow daughterboard interrupt notify data transfers other significant events. This interrupt pulled down EVM, daughterboard must drive high interrupt (rising edge). Additionally, DSP's interrupt acknowledge (IACK) interrupt identification number signals (INUM[3:0]) available daughterboard. Four completion flags. action complete flags (DMAC[3:0) available daughterboard expansion peripheral interface. These signals provide method feedback external logic generating event each channel. DMAC signals also used general-purpose output control signals controlled from DSP's channel secondary control register.
TMS320C6000 Daughterboard Interface
Four general-purpose input/output flags. general-purpose control outputs status inputs brought expansion peripheral interface allow control monitor various signals daughterboard. XCNTL[1:0] XSTAT[1:0] signals controlled software accessing CPLD's memorymapped CNTL STAT registers respectively. Power-down signal. DSP's power-down indication signal (DSP_PD) also brought expansion peripheral interface that daughterboard powered-down desired. Reset signal. expansion peripheral interface also provides reset signal that active when board reset state. This allows circuitry daughterboard known state. reset signal asserted minimum upon power-up, manual reset pushbutton under host software control. memory-mapped register CPLD's CNTL register allows software directly control this reset signal. CLKOUT2 clock signal. DSP's CLKOUT2 signal (CPU clock divided brought expansion peripheral interface synchronization needs daughterboards. Buffered signals. DSP's memory space enables brought expansion peripheral interface support additional fast memory decoding. This useful daughterboards that have multiple devices that need memory decodes. dedicated SDRAM board, EMIF control registers initialized asynchronous operation, which disables respective SDRAM banks allows expansion asynchronous memory used instead. SDRAM enable bits CPLD's SDCNTL register must disabled allow CPLD logic enable external data transceivers CE2/CE3 daughterboard accesses. Power signals. expansion peripheral interface also provides ground, 12-V, -12-V, 3.3-V power signals daughterboard. serial synchronous ports Mbits/sec Mbytes/sec) with DSP, they about order magnitude slower than parallel, memory-mapped interface. Serial interfaces provide advantage less complexity, with only handful signals being required. Additionally, serial ports provide direct data connection without contending EMIF bandwidth. Several industrystandard devices directly connected DSP's flexible McBSP such computer telephony switches (MVIP, SCSA, H.110), T1/E1 framers, converters converters. expansion peripheral interface supports both 3.3-V devices since uses low-voltage translation buffers that have tolerant inputs. expansion peripheral interface provided dual-row, 80-pin surface-mount connector. This connector profile with 0.050" (1.27 pitch. recommended mating connector provides 0.465" board spacing, allowing ample space daughterboard components.
TMS320C6000 Daughterboard Interface
Table identifies pinout expansion peripheral interface connector. Note that table shows actual names which vary slightly from names.
Table Daughterboard Expansion Peripheral Connector List
Signal Name SPARE (N/C) RSVD (N/C) RSVD (N/C) SPARE (N/C) CLKX0 FSX0 CLKR0 FSR0 CLKX1 FSX1 CLKR1 FSR1 TOUT0 SPARE (N/C) TOUT1 XEXT_INT7 INUM3 INUM1 /XRESET XCTRL1 XSTAT1 SPARE (N/C) /XCE2 DMAC3 DMAC1 Type I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z I/O/Z Signal Name SPARE (N/C) RSVD (N/C) RSVD (N/C) SPARE (N/C) CLKS0 SPARE (N/C) CLKS1 SPARE (N/C) TINP0 SPARE (N/C) TINP1 IACK INUM2 INUM0 DSP_PD XCTRL0 XSTAT0 SPARE (N/C) /XCE3DMAC2 DMAC0 XCLKOUT2 Type
TMS320C6000 Daughterboard Interface
Signal Buffer Characteristics
DSP's McBSP signals buffered enable both 3.3-V devices used daughterboard. McBSP signals buffered with active buffers like memory interface since they slower, typically only connected single device, have high dynamic current requirements. these reasons, 'CBT switches multiplexers used provide voltage translation. These devices exhibit maximum delay effectively appear circuit 5-ohm resistor. external interrupt (XEXT_INT7) timer inputs (TINP0, TINP1) similarly buffered using 'CBT device. Since DSP's output voltages compatible with devices, DSP's timer output signals (TOUT0, TOUT1) brought directly expansion peripheral interface connector. DSP's interrupt acknowledge, interrupt identification codes, power down, reset signals brought directly expansion connector without buffering. general-purpose input/output flags interfaced directly EVM's CPLD that tolerant inputs drives 3.3-V outputs that compatible with 3.3-V devices. XCNTL[1:0] signals driven Altera EPM7256S CPLD XSTAT[1:0] signals from daughterboard brought directly CPLD. CLKOUT2 signal presented daughterboard actually buffered version DSP's SDCLK signal. SDCLK CLKOUT2 signals have same frequency phase, either used applications. SDCLK used source clock because already used input zero-delay clock driver device (Cypress CY2308-1H) that provided multiple outputs. these outputs used drive expansion peripheral interface's XCLKOUT2 signal. /XCE2 /XCE3 memory space enable signals buffered versions DSP's /CE2 /CE3 signals respectively. buffers that used SN74ALB16244 which have maximum propagation delay have symmetric drive These should only signals whose timing delay needs considered during daughterboard designs they memory spaces.
Daughterboard Power
TMS320C62x EVM's expansion connectors provide 3.3-V, 5-V, 12-V -12-V power supplies daughterboard. Multiple digital grounds also provided expansion connectors. 3.3-V power supply rated deliver 3.6-A before shutdown current limiting. 3.3-V power supply used buffers, CPLD I/O, memories board. amount current available daughterboard application-dependent since processor's speed, amount external memory accesses general board activity influence amount 3.3-V current required onboard devices. Worst case numbers indicate maximum being available daughterboard 3.3-V supply.
TMS320C6000 Daughterboard Interface
power supply daughterboard provided directly from during operation, external power supply when operated standalone mode desktop. power supply board power source both 1.8/2.5-V 3.3-V regulators board. power supply also used power controller, audio codec, JTAG TBC, voltage translation buffers CPLD core. amount current available daughterboard applicationdependent also since board activity determines onboard current requirement. specification limits maximum current operation. maximum each voltage regulator assumed with efficiency, then available current daughterboard would about standalone operation, only limitation would external power supply. 12-V power supply daughter board provided directly from during operation, external power supply when operated standalone mode desktop. 12-V power supply board only used power source analog voltage regulator. 12-V current requirement board only about specification limits maximum 12-V current daughterboard draw maximum slot. standalone operation, only limitation would external power supply. -12-V power supply used board. provided directly daughterboard from slot external power supply. specification limits maximum -12-V current standalone operation, only limitation would external power supply. Table summarizes current available daughterboard each four power supplies.
Table Maximum Daughterboard Current
Power Supply 3.3-V 12-V -12-V Maximum Daughterboard Current ext. power supply limit) ext. power supply limit)
Daughterboard Dimensions
standard sizes daughterboards defined: small large. small daughterboard measures approximately 3.15" 3.4" mounts center board over CPLD low-profile buffers memories. This size intended daughterboards that require connections mounting bracket. good example small daughterboard would Flash memory board. large daughterboard measures approximately 7.5" 3.4" mounts from center board over mating connector board, adjacent mounting bracket. This size intended daughterboards that require connector mounting bracket need more space their components. Examples large daughterboards include T1/E1, SCSI, video, A/D, Ethernet daughterboards. probable that most daughterboards will large form factor support custom connections. However, possible that connections could brought mounting bracket cables circuitry fits small form factor.
TMS320C6000 Daughterboard Interface
daughterboards mount with their component sides down (opposing components). This ensures that height requirement components exposed possible damage from adjacent board insertions extractions. provides four standoff mounting holes support daughterboard connections. mounting holes, located adjacent external peripheral external memory connectors used daughterboards. additional mounting holes provided near mounting bracket long daughterboards order provide additional stability.
Figure shows small large daughterboard envelopes, relationship between expansion connectors, relative location four mounting holes component side board.
TMS320C6000 Daughterboard Interface
Figure Daughterboard Envelopes Connections TMS320C6x
15.24 (0.60) 5.00 (0.197)
5.00 (0.197)
22.00 (0.866) (0.250) (0.125)
94.00 (3.70)
15.24 (0.60) 5.00 (0.197)
8.00 (0.315)
Places
(Expansion Memory Connector)
29.0 (1.14)
Optional Connector Area
76.20 (3.00)
86.20 (3.39)
(Expansion Peripheral Connector) 5.00 (0.197) text
5.00 (0.197)
5.00 (0.197) 191.00 (7.52) 80.00 (3.15)
NOTES:
dimensions shown millimeters. Inch dimensions shown Drawing shows daughterboard envelopes connections component side Standard size daughter board 80.0 86.2 (3.15 3.39 Full-size daughter board 191.0 86.2 (7.52 3.39 Daughter board connectors Samtec .050x.050" Micro Strips (SFM-140-L2-S-D5. Daughter board mating connectors Samtec TFM-140-32-S-DLC Mating height 0.465" (11.81 There four plated holes (denoted standoff
CAUTION: important note that this figure showing side EVM, actual daughterboard!
TMS320C6000 Daughterboard Interface
Daughterboard Connectors Mating Dimensions
TMS320C62x uses 80-pin 0.050" 0.050" TFM-series connectors from Samtec. part number SFM-140-L2-S-D-LC. recommended mating connector (Samtec part number TFM-140-32-S-D-LC) surface-mount connector that provides 0.465" mated height which meets PCI's maximum component height 0.57". This mating height allows passive components back-side daughterboard. Figure Table show mating dimensions daughterboard mounted board. assumed that minimum 0.050" clearance maintained between daughterboard components.
Figure Daughterboard Mating Dimensions Illustration
aughterboard
S320C
Table Daughterboard Mating Dimensions
Label Description Dimension (Small Mated Height (Clearance between EVM) Maximum Component Height Maximum Daughterboard Component Height 0.465" 0.150" 0.265" Dimension (Large 0.465" 0.180" 0.235"
dimensions show that worst case clearance exists above JTAG (SN74ACT8990) board large daughterboard. this worst case, over about square inch area, there maximum daughterboard component height 0.235". Over rest large daughterboard area, about which components all, allowing maximum height 0.415" daughterboard components. small daughterboard, JTAG envelope, worst case situation above CPLD that height 0.15". only other components interest small daughterboard envelope buffers that have height 0.11", allowing maximum daughterboard component height 0.305" about envelope. worst case numbers should used general guideline. special cases, taller daughterboard components placed areas that have components with lower profiles components all.
TMS320C6000 Daughterboard Interface
Potential Daughterboards
Since TMS320C62x expansion interfaces' support both memory-mapped serial interfaces, daughterboards developed using variety analog digital devices. Daughterboards allow low-cost, standardized board used wide range applications, since functionality interfaces defined daughterboards that used with There several ongoing daughterboard efforts Texas Instruments, Enterprises, other third party companies. technologies introduced, they showcased with processing power using application-specific daughterboard. Some examples potential daughterboards TMS320C62x include:
T1/E1/ISDN MVIP/SCSA/H.100 Telephony Busses 10/100 BASE-T Ethernet AC97 Multimedia Audio Codec High-speed Data Acquisition Multi-channel Audio Interfaces Non-volatile Memory SCSI-2 IEEE-1394 Firewire Fibre Channel RS-232 RS-485 Video Optical Interface Digital Down Converter Digital Radio Receiver Professional Digital Audio (AES/EBU) Image Frame Grabber Graphics Accelerator Motion Controller Multi-channel Digital Reconfigurable Computation Engine
TMS320C6000 Daughterboard Interface
Prototyping Board
This list potential daughterboards only small sample. users span wide range industries technologies, they will find other applications daughterboards that meet their requirements. Additionally, markets realize that they benefit from DSP, C62x specifically, they target their technology C62x platform without having hardware designers using daughterboards provide their required interfaces.
References
[1]. TMS320C6201 Data Sheet, Texas Instruments, SPRS051, March 1998. [2]. TMS320C6201/C6701 Peripherals Reference Guide, SPRU190, March 1998. [3]. TMS320C6x Evaluation Module Reference Guide, SPRU269, April 1998. [4]. Local Specification Revision 2.1, PCI-SIG, June 1995.
TMS320C6000 Daughterboard Interface
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