ASDand IPAD INTRODUCTION competitive market portable equipment, n

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FLIP-CHIP: PACKAGE DESCRIPTION RECOMMENDATIONS
ASDand IPAD
INTRODUCTION competitive market portable equipment, notably mobile phone market, driven challenging development highly integrated products. allow manufacturers portable equipment reduce dimension their products, STMicroelectronics developed packages with reduced size, thickness weight form Flip-Chip. electrical performance such components Flip-Chips improved thanks shorter connections than ones standard plastic packages TSSOP, SSOP BGA). This Flip-Chip package family been designed fulfill same quality levels same reliability performances standard semiconductor plastic packages. That means these Flip-Chip packages have considered surface mount devices which will assembled printed circuit board without special additionnal process steps required. particular this package does require extra underfill increase reliability performances protect device. This package reworkable compatible with existing pick place equipment board mounting. Both leaded leadfree FlipChips available mass production. purpose this document describe Flip-Chip features specify customers them. This application note addresses following items
Product description Mechanical description Packing specifications labelling description Recommended storage shipping instructions Soldering assembly recommendations User responsability returns Changes Delivery quantity Quality
2004
REV.
AN1235 APPLICATION NOTE
PRODUCT DESCRIPTION Flip-Chips manufactured with wafer level process that STMicroelectronics developed attaching solder balls I/Os pads active wafer side, thus allowing bumped dice produced. contact layout either matrix shape periphery. redistribution layer used. This allows parasitic inductances coming from redistribution metal tracks minimized. near eutectic 95.5Sn 0.5Cu leadfree bumps eutectic 63Sn 37Pb bumps make this package compatible with standard reflow processes (leadfree leaded). Bumps' dimension (315 bumps diameter) allows pick place process compatible with existing equipment particular with equipment used packages) makes also compatible with design rules used standard ICs. These components delivered tape&reel packing with bumps turned down (placed bottom carrier tape cavity). other face component flat allows picking standard packages. Devices 100% electrically tested before packing. product references marked flat side device. MECHANICAL DESCRIPTION Mechanical dimensions Flip-Chips provided through product example figure below. Bumps leaded leadfree. Leaded bumps 63Sn 37Pb alloy with eutectic melting point 183°C. Leadfree bumps 95.5Sn 0.5Cu alloy with near eutectic melting point 217°-221°C. size bump count adapted connection requirements. Figure Mechanical dimensions bumps matrix array (sample).
500µm 315µm 650µm
500µm
2.57mm 50µm
2.57mm 50µm
250µm
Notes: package height 0.65mm valid thickness 0.40mm. With thickness 0.64mm total height would 0.89mm. distance between middle corner ball edge Flip-Chip linked ball configuration tolerance this distance 20µm. Flip-Chip tolerance bumps diameter bumps height very narrow. This constant bumps shape insures good coplanarity between bumps. Optical measurements performed through vertical focuses show bump plus coplanarity below 80µm. product marking both bumps side side shown figure below (product example). Flip-Chip marker (A1) both bottom sides that face component easily determined before after assembly.The dots marked both side bumps side have been designed that they detected standard vision systems. Marking dimensions are, course, linked size.
AN1235 APPLICATION NOTE
Figure Flip-Chip marking example leadfree bumps matrix array.
Side
Dot, logo marking datecode year week)
Ball Side
dimensions
location varying with product size
PACKING SPECIFICATIONS LABELLING DESCRIPTION Flip-Chip products delivered tape reel fully compatible with standard high volume components. features tape reel materials accordance with EIA-481-1, EIA481-1-A IEC286-3 standards. features specified this section accordance with EIA-481-1, EIA4811-A IEC286-3 standards. IV.1 Carrier tape Flip-Chips placed carrier tape with bumps side facing bottom cavity that components picked-up their side. flipping package necessary mounting PCB. products positioned carrier tape with sprocket hole side. Carrier tape mechanical dimensions shown example figure below. Note: carrier tape width used larger size line with standards. Figure Taping dimensions leadfree Flip-Chips (650µm thickness).
identifying location*
1.75
0.73 0.05
dimensions
User direction unreeling
ball location varying with product layout
AN1235 APPLICATION NOTE
size smaller than 1.3mm2 size 50µm size 50µm
size larger than 1.3mm2 size 200µm) according size order respect max. component rotation size 200µm) according size order respect max. component rotation
cavities carrier tape have been designed avoid damage components. hole present cavity order avoid impact external contamination solder bumps. Flip-Chips larger than width pitch carrier tape designed allow maximum component tilt maximum lateral movement embossed carrier tape black conductive material (surface resistivity within 10E4 10E8 ohm/ square). Conductivity guaranteed constant affected shelf life humidity. material will neither break when bent will off, powder, flake. IV.2 Cover tape carrier tape sealed with transparent, antistatic (surface resistivity within 10E5 ohm/square 10E12 ohm/square) polyester film cover tape with heat activated adhesive. cover tape tensile strength higher than 10N. peeling force cover tape between 0.1N 0.7N performing testing method 4811 286-3: cover tape peeled back direction opposite carrier tape travel; angle between cover tape carrier tape between degrees test done speed mm/minute. IV.3 Reels sealed carrier tape with Flip-Chip reeled inch reels (see figure reel mechanical dimensions). These reels compliant with 481-1 standard. compliance with IEC286-3, each reel contains maximum 0.1% empty pocket (the maximum previous values). successive empty pockets allowed. Each reel contain components coming from different wafer lots. reel made antistatic polystyrene material. Each reel minimum leader minimum trailer (compliant with 481-1 286-3 standards). leader makes portion carrier tape with empty cavities sealed cover tape beginning reel (external side). leader affixed last turn carrier tape using adhesive tape. trailer reel consists empty, sealed cavities. Figure reel mechanical dimensions.
Material: ANTISTATIC POLYSTYRENE
dimensions
0.25
20.2
AN1235 APPLICATION NOTE
IV.4 Final packing Each reel heat sealed under inert atmosphere transparent, recyclable antistatic polyethylene (minimum mils material thickness). Reels then packed cardboard boxes. complete description packing shown figure Figure Packing flow chart.
5000 components reel
Reel sealed plastic inert atmosphere reel packed cardbox storage shipment
IV.5 Labelling ensure components' traceability, labels stuck reels cardboard box. seven inch reels cardboard identified labels including part number, shipped quantity traceability references (figure traceability ensured each production each shipment through labeling. trace code number printed labels ensures backward traceability from received customer each step process: dates quantity diffusion, assembly, test final store. Likewise, forward traceability able trace history from wafer customer's location. Figure Example reel label.
AN1235 APPLICATION NOTE
RECOMMENDED STORAGE, SHIPPING INSTRUCTIONS DESCRIPTIONS Flip-Chip reels packed under inert atmosphere sealed bag. shipment handling, reels packed cardboard box. STMicroelectronics thus recommends following shipping storage conditions relative humidity between temperature range from -5°C 35°C Components opened sealed stored months after shipment. Components tape&reel must protected from exposure direct sunlight. Moisture sensitivity level (MSL JEDEC J-STD-020A) applicable Flip-Chip devices since there plastic encapsulation risk moisture absorption related possible package cracks. SOLDERING ASSEMBLY RECOMMENDATIONS VI.1 design recommendations optimum electrical performance highly reliable solder joints, STMicroelectronics recommends design guidelines listed table Table. design recommendations. design size Solder mask opening finishing Solder Mask Defined Micro under bump allowed 300mm (circular) 250µm recommended 340mm (for 300mm diameter pad) (2-6mm) (0.2mm max)
optimize natural self centering effect Flip-Chips PCB, positioning size have properly designed. Note: thick gold layer finishing recommended (low joint reliability). VI.2 assembly guidelines
VI.2.1 Leaded Flip-Chips
Flip-Chip mounting PCB, STMicroelectronics recommends solder stencil aperture 330µm2 maximum typical stencil thickness 125µm. Flip-Chips fully compatible with eutectic 63Sn 37Pb solder paste with clean flux. ST's recommendations Flip-Chip board mounting illustrated soldering reflow profile shown figure
AN1235 APPLICATION NOTE
Figure Recommended soldering reflow profile leaded Flip-Chip mounting PCB.
Temperature (°C)
Recommended: Tpeak 230°C Time above 183°C
205°C 250°C 183°C 160°C 5°C/s
3°C/s
Time (min)
Dwell time soldering zone (with temperature higher than 183°C) kept short possible prevent component substrate damages. Controlled atmosphere N2H2) recommended during whole reflow, specially above 150°C. Flip-Chips able withstand twice previous recommended reflow profile order compatible with double reflow when SMDs mounted both sides PCB. maximum three soldering reflows allowed these packages including rework operation. clean flux highly recommended avoid cleaning operation. order prevent bump cracks, ultrasonic cleaning methods recommended. leaded Flip-Chips compatible with Ecopak® leadfree reflow profile (260°C max, three reflows).
VI.2.2 Leadfree Flip-Chips
Flip-Chip mounting PCB, STMicroelectronics recommends solder stencil aperture µm2maximum typical stencil thickness 125µm. Flip-Chips fully compatible with near eutectic 95.5Sn 0.5Cu solder paste with clean flux. ST's recommendations FlipChip board mounting illustrated soldering reflow profile shown figure below. Figure Ecopack® recommended soldering reflow profile leadfree Flip-Chip mounting PCB.
Temperature (°C)
260°C 255°C 220°C 180°C
2°C/s recommended 2°C/s recommended 6°C/s 6°C/s
3°C/s 3°C/s
10-30
Time (min)
AN1235 APPLICATION NOTE
Dwell time soldering zone (with temperature higher than 220°C) kept short possible prevent component substrate damages. Peak temperature must exceed 260°C. Controlled atmosphere N2H2) recommended during whole reflow, specially above 150°C. Flip-Chips able withstand three times previous recommended reflow profile order compatible with double reflow when SMDs mounted both sides plus additional repair. maximum three soldering reflows allowed these leadfree packages (with repair step included). clean flux highly recommended avoid cleaning operation. order prevent bump cracks, ultrasonic cleaning methods recommended. VI.3 Underfilling Underfilling needed Flip-Chips devices withstand dispense underfill process temperature does exceed 175°C process time short (typically minutes). VI.4 Manual rework Flip-Chips able tolerate repair addition reflows mentionned section VI.2. other type packages, laser systems most suitable form Flip-Chip repair. Manual soldering acceptable iron soldering recommended. leaded Flip-Chip manual rework, maximum temperature allowed 260°C (leadfree compatibility) dwell time must exceed seconds. leadfree Flip-Chip manual rework, maximum temperature allowed 260°C. typical soldering profile figure used. CHANGES STMicroelectronics reserves right implement minor changes geometry manufacturing processes without prior notice. Such changes will affect electrical characteristics die, layout maximum size. However confirmed orders, variation will made without customer's approval. VIII QUALITY VIII.1 Electrical inspection Products Flip-Chip 100% electrically probed according critical parameters product specification. last operation before packing 100% electrical testing. other parameters guaranteed technology, design rules continuous monitoring systems. VIII.2 Visual inspection visual control performed manufacturing lots according MIL-STD-883 method 2010.
AN1235 APPLICATION NOTE
CONCLUSION Leadfree leaded Flip-Chip packages have been developped STMicroelectronics electronic applications where integration performance main concerns designers. STMicroelectronics Flip-Chips offer
Remarkable board space saving (package size equal size total height less than 715µm) Enhanced electrical performance (minimized parasitic inductance very short electrical paths absence redistribution layer) High reliability integration whole function traditionally based discrete interconnected components.
Flip-Chips delivered tape reel fully compatible with other high volume components (standard plastic packages CSP/BGA packages) regarding existing pick place equipment, standard solder reflow assembly equipment standard techniques.
REVISION HISTORY Table Revision history Date June-2002 January-2004 24-June-2004 Revision First issue Lead free information added Mechanical description notes updated page Description Changes
Information furnished believed accurate reliable. However, STMicroelectronics assumes responsibility consequences such information infringement patents other rights third parties which result from use. license granted implication otherwise under patent patent rights STMicroelectronics. Specifications mentioned this publication subject change without notice. This publication supersedes replaces information previously supplied. STMicroelectronics products authorized critical components life support devices systems without express written approval STMicroelectronics. logo registered trademark STMicroelectronics. other names property their respective owners 2004 STMicroelectronics rights reserved STMicroelectronics GROUP COMPANIES Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States www.st.com

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