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Marketing Part PALC22V10B PLDC20G10B PLDC20RA10 Description Reprogramm
Top Searches for this datasheetCMOS Marketing Part PALC22V10B PLDC20G10B PLDC20RA10 Description Reprogrammable CMOS PAL® Devic CMOS Generic 24-pin Reprogrammable Logic Device Reprogrammable Asynchronous CMOS Logic Device registered trademark Monolithic Memories Inc. PRODUCT DESCRIPTION (for qualification) Information provided this document intended generic qualification technically describes Cypress part supplied: Marketing Part Device Description: Cypress Division: Size (stepping): PALC22V10B Reprogrammable CMOS Device Cypress Semiconductor Corporation Rev. 7C322B August, 1995 mils mils What markings Die: Overall Mask) Level (pre-requisite qualification): Cypress Qualification completion/Marketing Availability Dates (Current REV): TECHNOLOGY/FAB PROCESS DESCRIPTION Number Metal Layers: Passivation Type Materials: Free Phosphorus contents glass layer(%): 1Die Coating(s), used: Gate Oxide Material/Thickness (MOS): Name/Location (prime) Facility: Line ID/Wafer Process CMOS, Double Poly, Double Metal /0.8 SiO2 Fab2 Round Rock, Fab2 PLD20 Generic Process Technology/Design Rule (µ-drawn): Metal Composition: Metal1: Ti,1%SiAl Metal2: SiAl 4,000A LTO+ 15,000A Oxynitride PLASTIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, Name: Mold Compound Name/Manufacturer: Lead Frame material: Lead Finish, composition: Attach Area Plating: Attach Method: Wire Bond Method: Name/Location Assembly (prime) facility: Assembly Line Process Epoxy Thermosonic Copper Solder plated, 85%Sn, 15%Pb Silver spot Attach Dim: Attach Material: Wire Material/Size: Omedata, Indonesia Indns-O P284 mils mils Silver Epoxy Gold 24-pins, 300-mil PDIP Sumitomo EME-6300H(R) PAGE CYPRESS SEMICONDUCTOR OTHER INFORMATION approval similarity, identify other devices using same basic with bonding metal mask options test selections explain: PLDC20G10B/PLDC20RA10 Cypress planning changes near future, identify change (Qtr/Yr) Design Rev./Shrink: Fab/Assembly site change: Other Devices qualified this technology: Other Packages qualified this device: Voltage Rating (per STD-008, Method 3018): Flammability Classification (UL-94V): Alternate Fab/Assembly Locations: None Assembly Anam, Korea (PLCC) Lead PLCC >2,000V Process Change: Cross Licensee/Licensor: Please attach following Qualification Reliability data revision Package type, assembly sites identified above (mark included): HAST (5.0V, 140°C, 85%RH, 15psig) Temperature Cycles (-65°C 150°C) Temperature Cycles (-40°C 165°C) Data Retention Bake, Plastic (165°C) Data Retention Bake, Hermetic (250°C) Autoclave (PCT, 121°C, 100%RH) Operating Life (temp): Steady State Life (HTSSL, 5.75V, 150°C) Temperature Humidity Bias (5.5V, 85°C, 85%RH) Latchup Testing Tests (MIL-STD 883, method 3015) Other: 150°C PAGE CYPRESS SEMICONDUCTOR PRODUCT INFORMATION QUALIFICATION SIMILARITY Product Family: Division: CMOS Cypress Semiconductor Rate Spead (ns) Size/ Type Rev. Size Design Rule (stepping) Fabrication Passivation Mold Type Compound Assembly Line Location Volt Rating Supplier's Part Number Process PALC22V10B -**JC -**PC -**JC -**PC -**JC -**PC PLCC 24.3 PDIP PLCC 24.3 PDIP PLCC 24.3 PDIP CMOS Line Sumitomo Oxynitride Sumitomo Oxynitride Sumitomo Oxynitride Anam, Korea Omedata, Indonesia Anam, Korea Omedata, Indonesia Anam, Korea Omedata, Indonesia 2,200V 500V 2,200V 500V 2,200V 500V PLDC20G10B CMOS PLDC20RA10 CMOS PAGE CYPRESS SEMICONDUCTOR Marketing Part: Description: PALC22V10B 28-pin, 300-mil PDIP DEVICE RELIABILITY SUMMARY Wafer Fab: Assembly: Fab2 Round Rock, Omedata, Indonesia High Temperature Dynamic Operating Life (HTOL, 5.75V, 150°C) Early Failure Rate Device Assy Lot# 2449916 Hours 0/503 Cumulative 0/503 PALC22V10B-PC 349501060 High Temperature Dynamic Operating Life (HTOL, 5.75V, 150°C) Latent Failure Rate Device PALC22V10B-PC Assy Lot# 349501060 Lot# 2449916 Hours 0/119 Hours 0/1171 Cumulative 0/119 High Temperature Steady State Life Test (HTSSL, 5.75V, 150°C) Device Assy Lot# Lot# 2449916 Hours 0/502 Hours 0/493 Cumulative 0/50 PALC22V10B-PC 349501060 Temperature Cycle (Condition -65°C 150°C) Device Assy Lot# Lot# 2449916 Cycles 0/51 1000 Cycles 0/51 Cumulative 0/51 PALC22V10B-PC 349501060 Autoclave (PCT, bias, 121°C, 100%RH, 15psig) Device Assy Lot# Lot# 2449916 Hours 0/51 Hours 0/51 Cumulative 0/51 PALC22V10B-PC 349501060 PAGE CYPRESS SEMICONDUCTOR Marketing Part: Description: PALC22V10B 28-pin, 300-mil PDIP DEVICE RELIABILITY SUMMARY Wafer Fab: Assembly: Fab2 Round Rock, Omedata, Indonesia High Accelerated Saturation Test (HAST, 5.0V, 140°C, 85%RH, 15psig) Device Assy Lot# Lot# 2449916 Hours 0/51 Cumulative 0/51 PALC22V10B-JC 349501060 Data Retention Test (DRET, 165°C, bias) Device Assy Lot# Lot# 2449916 Hours 0/80 Hours 0/80 Cumulative 0/80 PALC22V10B-PC 349501060 PAGE CYPRESS SEMICONDUCTOR DEVICE RELIABILITY SUMMARY Electrostatic Discharge Human Body Model Circuit 883, Method 3015 +2,200V Unit -2,200V +2,200V Unit -2,200V +2,200V +500V +500V +500V Unit Charge Device Model4 Unit Unit Unit -2,200V -500V -500V -500V Latchup Testing Cypress Internal Latch-up Procedure Current Injection 200mA Trigger Socket Temp 125°C ESD-CDM improvement plan implement. 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