Application Note August 2002 AN520.1 This article describes sever

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Application Note August 2002 AN520.1 This article describes sever

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CMOS Analog Multiplexers Switches; Specifications Application Considerations
Application Note August 2002 AN520.1
This article describes several important considerations CMOS analog multiplexers switches. includes selection criteria, parameter definitions, handling design precautions interfacing.
RON, Resistance
effective series on-switch resistance measured from input output under specified conditions. Note that changes with temperature (highest high temperature), supply voltage, lesser degree, with signal voltage current.
Which Switch Switch
Intersil provides complete line CMOS analog switches including replacements most available CMOS competition. types feature rugged no-latch-up construction, uniform characteristics over analog signal range, excellent high frequency characteristics. Hl-200 Hl-201 replace popular, cost DG200 DG201 type dual quad switches. Hl-5042 through HI-5051 resistance types, offering four switches virtually combinations. These replace IH504X series with significantly better performance, with both switches available configurations. These also plug-in replacements many DG180 DG190 series hybrid switches, offering advantage monolithic construction, with slightly longer switching times. analog switches contain overvoltage protection analog inputs, although they will withstand inputs volts greater than supplies. External current limiting should provided higher overvoltages anticipated, such resistor series with analog input value: R(ohms) (VIN VSUPPLY) where maximum expected input voltage. digital inputs have overvoltage/static charge protection.
IS(OFF), lD(OFF), lD(ON), Leakage Currents
Currents measured under conditions illustrated data sheet. guarantee only worst case high temperature leakages preferred, because room temperature picoampere levels virtually impossible measure repeatably available automated test equipment. Even under laboratory conditions, fixture test equipment stray leakages frequently exceed device leakage. Leakages tend double every 10oC temperature rise, reasonable assume that +25oC figure about 0.001 times +125oC measurement; however, some cases there ohmic leakages, such package surface, which would make +25oC reading higher than calculated. Each these leakage figures algebraic currents point being measured: each power supply, ground, through switches; current direction cannot predicted. making error analysis should assumed that leakages worst-case direction. most systems, lD(ON) most effect, creating voltage offset across closed switch equal ID(ON) RON.
VAL, VAH, Input Thresholds
lower upper limits digital address input voltage which switching action takes place. other parameters will valid addressed inputs less than inputs greater than VAH. Logic compatibility will discussed detail later this paper.
Data Sheet Definitions
Absolute Maximum Ratings
with integrated circuits, these maximum conditions which applied device (one time) without resulting permanent damage. device may, not, operate satisfactorily under these conditions conditions listed under "Electrical Specifications" only ones guaranteed satisfactory operation.
Input Leakage Current
Current digital input, which either direction. Digital inputs similar CMOS logic inputs; connection gates through resistor-diode protection networks. Unlike some other devices there negative resistance region which could create oscillating condition.
Analog Signal Range
input analog signal range over which reasonable accurate switching will take place. supply voltages lower than nominal, will equal voltage span between supplies. Note that other parameters such leakage currents guaranteed over smaller input range, would tend degrade towards limits. switches withstand applied input while applied output vice-versa) without switch breakdown this true some other manufacturers' devices.
TON, TOFF, Access Time
logic delay time plus output rise time point full scale analog output swing. After this time output will continue rise, approaching 100% point exponential curve determined CD(OFF).
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 321-724-7143 Intersil (and design) registered trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2002. Rights Reserved
TOPEN, Break-Before-Make Delay
time delay between switch turning another switch turning both switches being commanded simultaneously. This prevents momentary condition both switches being generally very minor problem.
tested breadboards prototypes. will interesting note which types best survive hazards weeks breadboard testing. Particular care semiconductors during incoming inspection installation quite important, because cost reworking finished assemblies with even small percentage preventable failures seriously erode profits. equipment should periodically inspected proper grounding. With these devices, usually necessary shackle personnel nearest water pipe, reasonable attention paid clothing floor coverings; alert periods unusually high static electricity. special lines already handling devices, wouldn't hurt them. There good rules P.C. card layout: Each card removable subassembly should contain decoupling capacitors each supply line ground. This only helps keep noise away from analog lines, gives good protection from static electricity damage when loose cards handled. When digital inputs come through card connector, pull-up resistor should CMOS input. This forces current through connector prevents possible circuit conditions (see following discussion digital interface). unused digital inputs must tied logic (ground) logic (logic supply device supply) depending truth table action desired. Open inputs tend oscillate between "1". Good design practices also dictate using series resistor when connecting unused input supply other than GND. would also best ground unused analog inputs/outputs uncommitted device pins.
CS(OFF), CD(OFF), CD(ON), Input/Output Capacitance
Capacitance with respect ground measured analog input/output terminals. CD(ON) generally CS(OFF) CD(OFF). CD(OFF) usually most important term rise time/settling characteristics determined CD(OFF), well high frequency transmission characteristics.
CDS(OFF), Drain Source Capacitance
equivalent capacitance shunting open switch.
Isolation
proportion high frequency signal applied open switch input appearing output: isolation VOUT This feedthrough transmitted through CDS(OFF) load composed CD(OFF) parallel with external load. isolation generally decreases 6dB/octave with increasing frequency.
Digital Input Capacitance
Capacitance ground measured digital input. This chiefly affects propagation delays when driven CMOS logic.
Power Dissipation: IQuiescent power dissipation, I-). This specified both operating standby ("Enable" ON/OFF). Note that, with CMOS devices, dissipation increases with switching frequency, that Intersil devices exhibit much less this effect.
Digital Interface
Reference Connection
Hl-5042 through HI-5051 HI-1818A/1828A require connecting digital logic supply (+5V +15V). Hl-200/201/506A/507A have VREF pins which normally left open when driving from volt logic (DTL TTL), connected higher logic supplies +15V) raise threshold levels when driving from CMOS HNlL. HI-200/201 will have significantly lower power dissipation when VREF connected high level supply. HI-506/507/508A/509A have VREF terminals, will operate reliably with logic supplied from volts.
Care Feeding Multiplexers Switches
Dielectrically isolated CMOS require more care handling than other semiconductor bipolar otherwise. However, they indestructible, reasonable common sense care should taken. laboratory breadboard, power should shut before inserting removing especially important that supply lines have decoupling capacitors ground permanently installed socket pins, intermittent supply connections create high voltage spikes through inductance feet wire. Because each major manufacturers CMOS multiplexers switches uses radically different process, urged that units from prospective suppliers equally
DTL/TTL Interface
major difference found comparisons similar devices from different manufacturers worst-case digital input high threshold (VAH VIH). These range anywhere from +5V; anything greater than +2.4V
obviously compatible with worst-case output levels. fact that CMOS input truly compatible unless external pull-up resistor added. output stages were designed with CMOS loads mind. experienced designer will always pull-up resistor from CMOS input volt supply when driving from TTL/DTL, following reasons: Interchangeability: allows substitution similar devices from several manufacturers. Noise immunity: output "high" condition quite high impedance. Even when voltage noise immunity seems satisfactory, line quite susceptible induced noise. pull-up resistor will reduce impedance while increasing voltage noise immunity. Compatibility: manufacturer does guarantee +2.0 volt minimum VAH. However, this accomplished with circuitry that anything compatible: input current voltage shows abrupt positive then negative resistance region which kind load recommended emitter follower stage. pull-up resistor will swamp negative resistance. Other CMOS inputs capacitively couple internal switching spikes input which could cause double-triggering without pull-up resistor. Reliability: shouldn't happen with carefully processed ICs, possible long term degradation CMOS devices usually involves threshold voltage shifts. pullup resistor will help maintain operation input thresholds drift spec. units without adequate input protection, resistor also helps protect device when loose P.C. card handled. Where interface goes through P.C. connector, resistor will force current through connector break down insulating film which otherwise might build cause erratic circuit operation. resistor connected from CMOS input volt supply adequate type output. power consumption critical, open collector TTL/DTL should used, allowing higher value resistor voltage drop across resistor computed from specified level leakage currents output CMOS input.
Electromechanical Interface
When driving inputs from mechanical switches relays, either pull-up pull-down resistor must connected CMOS input clear circuit film damp spikes, illustrated Figure (c).
CMOS CMOS CMOS
POOR
GOOD
GOOD
FIGURE PULL-UP/PULL-DOWN RESISTOR CONNECTED CMOS INPUT
CMOS Interface
digital input circuitry devices identical series 4000 54C/74C logic inputs, compatible with CMOS logic with supplies between +15V without external pull-up resistors.
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