QUALITY SEMICONDUCTOR, INC. 3.3V SYNC DRAM Clock Driver QS52

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QUALITY SEMICONDUCTOR, INC. 3.3V SYNC DRAM Clock Driver QS52

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QS52509A ADVANCE INFORMATION
QUALITY SEMICONDUCTOR, INC.
3.3V SYNC DRAM Clock Driver
QS52509A ADVANCE INFORMATION
DESCRIPTION
QS52509A high performance, skew, jitter, multiple output phase lock loop clock driver. designed interface with high-speed SDRAM application range 25MHz 160MHz. provides precise phase frequency alignment between incoming clock output clocks. With spread spectrum tracking capabilities, fully compliant PC-100 guideline specifications. provide excellent jitter characteristics with minimum board space cost, loop filter been integrated chip. Unlike some competitors, QS52509A chip resistor reduce ground bounce noise, provide impedance matching traces. part different output enable (OE) pins different banks outputs which independently controlled connecting them VCC. affected pins. QS52509A offered 24-pin TSSOP package industrial temperature grade.
Intel PC-100/spread spectrum compliant outputs: bank bank dedicated output feedback Balanced drive outputs: ±12mA Separate output enable (OEx) each bank External feedback (FB), internal loop filter skew guaranteed between outputs Supports 25MHz 160MHz SDRAM JEDEC compatible LVTTL 3.3V supply voltage Industrial temperature range Inputs tolerant compatible with CDC2509B Integrated damping resistor noise Available 24-pin TSSOP package
Figure Logic Block Diagram
CLKIN
OUTPUT LOGIC
MDSC-00033-03 SEPTEMBER 1998
QUALITY SEMICONDUCTOR, INC.
QS52509A ADVANCE INFORMATION Figure Configuration (All Pins View)
TSSOP
AGND
CLKIN AVCC VCC/PLL_EN
Table Description
Name CLKIN A0.A4 B0.B3 Functional Description Clock input
Bank clock outputs. Each output effective damping resistor. Bank clock outputs. Each output effective damping resistor. feedback input normally connected user. connected output strapped HIGH. Dedicated clock output (non-disable). effective damping resistor. Output enable. Asserted HIGH normal operation. When asserted LOW, bank clock outputs forced LOW. Output enable. Asserted HIGH normal operation. When asserted LOW, bank clock outputs forced LOW. When HIGH, normal operation. When LOW, disables CLKIN goes outputs. Includes pull VCC. Power supply output buffers Power supply (quiet) Ground supply output buffers Ground supply (quiet)
PLL_EN VCCQ
Table Absolute Maximum Ratings
Supply Voltage Ground -0.5V 7.0V Output Voltage VOUT -0.5V 0.5V Input Voltage -0.5V 7.0V Input Diode Current with -20mA Maximum Power Dissipation 70°C 0.75W 85°C, 0.55W TSTG Storage Temperature -65° 150°C
Note: Stresses greater than those listed under absolute maximum ratings cause permanent damage devices that result functional reliability type failures.
QUALITY SEMICONDUCTOR, INC.
MDSC-00033-03 SEPTEMBER 1998
QS52509A ADVANCE INFORMATION Table Capacitance
25°C, 1MHz,
TSSOP CLKIN/FB Units
Note: Capacitance characterized tested.
Table Recommended Operating Conditions
Symbol Parameter Power Supply Voltage Input Voltage Ambient Operating Temperature Unit 3.15 3.45
Table Electrical Characteristics Over Operating Range
Symbol Parameter Input HIGH Voltage Input Voltage Clamp Diode Voltage Test Condition Guaranteed Logic HIGH inputs Guaranteed Logic inputs Min., -18mA
|IPU|
Note: Typical values indicate 3.3V 25°C.
Table Power Supply Characteristics
Symbol Parameter ICCQ Quiescent Power Supply Current
-0.7 -1.2 Output HIGH Voltage Output Voltage Min., -12mA Min., -100µA Min., 12mA Min., 100µA PLL_EN Pull Current Input Leakage Current Max., PLL_EN Max., DULOW, Max., PLL_EN==HIGH,ZA CLKIN LOW, outputs unloaded Max., 3.0V Power Supply Current Input HIGH Dynamic Power Supply Max., Current Output Total Power Supply Current 3.3V, 66MHz
Typ(1)
Unit
Test Conditions
Unit
ICCD
CLKIN
Total Power Supply Current(1) 3.3V, fCLKIN 166MHz(2)
Notes: Guaranteed characterization production tested. outputs each loaded with 15pF.
MDSC-00033-03 SEPTEMBER 1998
QUALITY SEMICONDUCTOR, INC.
QS52509A ADVANCE INFORMATION Table Switching Characteristics Over Operating Range
Symbol Description(1) TPWC FCLKIN TSK1 TOPW TLOCK TR,TF TDEV Input clock pulse, high Input frequency CLKIN input delay
(2,3)
100MHz
Unit
TSK2(SSC) Spread spectrum clock induced skew Output duty cycle distortion, 100MHz Output pulse width distortion CLKIN phase lock Output rise fall times (0.8V 2.0V)(2,3)
(2,3,4)
Notes: timing parameters measured 100MHz with reference levels 0.5VCC. This parameter guaranteed design verified during production statistical correlation. Output Loading: 500. (See Figure Output signal nominally duty cycle: maximum error period 0.65ns, whichever greater. tDEV applies device operating under identical conditions (VCC, ambient temperature, package, flow, etc.) Spread spectrum clock induced skew measured under PC-100 conditions 30kHz 50kHz modulation with peak deviation -0.5%.
TION
Output-Output skew, outputs, same transition(2,3), 100MHz Cycle-cycle jitter(2,3), 100MHz -100
(2,6)
-200
(2,3,4)
TCYCLE/2 0.65
TCYCLE/2 0.65 1.75
Skew between outputs different devices(2,5)
QUALITY SEMICONDUCTOR, INC.
MDSC-00033-03 SEPTEMBER 1998
QS52509A ADVANCE INFORMATION
Figure Test Loads Waveforms
Output 30pF
Test Load
1.0ns 3.0V 2.0V 0.5Vcc 0.8V tPWC
1.0ns
2.0V 0.5VCC 0.8V
TCYCLE
LVTTL Output Waveform
LVTTL Input Test Waveform
Figure Timing Diagram
CLKIN
tSK1
Output
tSK1
ORDERING INFORMATION
509A
Clock Management Product Prefix (QS5) Resistor Option Part Number MDSC-00033-03 SEPTEMBER 1998 QUALITY SEMICONDUCTOR, INC. Package (170-mil wide TSSOP)
QS52509A ADVANCE INFORMATION
170-Mil TSSOP Package Code
Thin Shrink Small Outline Package Plastic Small Outline Gull-Wing
Notes: Dimensions measured maximum material condition include mold flash. Allowable mold flash 0.006in. side. Lead coplanarity 0.004in. maximum.
SEATING PLANE
JEDEC# Unit Symbol
INCHES 0.046 0.004 0.010 0.005 0.307 0.173 0.047 0.006 0.012 0.006 0.311 0.177
MO-153AD
MO-153AD MILLIMETERS 1.14 0.05 0.19 0.09 1.17 0.10 0.25 0.13 0.65 0.50 0.18 0.60 0.75 0.22 1.20 0.15 0.30 0.16
0.045
0.002 0.007 0.004 0.303 0.169
0.0256 0.238 0.020 0.007 0.252 0.024 0.008 0.269 0.030 0.009
QUALITY SEMICONDUCTOR, INC.
MDSC-00033-03 SEPTEMBER 1998

QUALITY SEMICONDUCTOR, INC. 3.3V SYNC DRAM Clock Driver QS52

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