Protocol Implementation Using PICmicro® MCUs Authors: Butler Thom

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Protocol Implementation Using PICmicro® MCUs Authors: Butler Thom

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AN729
Protocol Implementation Using PICmicro® MCUs
Authors: Butler Thomas Schmidt Thorsten Waclawczyk Microchip Technology Inc.
ever, instead having clock line, each byte marked start stop bits individual bits asynchronously timed like RS232.
ELECTRICAL CONNECTIONS
Figure shows typical Protocol configuration. uses single wire pulled high through resistor with open collector drivers. Dominant state signaled ground level occurs when node pulls low. Recessive state when VBAT 18V) requires that nodes float. idle state, floats high, pulled through resistor. operates between 18V, parts must survive bus. Typically, microcontroller isolated from levels line driver/receiver. This allows microcontrollers operate levels, while operates higher levels. terminated VBAT each node. Master terminated through resistor, while Slaves terminated through 20-47K resistor. Maximum length designed meters. press time (early 2000), K-Line drivers used until true drivers available.
INTRODUCTION
Protocol designed consortium European auto manufacturers cost, short distance, speed network. Designed communicate changes switch settings respond switch changes, intended communicate events that happen "human" time (hundreds milliseconds). This Application Note intended replace recreate Protocol Specification. Rather, intended provide broad overview provide high level look works, implement Slave node PICmicro® device what it's designed complete Protocol Specification expected available worldwide www.lin-subbus.com. However, until then, copies Protocol Specification only distributed Audi DaimlerChrysler Motorola, Inc., Volcano Communication Technologies Volkswagen Volvo Corporation.
FEATURES
Protocol supports bi-directional communication single wire, while using inexpensive microcontrollers driven oscillators, avoid cost crystals ceramic resonators. Instead paying price accurate hardware, pays price time software. protocol includes autobaud step every message. Transfer rates 20Kbaud supported, along with power SLEEP mode, where shut down prevent draining battery, powered node bus. itself cross between I2Cand RS232. pulled high resistor each node pulls low, open collector driver like I2C. How-
2000 Microchip Technology Inc.
Preliminary
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FIGURE CONFIGURATION
MaxiLIN Protocol
VBAT Transceiver VBAT
VBAT Transceiver
VBAT Transceiver
Transceiver
Master
Slave
Slave
Slave
BYTE PROTOCOL
Each byte framed start stop bits shown Figure Within each byte, data transmitted first. start opposite idle state zero, stop equals idle state (1).
FIGURE
BYTE PROTOCOL
Idle Start
Stop
Each byte framed start stop bit, data transmitted Least Significant first.
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AN729
MESSAGE PROTOCOL
Master controls polling Slaves share their data with rest bus. Slave nodes only transmit when commanded Master, which allows bi-directional communication without further arbitration. Message transfers start with Master issuing synch break, followed synch field message field. also sets clock entire transmitting synch field beginning each message, which used clock synchronization. Each Slave must this synch byte adjust their baud rate. synch break dominant, held times, followed stop (recessive). This lets Slaves know that message coming. Master Slave clocks have drifted much 15%. Therefore, synch break received Slave only times, long times. second byte each message ident byte, which tells what data will follow indicates which node should answer long answer shall Only Slave respond given command. Slaves only transmit data when directed Master. Once data bus, node receive that data. Therefore, communication from Slave another does have directed through Master.
FIGURE
MESSAGE PROTOCOL
Message Header
Idle Synch Break Synch Field Ident Field Data Byte Data Byte
Response
Data Byte Checksum
Interframe Response Space
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CLOCK SYNCHRONIZATION
Protocol designed cost oscillators controllers. keep communication working each node's clock drifts, Slaves must detect Master's baud rate every transfer adjust current baud rate. this reason, each transaction starts with synch field. synch field byte 0x55 (alternating 1's). This allows every Slave node detect times. counting these transitions, dividing rounding, each Slave adjusts their timing Master.
IDENTIFIER FIELD
Following synch field, identifier field, which tells what's coming next. ident field broken into fields: bits (0-3) address devices bus, bits (4-5) indicate length message follow last bits (6-7) used parity. address bits address Slaves, each Slave send byte response, total different messages. Protocol Specification does define content each message, except SLEEP command detailed Lower Power Sleep section. Instead, that left application. Messages from node another sent directly, directed Master. data does have received Master retransmitted receiving node. Instead, message received acted upon node.
FIGURE
SYNCH FIELD
Idle
Start
Stop
Start Clock
Count time successive falling edges, then divide round, single time. divide round easily implemented right shifts carry back
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FIGURE IDENT FIELD
Parity Parity
Device Address Message Length Date Bytes
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ERROR DETECTION
following errors must detected counted within each node: Errors: transmitting node should compare what thinks should against what actually bus. controllers must wait long enough respond before testing bit. Given minimum edge slew rates 1V/uS, maximum voltage (18V), transmitter should wait 18µS before testing, correct. Checksum Errors: data content each message protected checksum byte, which inverted module-256 checksum data bytes. Parity Errors: command byte uses parity bits protect other These need recalculated compared. there error, command should ignored error logged. Protocol directly compatible CANBUS, however, anticipated that will operate conjunction with another. CANBUS might used communication throughout car, while Protocol would only used within small section car, within door. CAN-LIN Protocol interface node would necessary connect busses. interface node would collect information from Protocol nodes pass that information along CANBUS.
LOWER POWER SLEEP
Master direct nodes enter SLEEP mode sending ident code 0x80. This only message defined Protocol Specification. content data bytes following SLEEP command defined. Slaves receiving SLEEP command should set-up wake-up change from power-down minimum current drain. will float high consume current. node wake-up sending wake-up signal, which character 0x80 (low times followed time high). When this signal received, nodes should wake-up wait Master start polling normal fashion. Master fails wake after times (6400uS 20Kbaud), node that attempting wake Master should again. This attempted total times before waiting 15000 times (750mS 20Kbaud).
ERROR REPORTING
There direct error reporting mechanism. However, each Slave node expected track it's errors. Master then request error status part normal message protocol.
CANBUS INTERFACE
FIGURE SLEEP MESSAGE
SLEEP Mode Frame
Sync Break Sync Field SLEEP 0x80 Data Data Checksum
Slave Wake-up 0x80
Master
Synch Break
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AN729
DEMONSTRATION SOFTWARE
code Appendix demonstrates communication Protocol. hardware consists buttons LEDs, shown Figure changes state every button pushes button Likewise, changes state every presses button response button counts transmitted bus. response button counts updated from bus.
SOFTWARE FUNCTION
order initialize Protocol Slave handler, user call routine InitLinSlave. This routine initializes interrupt TMR0. TMR0 will used measure length generate baudrate. After initialization, user execute code. code will interrupted once falling edge detected RB0. falling edge detected, code will branch into interrupt service routine. interrupts, except TMR0 RB0, must disabled accurately time synch field. After baudrate calculated, interrupt service routine exited. Upon next interrupt RB0, Protocol Slavehandler goes automatically into receive mode order receive identifier field data bytes. Once start identifier field data byte detected, where program branches into interrupt service routine, identifier field received decoded. Depending received identifier, code executed, example, storing data, turn LED, etc. This code included user into subroutine DecodeIdTable after routine executed. After frame completed, flag FCOMPLETE set. This flag indicates that data received correctly ready further processing. This flag cleared user's firmware. Note: TMR0 used time measurement baudrate generation. Therefore, TMR0 available application software.
FIGURE
DEMONSTRATION HARDWARE
Protocol VBAT PICmicro®
Protocol Driver
SOFTWARE OPERATION
Protocol code works interrupt triggered from RB0. This necessary implement SLEEP/Wake- requirement. Once interrupt triggered, counts length time. Then synch byte read local time determined. This then compared against original time determine original time more than times thus, signaled synch break, less than signaling wake from SLEEP. it's wake from SLEEP, code exits continues waiting synch break. it's synch break, then reads command byte, checks parity bits checks action table determine it's actions from there. action table defines source destination data bus.
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ERROR DETECTION
Slave node process detects following errors: Checksum error errors Missing Stop Parity error Time-out errors When Slave code detects error, it's recorded ERRORFLAGS register shown figure message ignored. These error flags cleared once valid ident field received.
FIGURE
ERROR FLAGS
Time
Used
Error
Error
Parity Error
Response
These flags when detected.
SOFTWARE PERFORMANCE
Protocol Slavehandler operate speed 20Kbaud. Protocol Slavehandler requires words program memory (not including program memory macros IDs) bytes data memory. This application ideal Microchip's internal oscillator operating 4MHz.
INTEGRATION INTO CUSTOM CODE
user edit subroutine DecodeIDTable. this section, user defines what action taken upon certain identifier. Furthermore, user define what action taken upon certain errors, (i.e., timing error others).
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2000 Microchip Technology Inc.
2000 Microchip Technology Inc.
Software License Agreement
software supplied herewith Microchip Technology Incorporated (the "Company") PICmicro® Microcontroller intended supplied you, Company's customer, solely exclusively Microchip PICmicro Microcontroller products. software owned Company and/or supplier, protected under applicable copyright laws. rights reserved. violation foregoing restrictions subject user criminal sanctions under applicable laws, well civil liability breach terms conditions this license. THIS SOFTWARE PROVIDED CONDITION. WARRANTIES, WHETHER EXPRESS, IMPLIED STATUTORY, INCLUDING, LIMITED IMPLIED WARRANTIES MERCHANTABILITY FITNESS PARTICULAR PURPOSE APPLY THIS SOFTWARE. COMPANY SHALL NOT, CIRCUMSTANCES, LIABLE SPECIAL, INCIDENTAL CONSEQUENTIAL DAMAGES, REASON WHATSOEVER.
APPENDIX SOURCE CODE
MPASM 02.30.09 Intermediate LINSLAVE.ASM 1-27-2000 9:57:59 PAGE
Preliminary
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OBJECT CODE VALUE
LINE SOURCE TEXT
00001 00002 00003 00004 00005 00006 00007 00008 00009 00010 00011 00012 00013 00014 00015 00016 00017 00018 00019 00020 00021
Software License Agreement software supplied herewith Microchip Technology Incorporated (the "Company") PICmicro® Microcontroller intended supplied you, Company's customer, solely exclusively Microchip PICmicro Microcontroller products. software owned Company and/or supplier, protected under applicable copyright laws. rights reserved. violation foregoing restrictions subject user criminal sanctions under applicable laws, well civil liability breach terms conditions this license. THIS SOFTWARE PROVIDED CONDITION. WARRANTIES, WHETHER EXPRESS, IMPLIED STATUTORY, INCLUDING, LIMITED IMPLIED WARRANTIES MERCHANTABILITY FITNESS PARTICULAR PURPOSE APPLY THIS SOFTWARE. COMPANY SHALL NOT, CIRCUMSTANCES, LIABLE SPECIAL, INCIDENTAL CONSEQUENTIAL DAMAGES, REASON WHATSOEVER. filename: LINSLAVE.ASM
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00022 00023 00024 00025 00026 00027 00028 00029 00030 00031 00032 00033 00034 00035 00036 00037 00038 00039 00040 00041 00042 00043 00044 00045 00046 00047 00048 00049 00050 00051 00052 00053 00054 00055 00056 00057 00058 00059 00060 00061 00062 00063 00064 00065 00066 00067 00068
Local Interconnect Network SpecRev Author: Thorsten Waclawczyk Company: Arizona Microchip Technology GmbH Revision: Date: 18-JAN-2000 Assembled using MPASM 2.30.07 include files: p16C622.inc 1.01 Implements slave handler conforming spec revision with using external interupt INTE TMR0 interrupt based system. HANDLER DESCRIPTION linslave handler must initialized before starting main task calling routine "InitLinSlave". After initialization interrupt based handler waits first falling second rising edge measure length synchbreak lowtime. Then handler waits next falling edge count processor cycles between next four falling edge detections. This result divided bitlength. make sure that this header sequence, bitlength multiplied compared initial synchbreak count. synchbreak count longer, know synchbreak. After that handler receive mode read identifier using bitlength value into timer0. When byte received will checked decoded subroutine "CheckIdentifierByte" that handler handle incoming outgoing resonse frame. timing error checking will handled handler that only thing user define DecodeIdTable. This gives action each possible that come across from master. Three actions possible: MacroLstMode, listen take action data. MacroRsMode, which provides buffer
2000 Microchip Technology Inc.
2000 Microchip Technology Inc. LIST p=16C622,F=INHX8M #include <p16c622.inc> LIST P16C622.INC Standard Header File, Version 1.01 LIST _CONFIG _CP_OFF _WDT_OFF _RC_OSC Microchip Technology, Inc. #### defines
Preliminary
recieving data. MacroTxMode while sets buffer transmit from. When complete message frame been done flag "COMFLAGS,FCOMPLETE" set. after that user process data buffer there errors. After data processed complete flag must cleared user signal that data been processed. DEMO PROGRAM DESCRIPTION slave node buttons three LEDs. buttons read counted. button counts transmitted response ID1. LEDs change state when value register corresponding counter (COMPLED1 COMPLED2) matches delimiter value, currently updates counters bus. LED3 toggles each time detects complete message frame. what's changed changes date changes program data usage program 0x0420 data 0x24 stacklevel
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2007
3FFB
00069 00070 00071 00072 00073 00074 00075 00076 00077 00078 00079 00080 00081 00082 00083 00084 00085 00086 00087 00088 00089 00090 00091 00092 00093 00094 00095 00096 00097 00098 00099 00100 00101 00102 00103 00104 00105 00106 00107 00001 00002 00165 00108 00109 00110 00111 00112
#define RSLINEPIN #define TXLINEPIN #define LINSLAVERAM location used LINSLAVE modul -0x20 startadress
connected receive line connected send line
AN729
DS00729A-page CBLOCK LINSLAVERAM COPYWREG COPYSTATUS holds copy WREG holds copy STATUS HICOUNT:0,TIMEOUTLO,TIMEOUTHI COUNTEDGES temporary highbyte TMR0 timeout counter software counter baudrate bitposition bitlength numbers send/receive block carries field bits5.0 carries ID_number protocols communication errors linbus communication bits BITREG:0,BITNBR,BITLENGTH DATABLOCKLENGTH PREIDNUMBER IDNUMBER ERRORFLAGS COMFLAGS BUFFERPTR COMBUFFER DATACRC TXDATAFIELD:8 RSDATAFIELD:8 DUMMY:2 ENDC MIRRCOPYWREG (COPYWREG 80h) checksum over xmit rcsv block data transmission buffer data receive block buffer reserve location page1 #define LINSLAVEBLOCKLENGTH (DUMMY+1 LINSLAVERAM) #define LINBLOCKEND (DUMMY+1) calculate needed space LINslave #### defines defines errorflag variable #define FTIMEOUT #define FBITERROR #define FCRCERROR #define FIDPARITYERROR communication receive transmit outgoing value different than line value isn't correct parity over correct
00000020 00000021
00000022
00000024 00000025
Preliminary
00000027 00000029 0000002B 0000002C 0000002D 0000002E 0000002F 00000030 00000031 00000032 00000033 0000003B 00000043
000000A0
00113 00114 00115 00116 00117 00118 00119 00120 00121 00122 00123 00124 00125 00126 00127 00128 00129 00130 00131 00132 00133 00134 00135 00136 00137 00138 00139 00140 00141 00142 00143 00144 00145 00146 00147 00148 00149 00150 00151 00152 00153 00154 00155 00156 00157 00158 00159
2000 Microchip Technology Inc.
#define FNORESPONSE defines comflag variable #define #define #define #define #define #define #define #define FSYNCHBREAK FRSDATA FTXDATA FCOMDATA FLISTENONLY FCOMPLETE FSLEEPMODE synch_break detected byte receives next byte data block read data block sent communication running byte command only communication completed sleep-mode frame
echo
2000 Microchip Technology Inc. #### main task declaration this point used variables demo program will defined #define LED1 #define LED2 #define LED3 #define BUTTON1 #define BUTTON2 input Toggles after presses button toggles after presses button indicates complete message frame CBLOCK TXDATAFIELD BUTTONPRESSED1 BUTTONPRESSED2 ENDC register used CBLOCK RSDATAFIELD COMPLED1 COMPLED2 ENDC define global variables used main task register used CBLOCK LINBLOCKEND+1 COMPERATOR B1FILTER B2FILTER DEBOUNCECOUNTER COPYPORTB contains delimiter switch on/off LEDs debouncefilter button1 debouncefilter button2
Preliminary
00000033 00000034
0000003B 0000003C
00000045
00000046
00160 00161 00162 00163 00164 00165 00166 00167 00168 00169 00170 00171 00172 00173 00174 00175 00176 00177 00178 00179 00180 00181 00182 00183 00184 00185 00186 00187 00188 00189 00190 00191 00192 00193 00194 00195 00196 00197 00198 00199 00200 00201 00202
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00000047 00000048 00000049
00203 00204 00205
0000004A
EDGEDETECT ENDC #### declare MODE macros MacroRsMode MACRO StartAddrOfPtr COMFLAGS,FRSDATA movlw StartAddrOfPtr movwf retlw ENDM MacroTxMode MACRO StartAddrOfPtr COMFLAGS,FTXDATA movlw StartAddrOfPtr movwf retlw ENDM MacroLstMode MACRO COMFLAGS,FLISTENONLY BUFFERPTR BUFFERPTR indicates receive mode wanted location where data will stored initialize pointer
AN729
DS00729A-page indicates transmission mode wanted location where data will read from initialize pointer indicates receive mode without saving received data this necessary have correct jump table length retlw ENDM #### RESETvector RESET goto Main 0x0000 reset-vector #### INTvector 0x0004 COPYWREG STATUS,W STATUS,RP0 COPYSTATUS INTCON,T0IF save used registers WREG switch bank0 save STATUS page0 INTvector movwf movf movwf TMR0int btfss
Preliminary
0000
0000
29A9
2000 Microchip Technology Inc.
0004 0004 0005 0006 0007 0008 0008
00A0 0803 1283 00A1
1D0B
00206 00207 00208 00209 00210 00211 00212 00213 00214 00215 00216 00217 00218 00219 00220 00221 00222 00223 00224 00225 00226 00227 00228 00229 00230 00231 00232 00233 00234 00235 00236 00237 00238 00239 00240 00241 00242 00243 00244 00245 00246 00247 00248 00249 00250 00251 00252
2000 Microchip Technology Inc.
0009
2815
Preliminary
00253 goto ExtInt timer enabled 00254 000A 0AA2 00255 incf HICOUNT,F increment highbyte also 000B 1D03 00256 btfss STATUS,Z lowbyte timeout counter 000C 2810 00257 goto TMR0Int1 00258 000D 0AA3 00259 incf TIMEOUTHI,F timeout sequence after 000E 19A3 00260 btfsc TIMEOUTHI,3 3000 cycles 000F 17AE 00261 ERRORFLAGS,FTIMEOUT signal timeout 00262 0010 00263 TMR0Int1 0010 110B 00264 INTCON,T0IF clear overflow flag 0011 192F 00265 btfsc COMFLAGS,FRSDATA check receiver mode 0012 2881 00266 goto GetData 00267 0013 19AF 00268 btfsc COMFLAGS,FTXDATA check transmit mode 0014 28BE 00269 goto PutData 00270 0015 00271 ExtInt 0015 1E0B 00272 btfss INTCON,INTE check external interupt 0016 28F8 00273 goto IntrEnd eanabled 0017 1C8B 00274 btfss INTCON,INTF possibly occured 0018 28F8 00275 goto IntrEnd 00276 0019 3026 00277 movlw 0x26 cycles 001A 052F 00278 andwf COMFLAGS,W next byte falling 001B 1D03 00279 btfss STATUS,Z edge startbit initialize 001C 286D 00280 goto GetDataInit reading byte from 00281 001D 182F 00282 btfsc COMFLAGS,FSYNCHBREAK synch_break? 001E 2832 00283 goto CountSynchByte then sequence measure 00284 synch_byte will expected 001F 1683 00285 STATUS,RP0 Message[302]: Register operand bank Ensure that bank bits correct. 0020 1B01 00286 btfsc OPTION_REG,INTEDG rising edge selected 0021 2827 00287 goto CopySyncBreakLength then save count synchbreak Message[302]: Register operand bank Ensure that bank bits correct. 0022 1701 00288 OPTION_REG,INTEDG else rising edge sensitivity 0023 1283 00289 STATUS,RP0 00290 0024 0181 00291 clrf TMR0 initialize used counter 0025 01A2 00292 clrf HICOUNT measure synch break 0026 28F8 00293 goto IntrEnd wait rising edge 00294 0027 00295 CopySyncBreakLength Message[302]: Register operand bank Ensure that bank bits correct. 0027 1301 00296 OPTION_REG,INTEDG falling edge sensitivity
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0028 0029 002A 002B 002C 002D 002E clrf goto COUNTEDGES COMFLAGS,FSYNCHBREAK IntrEnd hibyte cleared received value synch break sequence start another loop detect synch break otherwise initialize synch byte detection measurement
1283 0801 00A7 0822 00A8 1903 2868
movf movwf movf movwf btfsc goto
STATUS,RP0 TMR0,W SYNCLENGTH HICOUNT,W SYNCLENGTH+1 STATUS,Z LowerSynchLength
detect startbit identifier byte save counter value
AN729
DS00729A-page CountSynchByte Counts cycles between five falling edges calculate single bitlength communicating with master. first falling edge clears count registers. After fifth edge, bitlength calculated dividing count rounding. CountSynchByte uses cycles arrive movf COUNTEDGES,W btfss STATUS,Z first falling edge then goto CountSynchEdges clrf TMR0 ;initialize bytelength couter clrf HICOUNT else check count passed edges wait next falling edge COUNTEDGES,2 GetSynchLength COUNTEDGES,F IntrEnd edges counted calculate actual bitlength cycle counts dividing 16Bit result CountSynchEdges btfsc goto incf goto GetSynchLength btfsc incf movf movwf movf sublw INTCON,T0IF HICOUNT,F TMR0,W BITLENGTH STATUS,C HICOUNT,F BITLENGTH,F STATUS,C HICOUNT,F BITLENGTH,F STATUS,C HICOUNT,F BITLENGTH,F BITLENGTH,W result bitlength BITLENGTH lower than fastest
002F 0030 0031
01A4 142F 28F8
0032 0032 0033 0034 0035 0036
0824 1D03 2837 0181 01A2
Preliminary
0037 0037 0038 0039 003A 003B 003B 003C 003D 003E 003F 0040 0041 0042 0043 0044 0045 0046 0047 0048 0049
1924 283B 0AA4 28F8
190B 0AA2 0801 00AA 1003 0CA2 0CAA 1003 0CA2 0CAA 1003 0CA2 0CAA 082A 3C31
00297 00298 00299 00300 00301 00302 00303 00304 00305 00306 00307 00308 00309 00310 00311 00312 00313 00314 00315 00316 00317 00318 00319 00320 00321 00322 00323 00324 00325 00326 00327 00328 00329 00330 00331 00332 00333 00334 00335 00336 00337 00338 00339 00340 00341 00342 00343
2000 Microchip Technology Inc.
004A 004B CheckSynchBreakLength Multiplies counted bitlength synch break longer than normal data byte. normal data byte contains dominant startbit, databits recessive stopbit, measured lowtime synchbreak longer than bitlength times it's synchbreak.
2000 Microchip Technology Inc. btfsc goto STATUS,C LowerSynchLength bitrate synch break length store bitlength multiply bitlengh with bitlength value twice multiply CheckSynchBreakLength clrf DUMMY+1 movf BITLENGTH,W movwf DUMMY STATUS,C DUMMY,F DUMMY+1,F DUMMY,F DUMMY+1,F DUMMY,F DUMMY+1,F addwf DUMMY,F btfsc STATUS,C incf DUMMY+1,F addwf DUMMY,F btfsc STATUS,C incf DUMMY+1,F movf DUMMY+1,W subwf SYNCLENGTH+1,W btfss STATUS,C goto LowerSynchLength btfss STATUS,Z goto HigherSyncLength movf DUMMY,W subwf SYNCLENGTH,W btfss STATUS,C goto LowerSynchLength btfss STATUS,Z goto HigherSyncLength first check highbytes bitlength synch length header detected bitlength synch length header detected highbytes equal check lowbytes LowerSynchLength clrf COMFLAGS INTCON,INTE goto IntrEnd HigherSyncLength reset linslave allow external interrupt dedicate first faling edge
1803 2868
Preliminary
004C 004C 004D 004E 004F 0050 0051 0052 0053 0054 0055 0056 0057 0058 0059 005A 005B 005C 005D 005E 005F 0060 0061 0062 0063 0064 0065 0066 0067
01C4 082A 00C3 1003 0DC3 0DC4 0DC3 0DC4 0DC3 0DC4 07C3 1803 0AC4 07C3 1803 0AC4 0844 0228 1C03 2868 1D03 286B 0843 0227 1C03 2868 1D03 286B
0068 0068 0069 006A
01AF 160B 28F8
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006B
00344 00345 00346 00347 00348 00349 00350 00351 00352 00353 00354 00355 00356 00357 00358 00359 00360 00361 00362 00363 00364 00365 00366 00367 00368 00369 00370 00371 00372 00373 00374 00375 00376 00377 00378 00379 00380 00381 00382 00383 00384 00385 00386 00387 00388 00389 00390
006B 006C GetDataInit This function initializes bitlength timer (TMR0) when falling edge start detected reading takes place center time. typical communication speeds 9600 19.2kbaud, timer times skip remainder start wake midway through data bit. However slow baud rates, slower than about kbaud, times overflow timer. this case timer half time we'll wake through start adjust counter account extra bit.
14AF 28F8
goto
COMFLAGS,FID IntrEnd
next databyte comming identifier byte
AN729
DS00729A-page GetDataInit clrf clrf COMBUFFER BITNBR COMFLAGS,FCOMPLETE BITLENGTH,W .166 STATUS,C SetHalfStartbitLength STATUS,C BITNBR,F BITLENGTH,W BITLENGTH,W GetDataInitEnd movf sublw btfss goto incf addwf goto clear input buffer counter clear communication complete indicator check baudrate less than higher then center position into startbit else center position into first databit calculating half bitlength SetHalfStartbitLength BITLENGTH,W center stopbit build complement timer correct timer center stopbit INTE off,T0IE clear flags interrupts indicates receive mode GetDataInitEnd xorlw addlw movwf movlw movwf goto 0xff (.62) TMR0 0x20 INTCON COMFLAGS,FRSDATA IntrEnd GetData
006D 006D 006E 006F
01B1 01A9 132F
Preliminary
0070 0071 0072 0073
082A 3CA6 1C03 2879
0074 0075 0076 0077 0078
1003 0AA9 0C2A 072A 287A
0079 0079
0C2A
2000 Microchip Technology Inc.
007A 007A 007B 007C 007D 007E 007F 0080
3AFF 3E3E 0081 3020 008B 152F 28F8
00391 00392 00393 00394 00395 00396 00397 00398 00399 00400 00401 00402 00403 00404 00405 00406 00407 00408 00409 00410 00411 00412 00413 00414 00415 00416 00417 00418 00419 00420 00421 00422 00423 00424 00425 00426 00427 00428 00429 00430 00431 00432 00433 00434 00435 00436 00437
Timer been return here time test incoming midway through time. This function samples rotates value into data buffer. identifier byte, call DecodeIDTable figure what next (Recieve message, transmit message ignore message). data byte, stored buffer previously call DecodeIDTable. When data been received, checksum calculated compared against transmitted value. there errors, FCOMPLETE flag signal that buffer should processed. sample after TMR0 overflows, routine copies value into communication buffer checks stopbit level data correct. After receiving bits byte there possibilities. received byte identifier byte. this point routine analyzes byte either receive buffer, transmit buffer neither designated function "DecodeIDTable". received byte data byte response frame. data stored receive buffer value added with previous carry build modulo checksum. last byte message checksum, which compared with calculated checksum check message integrity.
2000 Microchip Technology Inc. GetData delay cycles reset timeout counter clrf TIMEOUTLO clrf TIMEOUTHI CheckBitPosition movlw xorwf BITNBR,W btfsc STATUS,Z goto GetStopbit btfss btfsc PORTB,RSLINEPIN STATUS,C PORTB,RSLINEPIN STATUS,C COMBUFFER,F many bits left stopbit received copy receive value copy portvalue data buffer using Carryflag shift carry into buffer GetDataSetTMR incf comf BITNBR,F BITLENGTH,W count received center TMR0 next
Preliminary
0081 0081 0082 0083 0083 0084 0085 0086
01A2 01A3
3009 0629 1903 2891
0087 0088 0089 008A 008B
1C06 1003 1806 1403 0CB1
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008C 008C 008D
0AA9 092A
00438 00439 00440 00441 00442 00443 00444 00445 00446 00447 00448 00449 00450 00451 00452 00453 00454 00455 00456 00457 00458 00459 00460 00461 00462 00463 00464 00465 00466 00467 00468 00469 00470 00471 00472 00473 00474 00475 00476 00477 00478 00479 00480 00481 00482 00483 00484
008E 008F 0090
3E1F 0081 28BD
addlw movwf goto
(.31) TMR0 GetDataEnd
with correct value
AN729
DS00729A-page GetStopbit btfss PORTB,RSLINEPIN ERRORFLAGS,FBITERROR COMFLAGS,FID GetAction DATABLOCKLENGTH,W STATUS,Z GetCheckCRC DATABLOCKLENGTH,F last byte Checksum else wait next byte check there errors error detected don't store value slave monitors line ignore next steps pointer point location catch actual data ship into block ERRORFLAGS,W STATUS,Z SetNextLoc COMFLAGS,FLISTENONLY SetNextLoc BUFFERPTR,W COMBUFFER,W INDF identifier byte received check this byte initialize commanded slave mode else bytes came check polarity stopbit level error flag btfsc goto decf btfsc goto decf movf btfss goto btfsc goto movf movwf movf movwf addwf btfsc incf DATACRC,F STATUS,C DATACRC,F caluclate checksum over received data bytes with MOD256 DATACRC DATACRC COMBUFFER Carry data into carry produces overflow SetNextLoc incf goto BUFFERPTR,F InitGetData point next location GetCheckCRC btfsc goto COMFLAGS,FLISTENONLY GetDataFinish ignore checksum calculation slave reads only messages generate inverted over data block plus 0xFF calculate 0xFF SUM[RSDATAFIELD] received
0091 0091 0092
1C06 15AE
0093 0094
18AF 28AF
0095 0096 0097 0098
032B 1903 28A7 03AB
0099 009A 009B
082E 1D03 28A5
009C 009D
1AAF 28A5
Preliminary
009E 009F 00A0 00A1
0830 0084 0831 0080
00A2 00A3 00A4
07B2 1803 0AB2
00A5 00A5 00A6
0AB0 28B0
2000 Microchip Technology Inc.
00A7 00A7 00A8
1AAF 28B7
00485 00486 00487 00488 00489 00490 00491 00492 00493 00494 00495 00496 00497 00498 00499 00500 00501 00502 00503 00504 00505 00506 00507 00508 00509 00510 00511 00512 00513 00514 00515 00516 00517 00518 00519 00520 00521 00522 00523 00524 00525 00526 00527 00528 00529 00530 00531
00A9 00AA xorwf btfss goto COMBUFFER,W STATUS,Z ERRORFLAGS,FCRCERROR GetDataFinish check received with calculated flag identical
30FF 0632
movlw xorwf
0xFF DATACRC,W
complement
00AB 00AC 00AD 00AE
0631 1D03 152E 28B7
2000 Microchip Technology Inc. GetAction call CheckIdentifierByte decode check byte InitGetData clrf btfss goto BITNBR COMFLAGS,FTXDATA GetDataFinish+3 INTCON,INTE BITLENGTH,W TMR0 GetDataEnd disable external interrupt delay before sending data clear register next action next action transmission initialize only interrupts comf movwf goto GetDataFinish movlw andwf movlw movwf clrf 0xC0 COMFLAGS,F COMFLAGS,FCOMPLETE 0x10 INTCON TMR0 clear flags used bits indicates receive mode complete T0IE, INTE, clear flags wait next falling synch break GetDataEnd goto INTCON,T0IF IntrEnd PutData This routine shifts wanted databits including start stopbit setting stopbit routine will calulate mod256 checksum after outgoing databit checksum byte will sent out. PutData clrf clrf movf TIMEOUTLO TIMEOUTHI BITNBR,W STATUS,C first call startbit
00AF 00AF
212C
00B0 00B0 00B1 00B2
01A9 1DAF 28BA
00B3 00B4 00B5 00B6
120B 092A 0081 28BD
Preliminary
00B7 00B7 00B8 00B9 00BA 00BB 00BC
30C0 05AF 172F 3010 008B 0181
00BD
00BD
28F8
00BE 00BE 00BF
01A2 01A3
AN729
DS00729A-page
00C0 00C1
0829 1003
00532 00533 00534 00535 00536 00537 00538 00539 00540 00541 00542 00543 00544 00545 00546 00547 00548 00549 00550 00551 00552 00553 00554 00555 00556 00557 00558 00559 00560 00561 00562 00563 00564 00565 00566 00567 00568 00569 00570 00571 00572 00573 00574 00575 00576 00577 00578
00C2 00C3 movf xorlw btfsc goto BITNBR,W STATUS,Z SetStopbit bits stopbit
1903 28D7
btfsc goto
STATUS,Z SetStartbit
AN729
DS00729A-page ShiftDatabitOut movf andlw btfsc iorlw movwf COMBUFFER,F PORTB,W ((1<<TXLINEPIN)^0xFF) STATUS,C (1<<TXLINEPIN) PORTB else copy bits into Portvalue clear used then txline value nessasary CheckBitPending xorwf andlw btfss DUMMY,F PORTB,W (1<<RSLINEPIN) STATUS,Z ERRORFLAGS,FBITERROR shift carry into variable test polarity incomming maskout indicated same polarity it's okay PutDataSetTMR0 comf addlw movwf goto BITLENGTH,W (.39) TMR0 PutDataEnd preload timer with bitlength correct timer SetStartbit movf movwf movf movwf PORTB,TXLINEPIN BUFFERPTR,W INDF,W COMBUFFER point fetch actual data with DATACRC COMBUFFER DATACRC Carry generate CalculateTxCRC addwf btfsc incf comf addlw movwf goto DATACRC,F STATUS,C DATACRC,F BITLENGTH,W (.46) TMR0 PutDataEnd create checksum Carry onto data_CRC overflow occurs preload timer with bitlength correct timer
00C4 00C5 00C6 00C7
0829 3A09 1903 28E3
00C8 00C8 00C9 00CA 00CB 00CC 00CD
0CB1 0806 39EF 1803 3810 0086
00CE 00CE 00CF 00D0 00D1 00D2
0DC3 0606 3901 1D03 15AE
Preliminary
00D3 00D3 00D4 00D5 00D6
092A 3E27 0081 28F7
00D7 00D7 00D8 00D9 00DA 00DB
1206 0830 0084 0800 00B1
2000 Microchip Technology Inc.
00DC 00DC 00DD 00DE 00DF 00E0 00E1 00E2
07B2 1803 0AB2 092A 3E2E 0081 28F7
00579 00580 00581 00582 00583 00584 00585 00586 00587 00588 00589 00590 00591 00592 00593 00594 00595 00596 00597 00598 00599 00600 00601 00602 00603 00604 00605 00606 00607 00608 00609 00610 00611 00612 00613 00614 00615 00616 00617 00618 00619 00620 00621 00622 00623 00624 00625
data bytes include byte there only byte okay wait next
2000 Microchip Technology Inc. SetStopbit movlw movwf clrf incf decf movf btfsc goto xorlw btfss goto BITNBR PORTB,TXLINEPIN TMR0 BUFFERPTR,F DATABLOCKLENGTH,F DATABLOCKLENGTH,W STATUS,Z PutDataFinish STATUS,Z PutDataEnd prepare clearing line stopbit wait 1*Tbit array next cell data bytes xmit generate inverted MOD256 Checksum COMBUFFER DATACRC 0xFF, SUM(TxData_field)+DATACRC 0xFF SetPtr2CRC movlw xorwf 0xFF DATACRC,F DATACRC BUFFERPTR PutDataEnd movlw movwf goto generate correct checksum adress checksum save value PutDataFinish clrf COMFLAGS COMFLAGS,FCOMPLETE INTCON,INTE reset communication flags indicate complete flag start with synchbreak detection bitcounter zero PutDataEnd incf BITNBR,F IntrEnd Restore saved registers clear interrupt flags, return from interrupt. IntrEnd movlw andwf movf 0xF0 INTCON,F INTCON,T0IE COPYSTATUS,W clear pending flags timer0 overflow restore status
00E3 00E3 00E4 00E5 00E6 00E7 00E8 00E9 00EA 00EB 00EC 00ED 00EE
30FF 00A9 1606 0181 0AB0 03AB 082B 1903 28F4 3A01 1D03 28F7
00EF 00EF 00F0
Preliminary
30FF 06B2
00F1 00F2 00F3
3032 00B0 28F7
00F4 00F4 00F5 00F6
01AF 172F 160B
00F7 00F7
0AA9
00F8 00F8 00F9 00FA
30F0 058B 168B
AN729
DS00729A-page
00FB
0821
00626 00627 00628 00629 00630 00631 00632 00633 00634 00635 00636 00637 00638 00639 00640 00641 00642 00643 00644 00645 00646 00647 00648 00649 00650 00651 00652 00653 00654 00655 00656 00657 00658 00659 00660 00661 00662 00663 00664 00665 00666 00667 00668 00669 00670 00671 00672
00FC 00FD 00FE 00FF
0083 0EA0 0E20 0009
AN729
DS00729A-page
Preliminary
00673 movwf STATUS 00674 swapf COPYWREG,F fetch from further 00675 swapf COPYWREG,W bank 00676 retfie 00677 00678 00679 #### subroutines 00680 00681 00682 #### init_LinSlave 00683 00684 clears locations which used from linslave initializes 00685 portpins interruptflags 00686 00687 0100 00688 InitLinSlave 0100 3020 00689 movlw LINSLAVERAM 0101 0084 00690 movwf 0102 3024 00691 movlw LINSLAVEBLOCKLENGTH 0103 00692 ClearLINusedRAM 0103 0180 00693 clrf INDF clear register 0104 0A84 00694 incf FSR,F point next cell 0105 0804 00695 movf FSR,W 0106 3C44 00696 sublw 0107 1D03 00697 btfss STATUS,Z done well? 0108 2903 00698 goto ClearLINusedRAM next loop 00699 0109 1606 00700 PORTB,TXLINEPIN Portpin high programstart 010A 1683 00701 STATUS,RP0 010B 1406 00702 PORTB,RSLINEPIN receive line input 010C 1206 00703 PORTB,TXLINEPIN transmit line output 010D 3008 00704 movlw 0x08 TMR0 counter driven Message[302]: Register operand bank Ensure that bank bits correct. 010E 0081 00705 movwf OPTION_REG with internal clock Message[302]: Register operand bank Ensure that bank bits correct. 010F 1301 00706 OPTION_REG,INTEDG 0110 1283 00707 STATUS,RP0 0111 108B 00708 INTCON,INTF 0112 160B 00709 INTCON,INTE 0113 178B 00710 INTCON,GIE 0114 0008 00711 return 00712 00713 #### InitWakeupLIN 00714 00715 This wakes pulling times followed 00716 high stop bit. This would used after been sleep, 00717 node needs wake bus. reawakened,
2000 Microchip Technology Inc.
master starts polling slaves find why.
there further communication this function realize byte data block using data container initialize data pointer onto start transmission
2000 Microchip Technology Inc. InitWakeupLIN movf btfsc goto movlw movwf movlw movwf movlw movwf clrf BITLENGTH,W STATUS,Z InitWakeupEnd DATABLOCKLENGTH 0x80 DATACRC DATACRC BUFFERPTR BITNBR COMFLAGS,FTXDATA TMR0 0xA0 INTCON COMFLAGS,FTXDATA COMFLAGS,FSLEEPMODE delay before sending wakeup sequence TMR0 clrf wait wakeup sequence movlw movwf btfsc goto InitWakeupEnd return #### CheckIdentifierByte this function called interrupt after synch break synch byte detected bitlength calculated. identifier byte read from this point byte will checked odd/even parity correct, then extract blocklength number dependence handler mode will set. DataBlockLengthTable decoder table receive addwf PCL,F byte length 3,3,5,9 there byte more checksum byte data array clear flags identifier field test there SLEEP command break function
0115 0115 0116 0117 0118 0119 011A 011B 011C 011D 011E 011F
082A 1903 2926 3001 00AB 3080 00B2 3032 00B0 01A9 15AF
0120
0181
0121 0122 0123 0124 0125 0126 0126
30A0 008B 19AF 2923 13AF
Preliminary
0008
0127 0127 0128
0782 3403 3409
00718 00719 00720 00721 00722 00723 00724 00725 00726 00727 00728 00729 00730 00731 00732 00733 00734 00735 00736 00737 00738 00739 00740 00741 00742 00743 00744 00745 00746 00747 00748 00749 00750 00751 00752 00753 00754 3403 3405 00755
AN729
DS00729A-page
012C 012C 012D 012E 012F 0130
01AF 0831 3A80 1903 29A0
00756 00757 00758 CheckIdentifierByte 00759 clrf COMFLAGS 00760 movf COMBUFFER,W 00761 xorlw 0x80 00762 btfsc STATUS,Z 00763 goto ActionBusSleep
AN729
DS00729A-page count ones even parity CheckEvenParityBit6 clrf BITNBR btfsc COMBUFFER,0 incf BITNBR,F btfsc COMBUFFER,1 incf BITNBR,F btfsc COMBUFFER,2 incf BITNBR,F btfsc COMBUFFER,4 incf BITNBR,F check bit6 contains even value even then check parity count ones parity invert btfsc COMBUFFER,6 incf BITNBR,F btfsc BITNBR,0 goto SetParityError CheckOddParityBit7 clrf BITNBR btfsc COMBUFFER,1 incf BITNBR,F btfsc COMBUFFER,3 incf BITNBR,F btfsc COMBUFFER,4 incf BITNBR,F btfsc COMBUFFER,5 incf BITNBR,F COMBUFFER,7 BITNBR,F BITNBR,0 ERRORFLAGS,FIDPARITYERROR then split blocklength parity error there error number plus blocklength subsets save value btfss incf btfsc SetParityError GetPreID movf andlw movwf COMBUFFER,W 0x3F PREIDNUMBER DecodeBlockLength movlw high DataBlockLengthTable movwf PCLATH swapf andlw call movwf COMBUFFER,W DataBlockLengthTable DATABLOCKLENGTH address decoder table switches bit3,4 into bit0,1 kill rest decode result store used blocklength including checksum byte
0131 0131 0132 0133 0134 0135 0136 0137 0138 0139
01A9 1831 0AA9 18B1 0AA9 1931 0AA9 1A31 0AA9
013A 013B 013C 013D 013E 013E 013F 0140 0141 0142 0143 0144 0145 0146
1B31 0AA9 1829 294A
01A9 18B1 0AA9 19B1 0AA9 1A31 0AA9 1AB1 0AA9
Preliminary
0147 0148 0149 014A 014A
1FB1 0AA9 1829
14AE
014B 014B 014C 014D
0831 393F 00AC
014E 014E 014F
3001 008A
2000 Microchip Technology Inc.
0150 0151 0152 0153
0E31 3903 2127 00AB
00764 00765 00766 00767 00768 00769 00770 00771 00772 00773 00774 00775 00776 00777 00778 00779 00780 00781 00782 00783 00784 00785 00786 00787 00788 00789 00790 00791 00792 00793 00794 00795 00796 00797 00798 00799 00800 00801 00802 00803 00804 00805 00806 00807 00808 00809 00810
0154 0155
01B2 01AE
clrf clrf
DATACRC ERRORFLAGS
initialize checksum error flag register
0156 0156 COMFLAGS,FCOMDATA HIGH DecodeIDTable PCLATH COMBUFFER,W IDNUMBER COMBUFFER COMBUFFER,F COMBUFFER,W PCL,F save number generate jump width multiplying with four jump manipulating buffer value initial high program counter with table adress communication flag movlw movwf movf andlw movwf movwf addwf
162F
DecodeIdNumber
2000 Microchip Technology Inc. DecodeIDTable Decode table using numbers This point where user decide slave will react decoded identifier number. Also decide where received data will stored where send data come from. Three modes possible: MacroRsMode (ptr) read data from save provided buffer (ptr) MacroTxMode (ptr) send data from provided buffer. MacroLstMode only monitor monitoring mode user possibility value PREIDNUMBER handle commands without data messages. DecodeIDTable MacroLstMode COMFLAGS,FLISTENONLY indicates receive mode without saving received data this necessary have correct jump table length retlw MacroTxMode BUTTONPRESSED1 ID1: Transmit button press counts COMFLAGS,FTXDATA indicates transmission mode movlw BUTTONPRESSED1 wanted location where data will read from movwf BUFFERPTR initialize pointer
0157 0158
3001 008A
0159 015A 015B 015C 015D 015E 015F
0831 390F 00AD 00B1 0DB1 0D31 0782
Preliminary
0160
0160
16AF
0161 0162 0163
0000 0000 3400
AN729
DS00729A-page
0164 0165
15AF 3033
0166
00B0
00811 00812 00813 00814 00815 00816 00817 00818 00819 00820 00821 00822 00823 00824 00825 00826 00827 00828 00829 00830 00831 00832 00833 00834 00835 00836 00837 00838 00839 00840 00841 00842 00843 00844 00845 00846 00847 00848
0167 indicates receive mode without saving received data this necessary have correct jump table length
3400
0168
16AF
retlw MacroLstMode COMFLAGS,FLISTENONLY
AN729
DS00729A-page retlw MacroLstMode COMFLAGS,FLISTENONLY indicates receive mode without saving received data this necessary have correct jump table length retlw MacroRsMode COMPLED1 COMFLAGS,FRSDATA movlw COMPLED1 ID4: Receive counters indicates receive mode wanted location where data will stored initialize pointer movwf BUFFERPTR retlw MacroLstMode COMFLAGS,FLISTENONLY indicates receive mode without saving received data this necessary have correct jump table length retlw MacroLstMode COMFLAGS,FLISTENONLY indicates receive mode without saving received data this necessary have correct jump table length retlw MacroLstMode COMFLAGS,FLISTENONLY indicates receive mode without saving received data this necessary have correct jump table length retlw MacroLstMode COMFLAGS,FLISTENONLY indicates receive mode without saving received data this necessary have correct jump table length retlw MacroLstMode COMFLAGS,FLISTENONLY indicates receive mode without saving received data this necessary have
0169 016A 016B
0000 0000 3400
016C
16AF
016D 016E 016F
0000 0000 3400
0170 0171
152F 303B
0172 0173
00B0 3400
0174
16AF
0175 0176 0177
0000 0000 3400
Preliminary
0178
16AF
0179 017A 017B
0000 0000 3400
017C
16AF
017D 017E 017F
0000 0000 3400
0180
16AF
0181 0182 0183
0000 0000 3400
0184
16AF
2000 Microchip Technology Inc.
0185
0000
00849 00850 00851 00852 00853 00854 00855 00856
0186 0187 indicates receive mode without saving received data this necessary have correct jump table length
0000 3400
correct jump table length
0188
16AF
retlw MacroLstMode COMFLAGS,FLISTENONLY
0189 018A 018B indicates receive mode without saving received data this necessary have correct jump table length
0000 0000 3400
2000 Microchip Technology Inc. retlw MacroLstMode COMFLAGS,FLISTENONLY retlw MacroLstMode COMFLAGS,FLISTENONLY indicates receive mode without saving received data this necessary have correct jump table length retlw MacroLstMode COMFLAGS,FLISTENONLY indicates receive mode without saving received data this necessary have correct jump table length retlw MacroLstMode COMFLAGS,FLISTENONLY indicates receive mode without saving received data this necessary have correct jump table length retlw MacroLstMode COMFLAGS,FLISTENONLY retlw indicates receive mode without saving received data this necessary have correct jump table length ActionBusSleep Arriving this sequence master will longer talk slaves gives command hangup line. After finishing read main task able activate wakeup sequence give master directive reactivate communication.
018C
16AF
018D 018E 018F
0000 0000 3400
0190
16AF
0191 0192 0193
0000 0000 3400
0194
16AF
Preliminary
0195 0196 0197
0000 0000 3400
0198
16AF
0199 019A 019B
0000 0000 3400
019C
16AF
019D 019E 019F
0000 0000 3400
AN729
DS00729A-page
00857 00858 00859 00860 00861 00862 00863 00864 00865 00866 00867 00868 00869 00870 00871
AN729
DS00729A-page decomp length control bits ActionBusSleep COMFLAGS,FSLEEPMODE movlw movwf DATABLOCKLENGTH movlw 0x80 movwf IDNUMBER MacroRsMode RSDATAFIELD COMFLAGS,FRSDATA movlw RSDATAFIELD movwf retlw #### MAIN Main BUFFERPTR identifier sleep save received bytes indicates receive mode wanted location where data will stored initialize pointer movlw movwf movwf clrf EDGEDETECT COMPERATOR DEBOUNCECOUNTER after counts LED1&2 movlw movwf call MainLoop btfss goto movlw xorwf COMFLAGS,FCOMPLETE (1<<LED3) PORTB,F COMFLAGS,FCOMPLETE CheckLevel message frame complete rest main task clear flag toggle InitLinSlave STATUS,RP0 0x1F PORTB STATUS,RP0 PORTB7.5 output manage LEDs initialize linbus functions CheckLevel movf subwf btfss goto COMPERATOR,W COMPLED1,W STATUS,C CheckNextLevel COMPLED1 (1<<LED1) clrf movlw compare delimiter with first value equal check next value else manipulate value toggle LED1
01A0 01A0 01A1 01A2 01A3 01A4
17AF 3003 00AB 3080 00AD
01A5 01A6
152F 303B
01A7 01A8
00B0 3400
01A9
01A9 01AA 01AB
300A 00C5 00C8
Preliminary
01AC
01CA
01AD 01AE 01AF 01B0
1683 301F 0086 1283
01B1
2100
01B2 01B2 01B3
1F2F 29B7
01B4 01B5 01B6
132F 3080 0686
01B7 01B7 01B8 01B9 01BA
0845 023B 1C03 29BE
2000 Microchip Technology Inc.
01BB 01BC
01BB 3020
00872 00873 00874 00875 00876 00877 00878 00879 00880 00881 00882 00883 00884 00885 00886 00887 00888 00889 00890 00891 00892 00893 00894 00895 00896 00897 00898 00899 00900 00901 00902 00903 00904 00905 00906 00907 00908 00909 00910 00911 00912 00913
01BD
0686
xorwf
PORTB,F
01BE 01BE 01BF 01C0 01C1 COMPERATOR,W COMPLED2,W STATUS,C TestButtons COMPLED2 (1<<LED2) PORTB,F equal toggle LED2 compare second value clrf movlw xorwf
0845 023C 1C03 29C5
CheckNextLevel movf subwf btfss goto
2000 Microchip Technology Inc. TestButtons decfsz goto DEBOUNCECOUNTER,F MainLoop loop movlw andwf movwf (1<<BUTTON1) (1<<BUTTON2) PORTB,W COPYPORTB maskout used portpins save result CheckEdgeChange xorwf andwf btfsc goto EDGEDETECT,W COPYPORTB,W STATUS,Z ButtomTestEnd DEBOUNCECOUNTER movwf check actual last value detect rising edge input nothing loop save changed RisingEdgeButtom1 movlw (1<<BUTTON1) andwf DEBOUNCECOUNTER,W btfss STATUS,Z incf BUTTONPRESSED1,F mask button1 buttom1 pressed count rising edge RisingEdgeButtom2 movlw (1<<BUTTON2) andwf DEBOUNCECOUNTER,W btfss STATUS,Z incf BUTTONPRESSED2,F mask button2 button pressed count rising edge ButtomTestEnd movf movwf movlw movwf COPYPORTB,W EDGEDETECT DEBOUNCECOUNTER save actual values detect next rising edge reload debounce
01C2 01C3 01C4
01BC 3040 0686
01C5 01C5 01C6
0BC8 29B2
01C7 01C8 01C9
3006 0506 00C9
Preliminary
01CA 01CA 01CB 01CC 01CD
064A 0549 1903 29D7
01CE
00C8
01CF 01CF 01D0 01D1 01D2
3002 0548 1D03 0AB3
01D3 01D3 01D4 01D5 01D6
3004 0548 1D03 0AB4
AN729
DS00729A-page
01D7 01D7 01D8
0849 00CA
01D9 01DA
300A 00C8
00914 00915 00916 00917 00918 00919 00920 00921 00922 00923 00924 00925 00926 00927 00928 00929 00930 00931 00932 00933 00934 00935 00936 00937 00938 00939 00940 00941 00942 00943 00944 00945 00946 00947 00948 00949 00950 00951 00952 00953 00954 00955 00956 00957 00958 00959 00960
01DB Unused)
00961 00962 00963 MEMORY USAGE ('X' Used,
29B2
goto
MainLoop
loop again
AN729
DS00729A-page LINSLAVE.ASM 1-27-2000 9:57:59 PAGE Unused) XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX -XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX -473 1575
0000 X-XXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX 0040 XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX 0080 XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX
MPASM 02.30.09 Intermediate
MEMORY USAGE ('X' Used,
00C0 0100 0140 0180 01C0 2000
XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXX-
other memory blocks unused.
Preliminary
Program Memory Words Used: Program Memory Words Free:
2000 Microchip Technology Inc.
AN729
NOTES:
2000 Microchip Technology Inc.
Preliminary
DS00729A-page
Note following details code protection feature PICmicro® MCUs. PICmicro family meets specifications contained Microchip Data Sheet. Microchip believes that family PICmicro microcontrollers most secure products kind market today, when used intended manner under normal conditions. There dishonest possibly illegal methods used breach code protection feature. these methods, knowledge, require using PICmicro microcontroller manner outside operating specifications contained data sheet. person doing engaged theft intellectual property. Microchip willing work with customer concerned about integrity their code. Neither Microchip other semiconductor manufacturer guarantee security their code. Code protection does mean that guaranteeing product "unbreakable". Code protection constantly evolving. Microchip committed continuously improving code protection features product.
have further questions about this matter, please contact local sales office nearest you.
Information contained this publication regarding device applications like intended through suggestion only superseded updates. your responsibility ensure that your application meets with your specifications. representation warranty given liability assumed Microchip Technology Incorporated with respect accuracy such information, infringement patents other intellectual property rights arising from such otherwise. Microchip's products critical components life support systems authorized except with express written approval Microchip. licenses conveyed, implicitly otherwise, under intellectual property rights.
Trademarks Microchip name logo, Microchip logo, FilterLab, KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, MATE, SEEVAL Embedded Control Solutions Company registered trademarks Microchip Technology Incorporated U.S.A. other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode Total Endurance trademarks Microchip Technology Incorporated U.S.A. Serialized Quick Turn Programming (SQTP) service mark Microchip Technology Incorporated U.S.A. other trademarks mentioned herein property their respective companies. 2002, Microchip Technology Incorporated, Printed U.S.A., Rights Reserved.
Printed recycled paper.
Microchip received QS-9000 quality system certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona July 1999. Company's quality system processes procedures QS-9000 compliant PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs microperipheral products. addition, Microchip's quality system design manufacture development systems 9001 certified.
2002 Microchip Technology Inc.
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Microchip Technology SARL Parc d'Activite Moulin Massy Saule Trapu Batiment Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Angeles
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China Shenzhen
Microchip Technology Consulting (Shanghai) Co., Ltd., Shenzhen Liaison Office 1315, 13/F, Shenzhen Kerry Centre, Renminnan Shenzhen 518001, China Tel: 86-755-2350361 Fax: 86-755-2366086
York
Motor Parkway, Suite Hauppauge, 11788 Tel: 631-273-5305 Fax: 631-273-5335
Germany
Microchip Technology GmbH Gustav-Heinemann Ring D-81739 Munich, Germany Tel: 49-89-627-144 Fax: 49-89-627-144-44
Jose
Microchip Technology Inc. 2107 North First Street, Suite Jose, 95131 Tel: 408-436-7950 Fax: 408-436-7955
Hong Kong
Microchip Technology Hongkong Ltd. Unit 901-6, Tower Metroplaza Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431
Italy
Microchip Technology Centro Direzionale Colleoni Palazzo Taurus Colleoni 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883
Toronto
6285 Northam Drive, Suite Mississauga, Ontario 1X5, Canada Tel: 905-673-0699 Fax: 905-673-6509
India
Microchip Technology Inc. India Liaison Office Divyasree Chambers Floor, Wing (A3/A4) O'Shaugnessey Road Bangalore, 025, India Tel: 91-80-2290061 Fax: 91-80-2290062
United Kingdom
Arizona Microchip Technology Ltd. Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 Tel: 5869 Fax: 44-118 921-5820
01/18/02
2002 Microchip Technology Inc.

Protocol Implementation Using PICmicro® MCUs Authors: Butler Thom

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