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TM4xJ64KPU 32M-byte, 144-pin, small-outline dual-in-line memory module
Top Searches for this datasheetTM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM TM4xJ64KPU 32M-byte, 144-pin, small-outline dual-in-line memory module (SODIMM). SODIMM composed four TMS465169/P, 16-bit normal low-power battery-backup refresh dynamic random-access memory (DRAM) devices, each 400-mil, 50-pin plastic thin small-outline package (TSOP) (DGE suffix) package mounted substrate with decoupling capacitors. TMS465169/P data sheet (literature number SMHS566). TM4xJ64NPU 32M-byte, 144-pin SODIMM. SODIMM composed four TMS464169/P, 16-bit normal low-power battery-backup refresh DRAMs, each 400-mil, 50-pin plastic TSOP (DGE suffix) mounted substrate with decoupling capacitors. TMS464169/P data sheet (literature number SMHS566). TM8xJ64KPU 64M-byte, 144-pin SODIMM. SODIMM composed eight TMS465169/P, 16-bit normal low-power battery-backup refresh DRAMs, each 400-mil, 50-pin plastic TSOP (DGE suffix) mounted substrate with decoupling capacitors. TM8xJ64NPU 64M-byte, 144-pin SODIMM. SODIMM composed eight TMS464169/P, 16-bit normal low-power battery-backup refresh DRAMs, each 400-mil, 50-pin plastic TSOP (DGE suffix) mounted substrate with decoupling capacitors. operation TM4xJ64xPU operates four TMS46x169/Ps that connected shown TMxxJ64xPU functional block diagram. TM8xJ64xPU operates eight TMS46x169/Ps that connected shown TMxxJ64xPU functional block diagram. Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet. Copyright 1997, Texas Instruments Incorporated PRODUCT PREVIEW information concerns products formative design phase development. Characteristic data other specifications design goals. Texas Instruments reserves right change discontinue these products without notice. POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW Organization TM4xJ64xPU-xx 194304 Bits TM8xJ64xPU-xx 388608 Bits Single 3.3-V Power Supply (±10% Tolerance) JEDEC 144-Pin Small-Outline Dual-In-Line Memory Module (SODIMM) Without Buffer With Socket TM4xJ64xPU-xx Utilizes Four 64M-Bit High-Speed 16-Bit) Dynamic RAMs TM4xJ64xPU-xx Utilizes Eight 64M-Bit High-Speed 16-Bit) Dynamic RAMs High-Speed, Low-Noise LVTTL Interface High-Reliability 50-Lead 400-Mil-Wide Surface-Mount Thin Small-Outline Package (TSOP) (DGE Suffix) 3-State Output Gold-Plated Contacts Long Refresh Periods: TMxEJ64KPU: Cycles) TMxEJ64NPU: Cycles) TMxFJ64KPU: Cycles) TMxFJ64NPU: Cycles) Extended Data (EDO) Operation With CAS-Before-RAS (CBR), RAS-Only, Hidden Refresh Serial Presence-Detect (SPD) Using EEPROM Ambient Temperature Range 70°C Performance Ranges ACCESS TIME tRAC (MAX) ACCESS ACCESS TIME TIME CYCLE tCAC tHPC (MAX) (MAX) (MIN) 'xxJ64xPU-40 'xxJ64xPU-50 'xxJ64xPU-60 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM DUAL-IN-LINE MEMORY MODULE VIEW TM4xJ64xPU SIDE VIEW TM8xJ64xPU SIDE VIEW NOMENCLATURE TMxxJ64KPU A[0:11] A[0:9] DQ[0:63] CAS[0:7] RAS0 RAS1 Address Inputs Column Address Inputs Data Data Column-Address Strobe Row-Address Strobe Write Enable Output Enable Serial Address Data Serial Clock No-Connect 3.3-V Supply Ground NOMENCLATURE TMxxJ64NPU A[0:12] A[0:8] DQ[0:63] CAS[0:7] RAS0 RAS1 Address Inputs Column Address Inputs Data Data Column-Address Strobe Row-Address Strobe Write Enable Output Enable Serial Address Data Serial Clock No-Connect 3.3-V Supply Ground PRODUCT PREVIEW POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM NAME DQ36 DQ35 DQ34 DQ33 DQ32 NAME Assignments DQ45 DQ13 DQ44 DQ12 DQ43 DQ42 DQ10 DQ41 DQ40 DQ11 NAME DQ49 DQ17 DQ48 DQ16 NAME DQ56 DQ24 CAS7 CAS3 CAS6 CAS2 PRODUCT PREVIEW CAS5 CAS1 CAS4 CAS0 DQ39 DQ38 DQ37 POST OFFICE 1443 RAS1 RAS0 DQ47 DQ15 DQ46 DQ14 HOUSTON, TEXAS 77251-1443 DQ55 DQ23 DQ54 DQ22 DQ53 DQ21 DQ52 DQ20 DQ51 DQ19 DQ50 DQ18 DQ63 DQ31 DQ62 DQ30 DQ61 DQ29 DQ60 DQ28 DQ59 DQ27 DQ58 DQ26 DQ57 DQ25 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM small-outline dual-in-line memory module components small-outline dual-in-line memory module components include: substrate: 1,10 (0.04 inch) nominal thickness Bypass capacitors: Multilayer ceramic Contact area: Nickel plate gold plate over copper following table shows SODIMM modules devices (Ux/UBx) that used. Table Component Table MODULE TM4xJ64xPU TM8xJ64xPU DEVICES USED U[0:3] U[0:3], UB[0:3] functional block diagram TMxxJ64xPU RAS0 LCAS DQ[0:7] CAS1 DQ[8:15] UCAS DQ[8:15] RAS1 PRODUCT PREVIEW CAS0 DQ[0:7] LCAS DQ[0:7] UCAS DQ[8:15] CAS2 DQ[16:23] LCAS DQ[0:7] LCAS DQ[0:7] UCAS DQ[8:15] CAS3 DQ[24:31] UCAS DQ[8:15] CAS4 DQ[32:39] LCAS DQ[0:7] LCAS DQ[0:7] UCAS DQ[8:15] A[0:12] A[0:12] U[0:3], UB[0:3] EEPROM CAS5 DQ[40:47] UCAS DQ[8:15] CAS6 DQ[48:55] LCAS DQ[0:7] LCAS DQ[0:7] UCAS DQ[8:15] CAS7 DQ[56:63] UCAS DQ[8:15] LEGEND: Serial Presence Detect Chip Select used TM4xJ64KPU, TM8xP64KPU POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM absolute maximum ratings over ambient temperature range (unless otherwise noted) Supply voltage range, -0.5 Voltage range (see Note Short-circuit output current Power dissipation: TM4xJ64xPU TM8xJ64xPU Ambient temperature range, 70°C Storage temperature range, Tstg 55°C 125°C Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTE voltage values with respect VSS. Low-level input voltage Ambient temperature POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW UNIT Supply voltage Supply voltage VIH-SPD High-level input voltage High-level input voltage device recommended operating conditions TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM electrical characteristics over recommended ranges supply voltage ambient temperature (unless otherwise noted) TM4xJ64KPU PARAMETER High-level output voltage Low-level output voltage Input current (leakage) Output current (leakage) Average read- write-cycle current TEST CONDITIONS LVTTL LVCMOS LVTTL LVCMOS '4xJ64KPU '4xJ64KPU '4xJ64KPU UNIT others CASx high VDD, PRODUCT PREVIEW Minimum cycle ICC2 Average standby current LVTTL), After memory cycle, RASx CASx high (LVCMOS), After memory cycle, RASx CASx high '4EJ64KPU '4FJ64KPU RASx-only refresh, average refresh curren Average current Average refresh current Average self-refresh current Average battery back-up operating current, only RASx cycling, Minimum cycle, CASx high ICC5 RASx low, tHPC MIN, CASx cycling Minimum cycle, RASx after CASx CASx RASx Measured after tRASS 31.25 tRAS VIH, Address data stable ICC6# ICC10# conditions shown MAX, appropriate value specified timing requirements. Measured with outputs open Measured with maximum address change while RASx Measured with maximum address change during each cycle, tHPC TM4FJ64KPU only POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM electrical characteristics over recommended ranges supply voltage ambient temperature (unless otherwise noted) (continued) TM4xJ64NPU PARAMETER High-level output voltage Low-level output voltage Input current (leakage) Output current (leakage) Average read- write-cycle current TEST CONDITIONS LVTTL LVCMOS LVTTL LVCMOS '4xJ64NPU '4xJ64NPU '4xJ64NPU UNIT others CASx high VDD, ICC2 Average standby current (LVTTL), After memory cycle, RASx CASx high (LVCMOS), After memory cycle, CASx high '4EJ64NPU '4FJ64NPU RASx-only refresh, average refresh curren Average current Average refresh current Average self-refresh current Average battery back-up operating current, only RASx cycling, Minimum cycle, CASx high ICC5 RASx low, tHPC MIN, CASx cycling Minimum cycle, RASx after CASx CASx RASx Measured after tRASS 31.25 tRAS VIH, Address data stable ICC6# ICC10# conditions shown MAX, appropriate value specified timing requirements. Measured with outputs open Measured with maximum address change while RASx Measured with maximum address change during each cycle, tHPC TM4FJ64NPU only POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW Minimum cycle TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM electrical characteristics over recommended ranges supply voltage ambient temperature (unless otherwise noted) (continued) TM8xJ64KPU PARAMETER High-level output voltage Low-level output voltage Input current (leakage) Output current (leakage) Average read- write-cycle current TEST CONDITIONS LVTTL LVCMOS LVTTL LVCMOS '8xJ64KPU VDD- '8xJ64KPU '8xJ64KPU UNIT others CASx high VDD, PRODUCT PREVIEW Minimum cycle ICC2 Average standby current (LVTTL), After memory cycle, RASx CASx high (LVCMOS), After memory cycle, RASx CASx high '8EJ64KPU '8FJ64KPU RASx-only refresh, average refresh curren Average current Average refresh current Average self-refresh current Average battery back-up operating current, only RASx cycling, Minimum cycle, CASx high ICC5 RASx low, tHPC MIN, CASx cycling Minimum cycle, RASx after CASx CASx RASx Measured after tRASS 31.25 tRAS VIH, Address data stable ICC6# ICC10# conditions shown MAX, appropriate value specified timing requirements. Measured with outputs open Measured with maximum address change while RASx Measured with maximum address change during each cycle, tHPC TM8FJ64KPU only POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM electrical characteristics over recommended ranges supply voltage ambient temperature (unless otherwise noted) (continued) TM8xJ64NPU PARAMETER High-level output voltage Low-level output voltage Input current (leakage) Output current (leakage) Average read- write-cycle current TEST CONDITIONS LVTTL LVCMOS LVTTL LVCMOS '8xJ64NPU '8xJ64NPU '8xJ64NPU UNIT others CASx high VDD, ICC2 Average standby current (LVTTL), After memory cycle, RASx CASx high (LVCMOS), After memory cycle, RASx CASx high '8EJ64NPU '8FJ64NPU RASx-only refresh, average refresh curren Average current Average refresh current Average self-refresh current Average battery back-up operating current, only RASx cycling, Minimum cycle, CASx high ICC5 RASx low, tHPC MIN, CASx cycling Minimum cycle, RASx after CASx CASx RASx Measured after tRASS 31.25 tRAS VIH, Address data stable ICC6# ICC10# conditions shown MAX, appropriate value specified timing requirements. Measured with outputs open Measured with maximum address change while Measured with maximum address change during each cycle, tHPC TM8FJ64NPU only POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW Minimum cycle TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM capacitance over recommended ranges supply voltage ambient temperature, (see Note PARAMETER Ci(A) Ci(OE) Ci(CAS) Ci(RAS) Ci(W) Ci/o(SDA) Ci(SPD) Input capacitance, Input capacitance, Input capacitance, CASx Input capacitance, RASx Input capacitance, Output capacitance Input/output capacitance, input Input capacitance,SPD inputs (except SDA) '4xJ64xPU '8xJ64xPU UNIT NOTE supply voltage 10%, bias pins under test switching characteristics over recommended ranges supply voltage ambient temperature (see Note PRODUCT PREVIEW PARAMETER tCAC tCPA tRAC tOEA tCLZ tOEZ tREZ tCEZ tWEZ Access time from column address (see Note Access time from CASx (see Note Access time from CASx precharge (see Note Access time from RASx (see Note Access time from (see Note Delay time, CASx output low-impedance state Output buffer turnoff delay from (see Note Output buffer turnoff delay from RASx (see Note Output buffer turnoff delay from CASx (see Note Output buffer turnoff delay from (see Note 'xxJ64xPU-40 'xxJ64xPU 'xxJ64xPU UNIT NOTES: With parameters, assumed that Access times measured with output reference levels specifications tREZ tCEZ tWEZ tOEZ specified when output longer driven. Data-in should driven until applicable maximum specifications satsified. timing requirements (see Note 'xxJ64xPU tHPC tPRWC tCSH tCHO tDOH tCAS tWPE tOCH tOEP Cycle time, page-mode read write Cycle time, read-write Delay time, RASx active CASx precharge Hold time, from CASx Hold time, output from CASx active Pulse duration, CASx active (see Note Pulse duration, (output disable only) Pulse duration, CASx precharge Setup time, before CASx Precharge time, (output disable only) 'xxJ64xPU 'xxJ64xPU UNIT NOTES: With parameters, assumed that read-write cycle, tCWD tCWL must observed. POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM timing requirements (see Note 'xxJ64xPU tRWC tRASP tRAS tASC tASR tRCS tCWL tRWL tWCS tWRP tCSR tCAH tRAH tRCH tRRH tWCH tRHCP tOEH tROH tWRH tCHS tAWD tCHR tCRP tCWD Cycle time, read Cycle time, read-write Pulse duration, RASx active, page mode (see Note Pulse duration, RASx active, nonpage mode (see Note Pulse duration, RASx precharge Pulse duration, write command Setup time, column address Setup time, address Setup time, data (see Note Setup time, read command Setup time, write command before CASx precharge Setup time, write command before RASx precharge Setup time, write command before CASx active (early-write only) Setup time, write before RASx active (CBR refresh only) Setup time, CASx referenced RASx (CBR refresh only) Hold time, column address Hold time, data (see Note Hold time, address Hold time, read command referenced CASx (see Note Hold time, read command referenced RASx (see Note Hold time, write command during CASx active (early-write only) Hold time, RASx active from CASx precharge Hold time, command Hold time, RASx referenced Hold time, write after RASx active (CBR refresh only) Hold time, CASx active after RASx precharge (self-refresh) Delay time, column address write command (read-write only) Delay time, CASx referenced RASx (CBR refresh only) Delay time, CASx precharge RASx Delay time, CASx write command (read-write operation only) With parameters, assumed that read-write cycle, tRWD tRWL must observed. Referenced later CASx write operations Either tRRH tRCH must satisfied read cycle. 'xxJ64xPU 'xxJ64xPU UNIT NOTES: POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM timing requirements (see Note (continued) 'xxJ64xPU tOED tRAD tRAL tCAL tRCD tRPC tRSH tRWD tCPW tRASS tRPS tREF Delay time, data Delay time, RASx column address (see Note Delay time, column address RASx precharge Delay time, column address CASx precharge Delay time, RASx CASx (see Note Delay time, RASx precharge CASx Delay time, CASx active RASx precharge Delay time, RASx active write command (read-write only) Delay time, CASx precharge write command (read-write only) Pulse duration, RASx active, self-refresh (see Note Pulse duration, RASx precharge after self refresh Refresh time interval 'xEJ64xPU 'xFJ64xPU 'xxJ64xPU 'xxJ64xPU UNIT PRODUCT PREVIEW Transition time NOTES: With parameters, assumed that maximum value specified only assure access time. During period tRASS device transition state from normal operational mode self-refresh mode. POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM serial presence detect serial presence detect (SPD) contained 2K-bit serial EEPROM located module. nonvolatile EEPROM contains various data such module configuration, DRAM organization, timing parameters (see tables below). Only first bytes programmed Texas Instruments, while remaining bytes available customer use. Programming done through using clock (SCL) data (SDA) signals. Texas Instruments modules comply with current JEDEC Standard. Texas Instruments Serial Presence Detect Technical Reference (literature number SMMU001) further details. Tables this section list contents follows: Table 2-TM4EJ64KPU Table 4-TM8EJ64KPU Table 6-TM4FJ64KPU Table 8-TM8FJ64KPU Table TM4EJ64NPU Table 5-TM8EJ64NPU Table 7-TM4FJ64NPU Table 9-TM8FJ64NPU Table Serial-Presence-Detect Data TM4EJ64KPU BYTE FUNCTION DESCRIBED Defines number bytes written into serial memory during module manufacturing Total number bytes memory device Fundamental memory (FPM, EDO, SDRAM) type '4EJ64KPU-40 ITEM bytes DATA '4EJ64KPU-50 ITEM bytes DATA '4EJ64KPU-60 ITEM bytes DATA bytes bank bits bytes bank bits bytes bank bits Number addresses this assembly Number column addresses this assembly Number module banks this assembly Data width this assembly Data width continuation Voltage interface standard this assembly RASx access time module CASx access time module SODIMM configuration type (non-parity, parity, error correcting code [ECC]) Refresh rate type DRAM width, primary DRAM Error-checking SDRAM data width revision Checksum bytes LVTTL tRAC tCAC Non-parity 15.6 Rev. LVTTL tRAC tCAC Non-parity 15.6 Rev. LVTTL tRAC tCAC Non-parity 15.6 Rev. POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM serial presence detect (continued) Table Serial-Presence-Detect Data TM4EJ64KPU (Continued) BYTE 64-71 73-90 93-94 95-98 99-125 126-127 128-166 FUNCTION DESCRIBED Manufacturer's JEDEC code JEP-106E Manufacturing location Manufacturer's part number revision code revision code Manufacturing date Assembly serial number Manufacturer specific data Vendor specific data System integrator's specific data '4EJ64KPU-40 ITEM DATA 9700.00h '4EJ64KPU-50 ITEM DATA 9700.00h '4EJ64KPU-60 ITEM DATA 9700.00h PRODUCT PREVIEW 167-255 Open indicates values determined manufacturing time module dependent. These values determined programmed customer (optional). POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM serial presence detect (continued) Table Serial-Presence-Detect Data TM4EJ64NPU BYTE FUNCTION DESCRIBED Defines number bytes written into serial memory during module manufacturing Total number bytes memory device Fundamental memory (FPM, EDO, SDRAM) type '4EJ64NPU-40 ITEM bytes DATA '4EJ64NPU-50 ITEM bytes DATA '4EJ64NPU-60 ITEM bytes DATA 64-71 73-90 93-94 95-98 99-125 126-127 128-166 bytes bank bits bytes bank bits bytes bank bits Number addresses this assembly Number column addresses this assembly Number module banks this assembly Data width this assembly Data width continuation Voltage interface standard this assembly RASx access time module CASx access time module SODIMM configuration type (non-parity, parity, error correcting code [ECC]) Refresh rate type DRAM width, primary DRAM Error-checking SDRAM data width revision Checksum bytes Manufacturer's JEDEC code JEP-106E Manufacturing location Manufacturer's part number revision code revision code Manufacturing date Assembly serial number Manufacturer specific data Vendor specific data System integrator's specific data LVTTL tRAC tCAC Non-parity 15.6 Rev. 9700.00h LVTTL tRAC tCAC Non-parity 15.6 Rev. 9700.00h LVTTL tRAC tCAC Non-parity 15.6 Rev. 9700.00h 167-255 Open indicates values determined manufacturing time module dependent. These values determined programmed customer (optional). POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM serial presence detect (continued) Table Serial-Presence-Detect Data TM8EJ64KPU BYTE FUNCTION DESCRIBED Defines number bytes written into serial memory during module manufacturing Total number bytes memory device Fundamental memory (FPM, EDO, SDRAM) type '8EJ64KPU-40 ITEM bytes DATA '8EJ64KPU-50 ITEM bytes DATA '8EJ64KPU-60 ITEM bytes DATA bytes banks bits bytes banks bits bytes banks bits Number addresses this assembly Number column addresses this assembly Number module banks this assembly Data width this assembly Data width continuation Voltage interface standard this assembly RASx access time module CASx access time module SODIMM configuration type (non-parity, parity, error correcting code [ECC]) Refresh rate type DRAM width, primary DRAM Error-checking SDRAM data width revision Checksum bytes Manufacturer's JEDEC code JEP-106E Manufacturing location Manufacturer's part number revision code revision code Manufacturing date Assembly serial number Manufacturer specific data Vendor specific data System integrator's specific data PRODUCT PREVIEW 64-71 73-90 93-94 95-98 99-125 126-127 128-166 LVTTL tRAC tCAC Non-parity 15.6 Rev. 9700.00h LVTTL tRAC tCAC Non-parity 15.6 Rev. 9700.00h LVTTL tRAC tCAC Non-parity 15.6 Rev. 9700.00h 167-255 Open indicates values determined manufacturing time module dependent. These values determined programmed customer (optional). POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM serial presence detect (continued) Table Serial-Presence-Detect Data TM8EJ64NPU BYTE FUNCTION DESCRIBED Defines number bytes written into serial memory during module manufacturing Total number bytes memory device Fundamental memory (FPM, EDO, SDRAM) type 8EJ64NPU-40 ITEM bytes DATA '8EJ64NPU-50 ITEM bytes DATA '8EJ64NPU-60 ITEM bytes DATA 64-71 73-90 93-94 95-98 99-125 126-127 128-166 bytes banks bits bytes banks bits bytes banks bits Number addresses this assembly Number column addresses this assembly Number module banks this assembly Data width this assembly Data width continuation Voltage interface standard this assembly RASx access time module CASx access time module SODIMM configuration type (non-parity, parity, error correcting code [ECC]) Refresh rate type DRAM width, primary DRAM Error-checking SDRAM data width revision Checksum bytes Manufacturer's JEDEC code JEP-106E Manufacturing location Manufacturer's part number revision code revision code Manufacturing date Assembly serial number Manufacturer specific data Vendor specific data System integrator's specific data LVTTL tRAC tCAC Non-parity 15.6 Rev. 9700.00h LVTTL tRAC tCAC Non-parity 15.6 Rev. 9700.00h LVTTL tRAC tCAC Non-parity 15.6 Rev. 9700.00h 167-255 Open indicates values determined manufacturing time module dependent. These values determined programmed customer (optional). POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM serial presence detect (continued) Table Serial-Presence-Detect Data TM4FJ64KPU BYTE FUNCTION DESCRIBED Defines number bytes written into serial memory during module manufacturing Total number bytes memory device Fundamental memory (FPM, EDO, SDRAM) type '4FJ64KPU-40 ITEM bytes DATA '4FJ64KPU-50 ITEM bytes DATA '4FJ64KPU-60 ITEM bytes DATA bytes banks bits bytes banks bits bytes banks bits Number addresses this assembly Number column addresses this assembly Number module banks this assembly Data width this assembly Data width continuation Voltage interface standard this assembly RASx access time module CASx access time module SODIMM configuration type (non-parity, parity, error correcting code [ECC]) Refresh rate type DRAM width, primary DRAM Error-checking SDRAM data width revision Checksum bytes Manufacturer's JEDEC code JEP-106E Manufacturing location Manufacturer's part number revision code revision code Manufacturing date Assembly serial number Manufacturer specific data Vendor specific data System integrator's specific data PRODUCT PREVIEW LVTTL tRAC tCAC Non-parity 15.6 /selfrefresh Rev. LVTTL tRAC tCAC Non-parity 15.6 /selfrefresh Rev. LVTTL tRAC tCAC Non-parity 15.6 /selfrefresh Rev. 64-71 73-90 93-94 95-98 99-125 126-127 128-166 9700.00h 9700.00h 9700.00h 167-255 Open indicates values determined manufacturing time module dependent. These values determined programmed customer (optional). POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM serial presence detect (continued) Table Serial-Presence-Detect Data TM4FJ64NPU BYTE FUNCTION DESCRIBED Defines number bytes written into serial memory during module manufacturing Total number bytes memory device Fundamental memory (FPM, EDO, SDRAM) type '4FJ64NPU-40 ITEM bytes DATA '4FJ64NPU-50 ITEM bytes DATA '4FJ64NPU-60 ITEM bytes DATA bytes bank bits bytes bank bits bytes bank bits Number addresses this assembly Number column addresses this assembly Number module banks this assembly Data width this assembly Data width continuation Voltage interface standard this assembly RASx access time module CASx access time module SODIMM configuration type (non-parity, parity, error correcting code [ECC]) Refresh rate type DRAM width, primary DRAM Error-checking SDRAM data width revision Checksum bytes Manufacturer's JEDEC code JEP-106E Manufacturing location Manufacturer's part number revision code revision code Manufacturing date Assembly serial number Manufacturer specific data Vendor specific data System integrator's specific data LVTTL tRAC tCAC Non-parity 15.6 /selfrefresh Rev. LVTTL tRAC tCAC Non-parity 15.6 /selfrefresh Rev. LVTTL tRAC tCAC Non-parity 15.6 /selfrefresh Rev. 64-71 73-90 93-94 95-98 99-125 126-127 128-166 9700.00h 9700.00h 9700.00h 167-255 Open indicates values determined manufacturing time module dependent. These values determined programmed customer (optional). POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM serial presence detect (continued) Table Serial-Presence-Detect Data TM8FJ64KPU BYTE FUNCTION DESCRIBED Defines number bytes written into serial memory during module manufacturing Total number bytes memory device Fundamental memory (FPM, EDO, SDRAM) type '8FJ64KPU-40 ITEM bytes DATA '8FJ64KPU-50 ITEM bytes DATA '8FJ64KPU-60 ITEM bytes DATA bytes banks bits bytes banks bits bytes banks bits Number addresses this assembly Number column addresses this assembly Number module banks this assembly Data width this assembly Data width continuation Voltage interface standard this assembly RASx access time module CASx access time module SODIMM configuration type (non-parity, parity, error correcting code [ECC]) Refresh rate type DRAM width, primary DRAM Error-checking SDRAM data width revision Checksum bytes Manufacturer's JEDEC code JEP-106E Manufacturing location Manufacturer's part number revision code revision code Manufacturing date Assembly serial number Manufacturer specific data Vendor specific data System integrator's specific data PRODUCT PREVIEW LVTTL tRAC tCAC Non-parity 15.6 /selfrefresh Rev. LVTTL tRAC tCAC Non-parity 15.6 µs/selfrefresh Rev. LVTTL tRAC tCAC Non-parity 15.6 µs/selfrefresh Rev. 64-71 73-90 93-94 95-98 99-125 126-127 128-166 9700.00h 9700.00h 9700.00h 167-255 Open indicates values determined manufacturing time module dependent. These values determined programmed customer (optional). POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM serial presence detect (continued) Table Serial-Presence-Detect Data TM8FJ64NPU BYTE FUNCTION DESCRIBED Defines number bytes written into serial memory during module manufacturing Total number bytes memory device Fundamental memory (FPM, EDO, SDRAM) type 8FJ64NPU-40 ITEM bytes DATA '8FJ64NPU-50 ITEM bytes DATA '8FJ64NPU-60 ITEM bytes DATA bytes banks bits bytes banks bits bytes banks bits Number addresses this assembly Number column addresses this assembly Number module banks this assembly Data width this assembly Data width continuation Voltage interface standard this assembly RASx access time module CASx access time module DIMM configuration (non-parity, parity, correcting code [ECC]) Refresh rate type DRAM width, primary DRAM Error-checking SDRAM data width revision Checksum bytes Manufacturer's JEDEC code JEP-106E Manufacturing location Manufacturer's part number revision code revision code Manufacturing date Assembly serial number Manufacturer specific data Vendor specific data System integrator's specific data type error LVTTL tRAC tCAC Non-parity 15.6 /selfrefresh Rev. LVTTL tRAC tCAC Non-parity 15.6 µs/selfrefresh Rev. LVTTL tRAC tCAC Non-parity 15.6 µs/selfrefresh Rev. 64-71 73-90 93-94 95-98 99-125 126-127 128-166 9700.00h 9700.00h 9700.00h 167-255 Open indicates values determined manufacturing time module dependent. These values determined programmed customer (optional). POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM device symbolization (TM4EJ64KPU illustrated) TM4EJ64KPU YYMMT Year Code Month Code Assembly Site Code Speed Code NOTES: Location symbolization vary. PRODUCT PREVIEW POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 TM4EJ64KPU, TM4EJ64NPU, TM4FJ64KPU, TM4FJ64NPU, 4194304 64-BIT TM8EJ64KPU, TM8EJ64NPU, TM8FJ64KPU, TM8FJ64NPU, 8388608 64-BIT EXTENDED-DATA-OUT DYNAMIC MODULES SODIMM MECHANICAL DATA (R-SODIMM-N144) SMALL OUTLINE DUAL IN-LINE MEMORY MODULE 2.665 (67,69) 2.655 (67,44) Notch 0.157 (4,00) 0.079 (2,00) Deep Places) Notch 0.060 (1,52) 0.158 (4,01) Deep 0.044 (1,12) 0.036 (0,91) 0.024 (0,61) 0.098 (2,49) 0.196 (4,98) 0.031 (0,79) 0.010 (0,25) 0.788 (20,00) 1.005 (25,53) 0.995 (25,27) 0.157 (4,00) 0.126 (3,20) 0.095 (2,41) 0.150 (3,81) (For Double Sided Module Only) 4088187/A 07/97 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. Falls within JEDEC MO-190 POST OFFICE 1443 HOUSTON, TEXAS 77251-1443 PRODUCT PREVIEW IMPORTANT NOTICE Texas Instruments subsidiaries (TI) reserve right make changes their products discontinue product service without notice, advise customers obtain latest version relevant information verify, before placing orders, that information being relied current complete. products sold subject terms conditions sale supplied time order acknowledgement, including those pertaining warranty, patent infringement, limitation liability. warrants performance semiconductor products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques utilized extent deems necessary support this warranty. Specific testing parameters each device necessarily performed, except those mandated government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS INVOLVE POTENTIAL RISKS DEATH, PERSONAL INJURY, SEVERE PROPERTY ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). SEMICONDUCTOR PRODUCTS DESIGNED, AUTHORIZED, WARRANTED SUITABLE LIFE-SUPPORT DEVICES SYSTEMS OTHER CRITICAL APPLICATIONS. INCLUSION PRODUCTS SUCH APPLICATIONS UNDERSTOOD FULLY CUSTOMER'S RISK. order minimize risks associated with customer's applications, adequate design operating safeguards must provided customer minimize inherent procedural hazards. assumes liability applications assistance customer product design. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right covering relating combination, machine, process which such semiconductor products services might used. TI's publication information regarding third party's products services does constitute TI's approval, warranty endorsement thereof. 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