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MARKETING PART NUMBER VIC64 VIC068A VAC068A CY7C964 DEVICE DESCRIPTION


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CMOS2AN PROCESS
MARKETING PART NUMBER VIC64 VIC068A VAC068A CY7C964 DEVICE DESCRIPTION VMEbus Interface Controller with VMEbus Interface Controller VMEbus Address Controller Interface Logic Circuit
PRODUCT DESCRIPTION (for qualification)
Information provided this document intended generic qualification technically describes Cypress part supplied: Interface Products Marketing Part Device Description: Cypress Division: Size (stepping): VIC64, VIC068A Interface Products Cypress Semiconductor Corporation Rev. November, 1994 mils mils What markings Die:
Overall Mask) Level (pre-requisite qualification): Cypress Qualification completion/Marketing Availability Dates (Current REV):
TECHNOLOGY/FAB PROCESS DESCRIPTION CMOS2AN
Number Metal Layers: Passivation Type Materials: Free Phosphorus contents glass layer(%): Coating(s), used: Gate Oxide Material/Thickness (MOS): Name/Location (prime) Facility: Line ID/Wafer Process CMOS, SiO2 Bloomington, Fab3 CMOS2AN Generic Process Technology/Design Rule (µ-drawn): Metal Composition: Metal Metal None
TEOS Nitride
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CYPRESS SEMICONDUCTOR
PLASTIC PACKAGE/ASSEMBLY DESCRIPTION
Package Outline, Type, Name: Package edge clearance: Mold Compound Name/Manufacturer: Lead Frame material: Lead Finish, composition: Attach Area Plating: Attach Method: Wire Bond Method: Name/Location Assembly (prime) facility: Assembly Line Process Wire Copper Solder Dipped, 90%Sn, 10%Pb Gold Gold Ball Attach Dim: Attach Material: Wire Material/Size: VLSI, Texas USA-V /PPGA mils mils Silver Epoxy Gold 144-Pin Plastic Grid Array mils side Sumitomo EME-6300H(R)
HERMETIC PACKAGE/ASSEMBLY DESCRIPTION
Package Outline, Type, Name: Package edge clearance: Mold Compound Name/Manufacturer: Lead Frame material: Lead Finish, composition: Attach Area Plating: Attach Method: Wire Bond Method: Name/Location Assembly (prime) facility: Assembly Line Process Wire Kovar/Gold mil. over mil. Nikel Silver Glass Attach Dim: Attach Material: Wire Material/Size: VLSI, Texas USA-V /CPGA mils mils Silver Epoxy Al-Si 1.25 144-Pin Ceramic Grid Array mils side
HERMETIC PACKAGE/ASSEMBLY DESCRIPTION
Package Outline, Type, Name: Package edge clearance: Mold Compound Name/Manufacturer: Lead Frame material: Lead Finish, composition: Attach Area Plating: Attach Method: Wire Bond Method: Name/Location Assembly (prime) facility: Assembly Line Process Alloy Gold Plate None Silver Glass Ultrasonic Attach Dim: Attach Material: Wire Material/Size: VLSI, Texas USA-V /CQFP mils mils Silver Epoxy Al-Si 1.25 Lead Ceramic Quad Flatpack mils side
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CYPRESS SEMICONDUCTOR
OTHER INFORMATION
approval similarity, identify other devices using same basic with bonding metal mask options test selections explain: CMOS2N products: VIC068A, VAC068A, VIC64, 7C964
Cypress planning changes near future, identify change (Qtr/Yr) Design Rev./Shrink: Fab/Assembly site change: Other Devices qualified this technology: Other Packages qualified this device: Voltage Rating (per STD-008, Method 3018): Flammability Classification (UL-94V): Alternate Fab/Assembly Locations: None Assembly Ceramic/plastic Quad Flatpack Ceramic/Plastic Grid Array >1,000V Process Change: Cross Licensee/Licensor:
Please attach following Qualification Reliability data revision Package type, assembly sites identified above (mark included): HAST (5.5V, 140°C, 85%RH, 15psig) Temperature Cycles (-65°C 150°C) Temperature Cycles (-40°C 165°C) Data Retention Bake, Plastic (165°C) Data Retention Bake, Hermetic (250°C) Autoclave (PCT, 121°C, 100%RH) Operating Life (temp): Steady State Life (HTSSL, 5.5V, 125°C) Latchup Testing Tests (MIL-STD 883, method 3015) Other: Current Density Input Capacitance Internal Water Vapor Aged Bond Strength Analysis Long Life Verification 150°C/125°C Steady State Life (HTSSL, 5.75V, 150°C)
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CYPRESS SEMICONDUCTOR
PRODUCT INFORMATION QUALIFICATION SIMILARITY
Product Family: Division: VMEBus CMOS2AN Process Cypress Semiconductor Size/ Type Rev. Size (stepping) Design Rule Fabrication Passivation Type Assembly Volt Availa Line Rating bility Location
Supplier's Part Number
Process VIC64 -GC/GM/GMB -UC/UM/UMB -GC/GI/GM/GMB -UC/UI/UM/UMB -GC/GI/GM/GMB -UC/UI/UM/UMB 144-Pin PPGA 144-Pin CPGA 160-Lead PQFP 160-Lead CQFP 144-Pin PPGA 144-Pin CPGA 160-Lead PQFP 160-Lead CQFP 144-Pin PPGA 144-Pin CPGA 160-Lead PQFP 160-Lead CQFP 1.2µm CMOS2N
Line TEOS NITRIDE TEOS NITRIDE TEOS NITRIDE TEOS NITRIDE VLSI, >1,000V 5/94
VIC068A
1.2µm
CMOS2N
VLSI, >1,000V
5/94
VAC068A
1.2µm
CMOS2N
VLSI, >1,000V
5/94
CY7C964
64-Lead PQFP -UC/UI/UM/UMB 64-Lead CQFP
1.2µm
CMOS2N
VLSI, >1,000V
5/94
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CYPRESS SEMICONDUCTOR
Marketing Part: Description:
VIC064/VIC068A 144-pins Ceramic Grid Array 144-pins Plastic Grid Array
DEVICE RELIABILITY SUMMARY
Wafer Fab: Assembly:
Fab3, Bloomington, VLSI, Texas
High Temperature Dynamic Operating Life (HTOL, 5.5V, 150°C) Early Failure Rate Device 7C068D-GMB Assy Lot# 49306887 Hours 0/337 Cumulative 0/337
High Temperature Dynamic Operating Life (HTOL, 5.5V, 125°C) Early Failure Rate Device 7C068D-BC 7C068D-BC Assy Lot# 49306061 49306148 Hours 0/336 0/336 Cumulative 0/672
High Temperature Dynamic Operating Life (HTOL, 6.5V, 125°C) Latent Failure Rate Device 7C068D-BC 7C068D-BC Assy Lot# 49306061 49306148 Hours 0/77 0/77 1000 Hours 0/77 0/77 Cumulative 0/154
High Temperature Dynamic Operating Life (HTOL, 5.5V, 150°C) Latent Failure Rate Device 7C068D-GM Assy Lot# 49306887 Hours 0/77 Hours 0/77 Cumulative 0/77
High Temperature Steady State Life Test (HTSSL, 5.75V, 150°C) Device 7C068D-GMB Assy Lot# 49306887 Hours 0/78 Cumulative 0/78
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CYPRESS SEMICONDUCTOR
High Temperature Steady State Life Test (HTSSL, 5.75V, 125°C) Device 7C068D-BC 7C068D-BC Assy Lot# 49306148 49306061 Hours 0/78 0/78 Long Life Verification (LLVA 5.5V, 150C) Device 7C068D-GM Assy Lot# 49306887 1000 Hours 0/76 2000 Hours 0/76 Cumulative 0/76 Cumulative 0/156
Group Subgroup1, Lifet Test (HTOL, 5.75V, 125°C) Device 7C064-UMB Assy Lot# V05032 Hours 0/80 Temperature Cycle (Condition -65°C 150°C) Device 7C068D-BC 7C068D-BC 7C068D-GMB Assy Lot# 49306061 V11012 V11139 Cycles Cycles 0/47 0/47 0/45 1000 Cycles 0/47 0/47 0/45 Cumulative 0/139 Cumulative 0/80
High Accelerated Saturation Test (HAST, 5.5V, 140°C, 85%RH, 15psig) Device 7C068D-BC 7C068D-BC Assy Lot# 49306061 49306148 Hours 0/45 0/45 Cumulative 0/90
Pressure Cooker Test (PCT 100% 121°C, 15psig) Device 7C068D-BC 7C068D-BC Assy Lot# 11048A 11049A Hours 0/50 0/50 Cumulative 0/100
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CYPRESS SEMICONDUCTOR
Marketing Part: Description:
DEVICE RELIABILITY SUMMARY VIC064/VIC068A Wafer Fab: 144-pins Ceramic Grid Array Assembly: 144-pins Plastic Grid Array
Fab3, Bloomington, VLSI, Texas
CMOS2AN PROCESS VIC64/VIC068A/VAC068A/7C964 Electrostatic Discharge Human Body Model Circuit 883, Method 3015 >+1,000V Unit >-1,000V >+1,000V Unit >-1,000V >+1,000V Unit >-1,000V (Highest passing voltage, +10% Guard banded)
Latchup Testing Cypress Internal Latch-up Procedure Tests: Current Injection 200mA Trigger Socket Temp 125°C Other miscellaneous tests Current Density Cross Section wafers) Input Capacitance Internal Water Vapor Aged Bond Strength Assembly Line Pass Pass Pass Pass Pass Pass

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